0001-Decompiler.patch

From d626579084cba5aca98f502a1629dbd7c8c6327f Mon Sep 17 00:00:00 2001
From: Johannes Feichtner <johannes.feichtner@iaik.tugraz.at>
Date: Thu, 14 Jun 2018 11:58:39 +0200
Subject: [PATCH 1/1] Decompiler

---
 .gitignore                                         |     3 +
 CMakeLists.txt                                     |     4 +
 include/llvm/DC/DCInstrSema.h                      |     2 +
 include/llvm/DC/DCRegisterSema.h                   |     4 +-
 include/llvm/MC/MCObjectDisassembler.h             |     9 +
 include/llvm/Object/ObjectiveCFile.h               |   117 +
 lib/DC/DCInstrSema.cpp                             |   438 +-
 lib/DC/DCRegisterSema.cpp                          |    20 +-
 lib/DC/DCTranslator.cpp                            |   167 +-
 lib/MC/MCAnalysis/MCObjectDisassembler.cpp         |   223 +-
 lib/Object/CMakeLists.txt                          |     1 +
 lib/Object/ObjectiveCFile.cpp                      |   297 +
 lib/Target/AArch64/AArch64.td                      |     8 +
 lib/Target/AArch64/AArch64ISelLowering.h           |     4 +-
 lib/Target/AArch64/AArch64InstrFormats.td          |    88 +-
 lib/Target/AArch64/AArch64InstrInfo.td             |     8 +-
 lib/Target/AArch64/AArch64RegisterInfo.td          |    42 +-
 lib/Target/AArch64/AArch64Sema.td                  |   542 +
 lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp  |    22 +-
 lib/Target/AArch64/CMakeLists.txt                  |     2 +
 lib/Target/AArch64/DC/AArch64DCInfo.cpp            |    38 +
 lib/Target/AArch64/DC/AArch64InstrSema.cpp         |  2993 ++++++
 lib/Target/AArch64/DC/AArch64InstrSema.h           |    33 +
 lib/Target/AArch64/DC/AArch64InstrSemaDebug.cpp    | 10391 +++++++++++++++++++
 lib/Target/AArch64/DC/AArch64RegisterSema.cpp      |   441 +
 lib/Target/AArch64/DC/AArch64RegisterSema.h        |    34 +
 lib/Target/AArch64/DC/CMakeLists.txt               |    10 +
 lib/Target/AArch64/DC/LD_ST_cases.h                |  1361 +++
 lib/Target/AArch64/DC/LLVMBuild.txt                |    23 +
 .../AArch64/Disassembler/AArch64Disassembler.cpp   |    14 +-
 lib/Target/AArch64/LLVMBuild.txt                   |     2 +-
 .../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp   |    77 +
 .../AArch64/MCTargetDesc/AArch64MCTargetDesc.h     |     1 +
 lib/Target/X86/DC/X86InstrSema.h                   |     1 +
 tools/llvm-dec/CMakeLists.txt                      |     2 +
 tools/llvm-dec/FunctionNamePass.cpp                |   470 +
 tools/llvm-dec/FunctionNamePass.h                  |    34 +
 tools/llvm-dec/TailCallPass.cpp                    |   145 +
 tools/llvm-dec/TailCallPass.h                      |    25 +
 tools/llvm-dec/llvm-dec.cpp                        |    59 +-
 utils/TableGen/SemanticsEmitter.cpp                |    17 +
 41 files changed, 18037 insertions(+), 135 deletions(-)
 create mode 100644 include/llvm/Object/ObjectiveCFile.h
 create mode 100644 lib/Object/ObjectiveCFile.cpp
 create mode 100644 lib/Target/AArch64/AArch64Sema.td
 create mode 100644 lib/Target/AArch64/DC/AArch64DCInfo.cpp
 create mode 100644 lib/Target/AArch64/DC/AArch64InstrSema.cpp
 create mode 100644 lib/Target/AArch64/DC/AArch64InstrSema.h
 create mode 100644 lib/Target/AArch64/DC/AArch64InstrSemaDebug.cpp
 create mode 100644 lib/Target/AArch64/DC/AArch64RegisterSema.cpp
 create mode 100644 lib/Target/AArch64/DC/AArch64RegisterSema.h
 create mode 100644 lib/Target/AArch64/DC/CMakeLists.txt
 create mode 100644 lib/Target/AArch64/DC/LD_ST_cases.h
 create mode 100644 lib/Target/AArch64/DC/LLVMBuild.txt
 create mode 100644 tools/llvm-dec/FunctionNamePass.cpp
 create mode 100644 tools/llvm-dec/FunctionNamePass.h
 create mode 100644 tools/llvm-dec/TailCallPass.cpp
 create mode 100644 tools/llvm-dec/TailCallPass.h

diff --git a/.gitignore b/.gitignore
index e3d191d..0ed8c14 100644
--- a/.gitignore
+++ b/.gitignore
@@ -64,3 +64,6 @@ docs/_build
 #==============================================================================#
 bindings/go/llvm/llvm_config.go
 bindings/go/llvm/workdir
+
+build*/*
+.idea/*
diff --git a/CMakeLists.txt b/CMakeLists.txt
index cd72aa1..7e77d3e 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -20,6 +20,10 @@ if (POLICY CMP0051)
   cmake_policy(SET CMP0051 OLD)
 endif()
 
+if(POLICY CMP0046)
+  cmake_policy(SET CMP0046 OLD)
+endif()
+
 if(CMAKE_VERSION VERSION_LESS 3.1.20141117)
   set(cmake_3_2_USES_TERMINAL)
 else()
diff --git a/include/llvm/DC/DCInstrSema.h b/include/llvm/DC/DCInstrSema.h
index 5b82288..e5cdc1b 100644
--- a/include/llvm/DC/DCInstrSema.h
+++ b/include/llvm/DC/DCInstrSema.h
@@ -149,6 +149,8 @@ protected:
                                       unsigned MIOperandNo) = 0;
   virtual void translateImplicit(unsigned RegNo) = 0;
 
+  virtual void translateTargetIntrinsic(unsigned IntrinsicID) = 0;
+
   // Try to do a custom translation of a full instruction.
   // Called before translating an instruction.
   // Return true if the translation shouldn't proceed.
diff --git a/include/llvm/DC/DCRegisterSema.h b/include/llvm/DC/DCRegisterSema.h
index d5be290..14199f0 100644
--- a/include/llvm/DC/DCRegisterSema.h
+++ b/include/llvm/DC/DCRegisterSema.h
@@ -154,8 +154,8 @@ public:
 
   Value *getRegNoCallback(unsigned RegNo);
 
-  Value *getReg(unsigned RegNo);
-  void setReg(unsigned RegNo, Value *Val);
+  virtual Value *getReg(unsigned RegNo);
+  virtual void setReg(unsigned RegNo, Value *Val);
 
   Type *getRegType(unsigned RegNo);
 
diff --git a/include/llvm/MC/MCObjectDisassembler.h b/include/llvm/MC/MCObjectDisassembler.h
index c7d4b51..380a221 100644
--- a/include/llvm/MC/MCObjectDisassembler.h
+++ b/include/llvm/MC/MCObjectDisassembler.h
@@ -20,6 +20,7 @@
 #include "llvm/Support/DataTypes.h"
 #include "llvm/MC/MCInst.h"
 #include <vector>
+#include "llvm/Object/ObjectiveCFile.h"
 
 namespace llvm {
 
@@ -72,6 +73,8 @@ public:
     MOS = ObjectSymbolizer;
   }
 
+    AddressSetTy findFunctionStarts();
+
 protected:
   const object::ObjectFile &Obj;
   const MCDisassembler &Dis;
@@ -109,6 +112,12 @@ private:
   void disassembleFunctionAt(MCModule *Module, MCFunction *MCFN,
                              uint64_t BeginAddr, AddressSetTy &CallTargets,
                              AddressSetTy &TailCallTargets);
+    bool checkBranch(MCInst &Inst, uint64_t Target);
+
+
+    AddressSetTy FunctionStarts;
+  bool Stripped;
+    std::unique_ptr<ObjectiveCFile> ObjCFile;
 };
 
 }
diff --git a/include/llvm/Object/ObjectiveCFile.h b/include/llvm/Object/ObjectiveCFile.h
new file mode 100644
index 0000000..37fae1a
--- /dev/null
+++ b/include/llvm/Object/ObjectiveCFile.h
@@ -0,0 +1,117 @@
+#ifndef LLVM_OBJECTIVECFILE_H
+#define LLVM_OBJECTIVECFILE_H
+
+#include "llvm/Object/MachO.h"
+
+#include <map>
+#include <string>
+
+namespace llvm {
+
+    class ObjectiveCFile {
+    public:
+        ObjectiveCFile(object::MachOObjectFile *MachO) : MachO(MachO) {
+            resolveMethods();
+        };
+
+        struct ObjcClass_t {
+            StringRef ClassName;
+        };
+        typedef struct ObjcClass_t ObjcClass_t;
+
+        struct ObjcMethod_t {
+            ObjcClass_t Class;
+            StringRef MethodName;
+            bool isClassMethod;
+            uint64_t IMP;
+        };
+        typedef struct ObjcMethod_t ObjcMethod_t;
+
+        std::map<uint64_t, std::string> getFunctionNames() {
+            return FunctionNames;
+        };
+        std::string getFunctionName(uint64_t Address) {
+            return FunctionNames[Address];
+        }
+    private:
+        struct ObjcDataStruct_t {
+            uint64_t ISA;
+            uint64_t Super;
+            uint64_t Cache;
+            uint64_t VTable;
+            uint64_t Data;
+        };
+        typedef struct ObjcDataStruct_t ObjcDataStruct_t;
+
+        struct ObjcClassInfoStruct_t {
+            uint32_t Flags;
+            uint32_t InstanceStart;
+            uint32_t InstanceSize;
+            uint32_t Reserved;
+            uint64_t IVarLayout;
+            uint64_t Name;
+            uint64_t BaseMethods;
+            uint64_t BaseProtocols;
+            uint64_t IVars;
+            uint64_t WeakIVarLayout;
+            uint64_t BaseProperties;
+        };
+        typedef struct ObjcClassInfoStruct_t ObjcClassInfoStruct_t;
+
+        typedef struct {
+            uint64_t Name;
+            uint64_t Class;
+            uint64_t InstaceMethods;
+            uint64_t ClassMethods;
+        } ObjcCatInfoStruct_t;
+
+        struct ObjcMethodListHeader_t {
+            uint32_t EntrySize;
+            uint32_t Count;
+        };
+        typedef struct ObjcMethodListHeader_t ObjcMethodListHeader_t;
+
+        struct ObjcMethodListEntry_t {
+            uint64_t Name;
+            uint64_t Types;
+            uint64_t Implementation;
+        };
+
+
+        object::MachOObjectFile *MachO;
+
+        uint64_t ObjcClasslistAddress = 0;
+        ArrayRef<uint8_t> ObjcClasslistData;
+
+        uint64_t ObjcDataAddress = 0;
+        ArrayRef<uint8_t> ObjcDataData;
+
+        uint64_t ObjcConstAddress = 0;
+        ArrayRef<uint8_t> ObjcConstData;
+
+        uint64_t ObjcMethodnamesAddress = 0;
+        ArrayRef<uint8_t> ObjcMethodnamesData;
+
+        uint64_t ObjcClassnamesAddress = 0;
+        ArrayRef<uint8_t> ObjcClassnamesData;
+
+        uint64_t ObjcCatlistAddress = 0;
+        ArrayRef<uint8_t> ObjcCatlistData;
+
+        std::map<uint64_t, std::string> FunctionNames;
+
+        void resolveMethods();
+
+        void resolveMethods(ObjcClassInfoStruct_t *ClassInfo, bool ClassMethods);
+        void resolveMethods(ObjcCatInfoStruct_t *CatInfo, bool ClassMethods, uint64_t CatInfoAddress, ObjcClassInfoStruct_t *ClassInfo);
+
+        StringRef getClassName(ArrayRef<uint8_t> &ObjcClassnames, uint64_t ObjcClassNamesAddress, uint64_t Address);
+        StringRef getMethodName(ArrayRef<uint8_t> &ObjcMethodnames, uint64_t ObjcMethodnamesAddress, uint64_t Address);
+
+        StringRef getClassName(uint64_t Pointer);
+        MachO::segment_command_64 getSegment(uint64_t SegmentNo);
+    };
+
+}
+
+#endif //LLVM_OBJECTIVECFILE_H
diff --git a/lib/DC/DCInstrSema.cpp b/lib/DC/DCInstrSema.cpp
index 8beb6be..cf1040d 100644
--- a/lib/DC/DCInstrSema.cpp
+++ b/lib/DC/DCInstrSema.cpp
@@ -28,6 +28,7 @@
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCAnalysis/MCFunction.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/IR/Intrinsics.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "dc-sema"
@@ -260,8 +261,9 @@ void DCInstrSema::SwitchToBasicBlock(uint64_t BeginAddr) {
   // FIXME: we need to keep the unreachable+trap when the basic block is 0-inst.
 
   // The PC at the start of the basic block is known, just set it.
-  unsigned PC = DRS.MRI.getProgramCounter();
-  setReg(PC, ConstantInt::get(DRS.getRegType(PC), BeginAddr));
+    //FIXME: AArch64 can't access the PC directly
+//  unsigned PC = DRS.MRI.getProgramCounter();
+//  setReg(PC, ConstantInt::get(DRS.getRegType(PC), BeginAddr));
 }
 
 uint64_t DCInstrSema::getBasicBlockStartAddress() const {
@@ -288,6 +290,7 @@ BasicBlock *DCInstrSema::getOrCreateBasicBlock(uint64_t Addr) {
     BBBuilder
         .CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::trap));
     BBBuilder.CreateUnreachable();
+
   }
   return BB;
 }
@@ -353,8 +356,13 @@ void DCInstrSema::translateBinOp(Instruction::BinaryOps Opc) {
 }
 
 void DCInstrSema::translateCastOp(Instruction::CastOps Opc) {
-  Type *ResType = ResEVT.getTypeForEVT(*Ctx);
-  Value *Val = getNextOperand();
+    Type *ResType = nullptr;
+    Value *Val = getNextOperand();
+    if (ResEVT.getSimpleVT() == MVT::Untyped) {
+        ResType = Val->getType();
+    } else {
+        ResType = ResEVT.getTypeForEVT(*Ctx);
+    }
   registerResult(Builder->CreateCast(Opc, Val, ResType));
 }
 
@@ -365,6 +373,10 @@ DCInstrSema::translateInst(const MCDecodedInst &DecodedInst,
   CurrentTInst = &TranslatedInst;
   DRS.SwitchToInst(DecodedInst);
 
+    if (CurrentInst->Address == 0x100C65430) {
+        assert(true);
+    }
+
   if (EnableInstAddrSave) {
     ConstantInt *CurIVal =
         Builder->getInt64(reinterpret_cast<uint64_t>(CurrentInst->Address));
@@ -381,10 +393,11 @@ DCInstrSema::translateInst(const MCDecodedInst &DecodedInst,
 
     {
       // Increment the PC before anything.
-      Value *OldPC = getReg(DRS.MRI.getProgramCounter());
-      setReg(DRS.MRI.getProgramCounter(),
-             Builder->CreateAdd(
-                 OldPC, ConstantInt::get(OldPC->getType(), CurrentInst->Size)));
+        //FIXME: AArch64 can't access the PC
+//      Value *OldPC = getReg(DRS.MRI.getProgramCounter());
+//      setReg(DRS.MRI.getProgramCounter(),
+//             Builder->CreateAdd(
+//                 OldPC, ConstantInt::get(OldPC->getType(), CurrentInst->Size)));
     }
 
     while ((Opcode = Next()) != DCINS::END_OF_INSTRUCTION)
@@ -488,8 +501,13 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
     break;
   }
   case ISD::LOAD: {
-    Type *ResType = ResEVT.getTypeForEVT(*Ctx);
     Value *Ptr = getNextOperand();
+    Type *ResType = nullptr;
+      if (ResEVT.getSimpleVT() == MVT::Untyped) {
+          ResType = Ptr->getType();
+      } else {
+          ResType = ResEVT.getTypeForEVT(*Ctx);
+      }
     if (!Ptr->getType()->isPointerTy())
       Ptr = Builder->CreateIntToPtr(Ptr, ResType->getPointerTo());
     assert(Ptr->getType()->getPointerElementType() == ResType &&
@@ -512,6 +530,7 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
   case ISD::BRIND: {
     Value *Op1 = getNextOperand();
     setReg(DRS.MRI.getProgramCounter(), Op1);
+      //FIXME: this should be only a branch!?
     insertCall(Op1);
     Builder->CreateBr(ExitBB);
     break;
@@ -519,7 +538,8 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
   case ISD::BR: {
     Value *Op1 = getNextOperand();
     uint64_t Target = cast<ConstantInt>(Op1)->getValue().getZExtValue();
-    setReg(DRS.MRI.getProgramCounter(), Op1);
+      //FIXME: can't access program counter
+    //setReg(DRS.MRI.getProgramCounter(), Op1);
     Builder->CreateBr(getOrCreateBasicBlock(Target));
     break;
   }
@@ -539,8 +559,12 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
           Res,
           IntegerType::get(*Ctx, Res->getType()->getPrimitiveSizeInBits()));
     if (Res->getType()->getPrimitiveSizeInBits() <
-        RegType->getPrimitiveSizeInBits())
-      Res = DRS.insertBitsInValue(getReg(RegNo), Res);
+        RegType->getPrimitiveSizeInBits()) {
+        //FIXME: in AArch64 we do not insert bits???
+        Res = Builder->CreateZExt(Res, RegType);
+//        Res = DRS.insertBitsInValue(getReg(RegNo), Res);
+    }
+
     assert(Res->getType() == RegType);
     setReg(RegNo, Res);
     CurrentTInst->addRegOpDef(MIOperandNo, Res);
@@ -555,13 +579,17 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
   }
   case DCINS::GET_RC: {
     unsigned MIOperandNo = Next();
-    Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+      Type *ResType = NULL;
+      if (ResEVT.getEVTString() != "Untyped") {
+        ResType = ResEVT.getTypeForEVT(*Ctx);
+      }
+
     Value *Reg = getReg(getRegOp(MIOperandNo));
-    if (ResType->getPrimitiveSizeInBits() <
+    if (ResType && ResType->getPrimitiveSizeInBits() <
         Reg->getType()->getPrimitiveSizeInBits())
       Reg = Builder->CreateTrunc(
           Reg, IntegerType::get(*Ctx, ResType->getPrimitiveSizeInBits()));
-    if (!ResType->isIntegerTy())
+    if (ResType && !ResType->isIntegerTy())
       Reg = Builder->CreateBitCast(Reg, ResType);
     registerResult(Reg);
     CurrentTInst->addRegOpUse(MIOperandNo, Reg);
@@ -626,7 +654,385 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
     registerResult(Builder->CreateCall(IntDecl, Op));
     break;
   }
-  default:
+  case ISD::CTLZ: {
+      auto count = [this](Value *v) {
+          uint64_t Width = v->getType()->getIntegerBitWidth();
+          Value *Zero = Builder->getInt(APInt(Width, 0));
+          Value *Max = Builder->getInt(APInt(Width, 0));
+          for (uint64_t i = 0; i < Width; ++i) {
+              Value *IsZero = Builder->CreateICmpEQ(v, Zero);
+              Value *NoMax = Builder->CreateICmpEQ(Max, Zero);
+              IsZero = Builder->CreateAnd(IsZero, NoMax);
+              Max = Builder->CreateSelect(IsZero, Builder->getInt(APInt(Width, Width - i)), Max);
+              v = Builder->CreateLShr(v, 1);
+          }
+          return Max;
+      };
+
+
+      if (ResEVT.isVector()) {
+          Value *vec = getNextOperand();
+          Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+          result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+          for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+              Value *elem = Builder->CreateExtractElement(vec, i);
+              result = Builder->CreateInsertElement(result, count(elem), i);
+          }
+          registerResult(result);
+      } else {
+          Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+          Value *Op = getNextOperand();
+          registerResult(count(Op));
+      }
+
+      break;
+  }
+  case ISD::FABS: {
+      Value *Reg = getNextOperand();
+      Value *Zero = ConstantFP::get(Reg->getType(), 0.0);
+      Value *One_neg = ConstantFP::get(Reg->getType(), -1.0);
+      Value *IsPos = Builder->CreateFCmpOGE(Reg, Zero);
+      Value *Neg = Builder->CreateFMul(Reg, One_neg);
+      Value *Result = Builder->CreateSelect(IsPos, Reg, Neg);
+      registerResult(Result);
+      break;
+  }
+  case ISD::FNEG: {
+      Value *Neg = Builder->CreateFNeg(getNextOperand());
+      registerResult(Neg);
+      break;
+  }
+  case ISD::FNEARBYINT:
+  case ISD::FTRUNC:
+  case ISD::FROUND:
+  case ISD::FRINT: {
+      Value *Src = getNextOperand();
+      std::vector<Value*> args;
+      args.push_back(Src);
+      std::vector<Type*> types;
+      types.push_back(Src->getType());
+      Value *Result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::round, types), args);
+      registerResult(Result);
+      break;
+  }
+  case ISD::FFLOOR: {
+      Value *Src = getNextOperand();
+      std::vector<Value*> args;
+      args.push_back(Src);
+      std::vector<Type*> types;
+      types.push_back(Src->getType());
+      Value *Result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::floor, types), args);
+      registerResult(Result);
+      break;
+  }
+  case ISD::FCEIL: {
+      Value *Src = getNextOperand();
+      std::vector<Value*> args;
+      args.push_back(Src);
+      std::vector<Type*> types;
+      types.push_back(Src->getType());
+      Value *Result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::ceil, types), args);
+      registerResult(Result);
+      break;
+  }
+  case ISD::ConstantFP: {
+      registerResult(ConstantFP::get(ResEVT.getTypeForEVT(*Ctx), 0.0));
+      break;
+  }
+  case ISD::MULHU: {
+      Type *ExtType = IntegerType::get(*Ctx, 2 * ResEVT.getTypeForEVT(*Ctx)->getIntegerBitWidth());
+
+      Value *LHS = getNextOperand();
+      Value *RHS = getNextOperand();
+
+      LHS = Builder->CreateZExt(LHS, ExtType);
+      RHS = Builder->CreateZExt(RHS, ExtType);
+      Value *Result = Builder->CreateMul(LHS, RHS);
+      Result = Builder->CreateLShr(Result, Result->getType()->getIntegerBitWidth() / 2);
+      Result = Builder->CreateTrunc(Result, ResEVT.getTypeForEVT(*Ctx));
+      registerResult(Result);
+      break;
+  }
+  case ISD::MULHS: {
+      Type *ExtType = IntegerType::get(*Ctx, 2 * ResEVT.getTypeForEVT(*Ctx)->getIntegerBitWidth());
+
+      Value *LHS = getNextOperand();
+      Value *RHS = getNextOperand();
+
+      LHS = Builder->CreateSExt(LHS, ExtType);
+      RHS = Builder->CreateSExt(RHS, ExtType);
+      Value *Result = Builder->CreateMul(LHS, RHS);
+      Result = Builder->CreateLShr(Result, Result->getType()->getIntegerBitWidth() / 2);
+      Result = Builder->CreateTrunc(Result, ResEVT.getTypeForEVT(*Ctx));
+      registerResult(Result);
+      break;
+  }
+  case ISD::BUILD_VECTOR:{
+      assert(ResEVT.getSimpleVT().isVector());
+      Value *Vector = Builder->getInt(APInt(ResEVT.getSimpleVT().getScalarSizeInBits() * ResEVT.getSimpleVT().getVectorNumElements(), 0));
+      Vector = Builder->CreateBitCast(Vector, ResEVT.getTypeForEVT(*Ctx));
+      registerResult(Vector);
+      break;
+  }
+  case ISD::INTRINSIC_WO_CHAIN: {
+      if (const ConstantInt *id = dyn_cast<const ConstantInt>(getNextOperand())) {
+        translateTargetIntrinsic(id->getZExtValue());
+      }
+      else {
+          llvm_unreachable("");
+      }
+      break;
+  }
+  case ISD::UABSDIFF: {
+      if (ResEVT.getSimpleVT().isVector()) {
+          Value *zero = Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0));
+          Value *minusOne = Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), -1));
+          Value *op1 = getNextOperand();
+          Value *op2 = getNextOperand();
+          Value *result = Builder->getInt(APInt(ResEVT.getSimpleVT().getSizeInBits(), 0));
+          result = Builder->CreateBitCast(result, op1->getType());
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++i) {
+                Value *elem1 = Builder->CreateExtractElement(op1, i);
+                Value *elem2 = Builder->CreateExtractElement(op2, i);
+                Value *elemResult = Builder->CreateSub(elem1, elem2);
+                Value *elemPos = Builder->CreateICmpSGT(elemResult, zero);
+                elemResult = Builder->CreateSelect(elemPos, elemResult, Builder->CreateMul(elemResult, minusOne));
+                result = Builder->CreateInsertElement(result, elemResult, i);
+            }
+          registerResult(result);
+      } else {
+          Value *zero = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+          Value *minusOne = Builder->getInt(APInt(ResEVT.getSizeInBits(), -1));
+          Value *op1 = getNextOperand();
+          Value *op2 = getNextOperand();
+          Value *result = Builder->CreateSub(op1, op2);
+          Value *pos = Builder->CreateICmpSGT(result, zero);
+          result = Builder->CreateSelect(pos, result, Builder->CreateMul(result, minusOne));
+          registerResult(result);
+      }
+      break;
+  }
+      case ISD::UMAX: {
+          assert(ResEVT.getSimpleVT().isVector());
+          Value *op1 = getNextOperand();
+          Value *op2 = getNextOperand();
+          Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+          result = Builder->CreateBitCast(result, op1->getType());
+
+          for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+              Value *elem1 = Builder->CreateExtractElement(op1, i);
+              Value *elem2 = Builder->CreateExtractElement(op2, i);
+              Value *cmp = Builder->CreateICmpUGT(elem1, elem2);
+              Value *resElem = Builder->CreateSelect(cmp, elem1, elem2);
+              result = Builder->CreateInsertElement(result, resElem, i);
+          }
+          registerResult(result);
+          break;
+      }
+      case ISD::SMAX: {
+          assert(ResEVT.getSimpleVT().isVector());
+          Value *op1 = getNextOperand();
+          Value *op2 = getNextOperand();
+          Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+          result = Builder->CreateBitCast(result, op1->getType());
+
+          for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+              Value *elem1 = Builder->CreateExtractElement(op1, i);
+              Value *elem2 = Builder->CreateExtractElement(op2, i);
+              Value *cmp = Builder->CreateICmpSGT(elem1, elem2);
+              Value *resElem = Builder->CreateSelect(cmp, elem1, elem2);
+              result = Builder->CreateInsertElement(result, resElem, i);
+          }
+          registerResult(result);
+          break;
+      }
+      //TODO: check if this is always an extraction of the upper half of a vector
+      case ISD::EXTRACT_SUBVECTOR:
+      {
+          Value *vec = getNextOperand();
+          ConstantInt *constantInt = dyn_cast<ConstantInt>(getNextOperand());
+          assert(constantInt);
+//          constantInt->dump();
+          Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+          result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+//          if (constantInt->getZExtValue() == 2) {
+              for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                  Value *elem = Builder->CreateExtractElement(vec, ResEVT.getVectorNumElements() + i);
+                  result = Builder->CreateInsertElement(result, elem, i);
+              }
+//          }
+          registerResult(result);
+          break;
+      }
+      case ISD::FMA:
+      {
+          Value *op1 = getNextOperand();
+          Value *op2 = getNextOperand();
+          Value *op3 = getNextOperand();
+
+          if (ResEVT.isVector()) {
+              for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                  Value *elem1 = Builder->CreateExtractElement(op1, i);
+                  Value *elem2 = Builder->CreateExtractElement(op2, i);
+                  Value *elem3 = Builder->CreateExtractElement(op3, i);
+
+                  Value *resElem = Builder->CreateFMul(elem1, elem2);
+                  resElem = Builder->CreateFAdd(resElem, elem3);
+
+                  op3 = Builder->CreateInsertElement(op3, resElem, i);
+              }
+          } else {
+              op3 = Builder->CreateFAdd(op3, Builder->CreateFMul(op1, op2));
+          }
+
+          registerResult(op3);
+          break;
+      }
+      case ISD::FMINNUM:
+      case ISD::FMAXNUM:
+      case ISD::FMINNAN:
+      case ISD::FMAXNAN:
+      {
+          if (ResEVT.isVector()) {
+              Value *vec1 = getNextOperand();
+              Value *vec2 = getNextOperand();
+              Value *res = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+              res = Builder->CreateBitCast(res, ResEVT.getTypeForEVT(*Ctx));
+
+              for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                  Value *elem1 = Builder->CreateExtractElement(vec1, i);
+                  Value *elem2 = Builder->CreateExtractElement(vec2, i);
+                  Value *cmp = nullptr;
+                  switch (Opcode){
+                      default:
+                          llvm_unreachable("");
+                      case ISD::FMAXNUM:
+                      case ISD::FMAXNAN:
+                      {
+                          cmp = Builder->CreateFCmpUGT(elem1, elem2);
+                          break;
+                      }
+                      case ISD::FMINNUM:
+                      case ISD::FMINNAN:
+                      {
+                          cmp = Builder->CreateFCmpULT(elem1, elem2);
+                          break;
+                      }
+                  }
+                  Value *resElem = Builder->CreateSelect(cmp, elem1, elem2);
+                  res = Builder->CreateInsertElement(res, resElem, i);
+              }
+              registerResult(res);
+          } else {
+              Value *op1 = getNextOperand();
+              Value *op2 = getNextOperand();
+              Value *cmp = nullptr;
+              switch (Opcode) {
+                  default:
+                      llvm_unreachable("");
+                  case ISD::FMAXNUM:
+                  case ISD::FMAXNAN: {
+                      cmp = Builder->CreateFCmpUGT(op1, op2);
+                      break;
+                  }
+                  case ISD::FMINNUM:
+                  case ISD::FMINNAN: {
+                      cmp = Builder->CreateFCmpULT(op1, op2);
+                      break;
+                  }
+              }
+              Value *res = Builder->CreateSelect(cmp, op1, op2);
+              registerResult(res);
+          }
+          break;
+      }
+      case ISD::CTPOP: {
+          if (ResEVT.isVector()) {
+              Value *vec = getNextOperand();
+              Value *res = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+              res = Builder->CreateBitCast(res, ResEVT.getTypeForEVT(*Ctx));
+
+              for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                  Value *elem = Builder->CreateExtractElement(vec, i);
+                  Value *resElem = Builder->getInt(APInt(ResEVT.getVectorElementType().getScalarSizeInBits(), 0));
+                  for (unsigned j = 0; j < ResEVT.getVectorElementType().getScalarSizeInBits(); ++j) {
+                      Value *cmp = Builder->CreateAnd(elem, 1);
+                      cmp = Builder->CreateICmpEQ(cmp, Builder->getInt(APInt(cmp->getType()->getScalarSizeInBits(), 1)));
+                      resElem = Builder->CreateAdd(resElem, Builder->CreateSelect(cmp, Builder->getInt(APInt(ResEVT.getVectorElementType().getScalarSizeInBits(), 1)), Builder->getInt(APInt(ResEVT.getVectorElementType().getScalarSizeInBits(), 0))));
+                      elem = Builder->CreateLShr(elem, 1);
+                  }
+                  res = Builder->CreateInsertElement(res, resElem, i);
+              }
+              registerResult(res);
+          } else {
+              llvm_unreachable("not handled");
+          }
+          break;
+      }
+      case ISD::ROTR: {
+          Value *op = getNextOperand();
+          Value *r = getNextOperand();
+          //TODO: perform rotate...
+          registerResult(op);
+          break;
+      }
+      case ISD::UMIN: {
+          Value *op1 = getNextOperand();
+          Value *op2 = getNextOperand();
+          std::vector<Value*> args;
+          args.push_back(op1);
+          args.push_back(op2);
+
+          std::vector<Type*> types;
+          types.push_back(op1->getType());
+
+          Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_umin, types), args);
+          registerResult(result);
+          break;
+      }
+      case ISD::SMIN: {
+          Value *op1 = getNextOperand();
+          Value *op2 = getNextOperand();
+          std::vector<Value*> args;
+          args.push_back(op1);
+          args.push_back(op2);
+
+          std::vector<Type*> types;
+          types.push_back(op1->getType());
+
+          Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_smin, types), args);
+          registerResult(result);
+          break;
+      }
+//      case ISD::SMAX: {
+//          Value *op1 = getNextOperand();
+//          Value *op2 = getNextOperand();
+//          std::vector<Value*> args;
+//          args.push_back(op1);
+//          args.push_back(op2);
+//
+//          std::vector<Type*> types;
+//          types.push_back(op1->getType());
+//
+//          Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_smax, types), args);
+//          registerResult(result);
+//          break;
+//      }
+//      case ISD::UMAX: {
+//          Value *op1 = getNextOperand();
+//          Value *op2 = getNextOperand();
+//          std::vector<Value*> args;
+//          args.push_back(op1);
+//          args.push_back(op2);
+//
+//          std::vector<Type*> types;
+//          types.push_back(op1->getType());
+//
+//          Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_umax, types), args);
+//          registerResult(result);
+//          break;
+//      }
+      default:
     llvm_unreachable(
         ("Unknown opcode found in semantics: " + utostr(Opcode)).c_str());
   }
diff --git a/lib/DC/DCRegisterSema.cpp b/lib/DC/DCRegisterSema.cpp
index d19bb69..9299e8a 100644
--- a/lib/DC/DCRegisterSema.cpp
+++ b/lib/DC/DCRegisterSema.cpp
@@ -18,6 +18,8 @@
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
 #include <dlfcn.h>
+#include <llvm/Target/TargetRegisterInfo.h>
+
 using namespace llvm;
 
 #define DEBUG_TYPE "dc-regsema"
@@ -113,8 +115,13 @@ void DCRegisterSema::saveAllLocalRegs(BasicBlock *BB, BasicBlock::iterator IP) {
   DCIRBuilder LocalBuilder(BB, IP);
 
   for (unsigned RI = 1, RE = getNumRegs(); RI != RE; ++RI) {
-    if (!RegAllocas[RI])
-      continue;
+    if (!RegAllocas[RI]) {
+      if (RI >= 199 && RI <= 207) {
+          createLocalValueForReg(RI);
+      } else {
+          continue;
+      }
+    }
     int OffsetInSet = RegOffsetsInSet[RI];
     if (OffsetInSet != -1)
       LocalBuilder.CreateStore(LocalBuilder.CreateLoad(RegAllocas[RI]),
@@ -127,8 +134,13 @@ void DCRegisterSema::restoreLocalRegs(BasicBlock *BB, BasicBlock::iterator IP) {
   Builder->SetInsertPoint(BB, IP);
 
   for (unsigned RI = 1, RE = getNumRegs(); RI != RE; ++RI) {
-    if (!RegAllocas[RI])
-      continue;
+      if (!RegAllocas[RI]) {
+        if (RI >= 199 && RI <= 207) {
+            createLocalValueForReg(RI);
+        } else {
+            continue;
+        }
+    }
     int OffsetInSet = RegOffsetsInSet[RI];
     if (OffsetInSet != -1)
       setReg(RI, Builder->CreateLoad(RegPtrs[RI]));
diff --git a/lib/DC/DCTranslator.cpp b/lib/DC/DCTranslator.cpp
index a3cc445..809e937 100644
--- a/lib/DC/DCTranslator.cpp
+++ b/lib/DC/DCTranslator.cpp
@@ -23,8 +23,147 @@
 #include "llvm/Transforms/Utils/Cloning.h"
 #include <algorithm>
 #include <vector>
+#include <sstream>
+
+namespace llvm {
+class NonVolatileRegistersPass : public FunctionPass {
+    public:
+        static char ID;
+
+        NonVolatileRegistersPass() : FunctionPass(ID) { };
+
+        virtual bool runOnFunction(Function &F);
+
+    private:
+        bool hasCall(const BasicBlock &BB);
+        bool isNonVolatile(uint64_t Idx);
+        bool isStack(uint64_t Idx);
+        void replaceLoaded(Instruction *StoreInst);
+    };
+}
+
 using namespace llvm;
 
+char NonVolatileRegistersPass::ID = 0;
+
+bool NonVolatileRegistersPass::runOnFunction(Function &F) {
+
+        if (F.isDeclaration() || F.isIntrinsic()) {
+            return false;
+        }
+        std::set<Value *> NonVolatileAndStackPointers;
+        std::set<Value *> NonVolatilePointers;
+
+        BasicBlock &Entry = F.getEntryBlock();
+        for (BasicBlock::iterator I_it = Entry.begin(); I_it != Entry.end(); ++I_it) {
+            if (I_it->getOpcode() == Instruction::GetElementPtr) {
+                if (ConstantInt *ConstIdx = dyn_cast<ConstantInt>(I_it->getOperand(2))) {
+                    if (isNonVolatile(ConstIdx->getZExtValue())) {
+                        NonVolatileAndStackPointers.insert(&*I_it);
+                        NonVolatilePointers.insert(&*I_it);
+                    } else if (isStack(ConstIdx->getZExtValue())) {
+                        NonVolatileAndStackPointers.insert(&*I_it);
+                    }
+                }
+            }
+        }
+
+        for (Function::iterator BB_it = F.begin(); BB_it != F.end(); ++BB_it) {
+            if (!hasCall(*BB_it))
+                continue;
+            for (BasicBlock::iterator I_it = BB_it->begin(); I_it != BB_it->end(); ++I_it) {
+                if (I_it->getOpcode() == Instruction::Store) {
+                    std::set<Value *>::iterator S_it = NonVolatileAndStackPointers.find(I_it->getOperand(1));
+                    if (S_it != NonVolatileAndStackPointers.end()) {
+                        replaceLoaded(&*I_it);
+                    }
+                }
+            }
+        }
+
+        std::set<Instruction*> toRemove;
+
+        for (auto &ptr : NonVolatilePointers) {
+
+            for (auto ptrUser : ptr->users()) {
+                if (StoreInst *storeInst = dyn_cast<StoreInst>(ptrUser)) {
+                    toRemove.insert(storeInst);
+                }
+            }
+        }
+
+        for (auto &r : toRemove) {
+            r->dropAllReferences();
+            r->removeFromParent();
+//                r->dump();
+        }
+        return true;
+}
+
+bool NonVolatileRegistersPass::hasCall(const BasicBlock &BB) {
+    for (BasicBlock::const_iterator I_it = BB.begin(); I_it != BB.end(); ++I_it) {
+        if (I_it->getOpcode() == Instruction::Call) {
+            return true;
+        }
+    }
+    return false;
+}
+
+bool NonVolatileRegistersPass::isNonVolatile(uint64_t Idx) {
+    switch (Idx) {
+        default:
+            break;
+        case 24:
+        case 25:
+        case 26:
+        case 27:
+        case 28:
+        case 29:
+        case 30:
+        case 31:
+        case 32:
+        case 33:
+            return true;
+    }
+    return false;
+}
+
+bool NonVolatileRegistersPass::isStack(uint64_t Idx) {
+    switch (Idx) {
+        default:
+            break;
+        case 3:
+        case 0:
+            return true;
+    }
+    return false;
+}
+
+void NonVolatileRegistersPass::replaceLoaded(Instruction *StoreInst) {
+    Value *Ptr = StoreInst->getOperand(1);
+    Value *V = StoreInst->getOperand(0);
+    if (!V)
+        StoreInst->dump();
+    assert(V);
+
+    BasicBlock *BB = StoreInst->getParent();
+    Instruction *Load = nullptr;
+    for (BasicBlock::iterator I_it = BB->begin(); I_it != BB->end(); ++I_it) {
+        if (I_it->getOpcode() == Instruction::Load && I_it->getOperand(0) == Ptr) {
+            Load = &*I_it;
+        }
+    }
+
+    if (!Load)
+        return;
+
+//    for (Value::const_use_iterator U_it = Load->use_begin(); U_it != Load->use_end(); ++U_it) {
+//
+//    }
+    if (Load != V)
+        Load->replaceAllUsesWith(V);
+}
+
 #define DEBUG_TYPE "dctranslator"
 
 DCTranslator::DCTranslator(LLVMContext &Ctx, const DataLayout &DL,
@@ -52,8 +191,16 @@ Module *DCTranslator::finalizeTranslationModule() {
   CurrentModule->setDataLayout(DL);
 
   CurrentFPM.reset(new legacy::FunctionPassManager(CurrentModule));
-  if (OptLevel >= TransOpt::Less)
-    CurrentFPM->add(createPromoteMemoryToRegisterPass());
+
+  if (OptLevel >= TransOpt::Less) {
+    CurrentFPM->add(new NonVolatileRegistersPass());
+    CurrentFPM->add(createInstructionCombiningPass());
+    CurrentFPM->add(createSROAPass());
+//    CurrentFPM->add(createCFGSimplificationPass());
+//    CurrentFPM->add(createConstantPropagationPass());
+
+//    CurrentFPM->add(createPromoteMemoryToRegisterPass());
+  }
   if (OptLevel >= TransOpt::Default)
     CurrentFPM->add(createDeadCodeEliminationPass());
   if (OptLevel >= TransOpt::Aggressive)
@@ -65,8 +212,17 @@ Module *DCTranslator::finalizeTranslationModule() {
 
 void DCTranslator::translateAllKnownFunctions() {
   MCObjectDisassembler::AddressSetTy DummyTailCallTargets;
-  for (const auto &F : MCM.funcs())
-    translateFunction(&*F, DummyTailCallTargets);
+  for (const auto &F : MCM.funcs()) {
+//      if (F->getName() != "fn_100ADE014")
+//          continue;
+    //  StringRef FAddress = F->getName().substr(3);
+    //  uint64_t address = 0;
+    //  FAddress.getAsInteger<uint64_t>(16, address);
+    //  if (address && address < 0x100BC2AE4) {
+    //      continue;
+    //  }
+      translateFunction(&*F, DummyTailCallTargets);
+  }
 }
 
 DCTranslator::~DCTranslator() {}
@@ -99,8 +255,7 @@ Function *DCTranslator::translateRecursivelyAt(uint64_t Addr) {
     }
 
     MCObjectDisassembler::AddressSetTy CallTargets, TailCallTargets;
-    MCFunction *MCFN =
-        MCOD->createFunction(&MCM, Addr, CallTargets, TailCallTargets);
+    MCFunction *MCFN = MCOD->createFunction(&MCM, Addr, CallTargets, TailCallTargets);
 
     // If the function is empty, it is the declaration of an external function.
     if (MCFN->empty()) {
diff --git a/lib/MC/MCAnalysis/MCObjectDisassembler.cpp b/lib/MC/MCAnalysis/MCObjectDisassembler.cpp
index a0f1699..725cc75 100644
--- a/lib/MC/MCAnalysis/MCObjectDisassembler.cpp
+++ b/lib/MC/MCAnalysis/MCObjectDisassembler.cpp
@@ -27,6 +27,7 @@
 #include "llvm/Support/MachO.h"
 #include "llvm/Support/PrettyStackTrace.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/LEB128.h"
 #include <map>
 
 using namespace llvm;
@@ -37,10 +38,47 @@ using namespace object;
 MCObjectDisassembler::MCObjectDisassembler(const ObjectFile &Obj,
                                            const MCDisassembler &Dis,
                                            const MCInstrAnalysis &MIA)
-    : Obj(Obj), Dis(Dis), MIA(MIA), MOS(nullptr) {}
+    : Obj(Obj), Dis(Dis), MIA(MIA), MOS(nullptr), Stripped(true) {
+    if (const object::MachOObjectFile *MachO = dyn_cast<object::MachOObjectFile>(&Obj)) {
+        ObjCFile = std::unique_ptr<ObjectiveCFile>(new ObjectiveCFile((object::MachOObjectFile*)MachO));
+    }
+}
 
 const MCObjectDisassembler::MemoryRegion &
 MCObjectDisassembler::getRegionFor(uint64_t Addr) {
+    if (Stripped) {
+        for (std::vector<MemoryRegion>::iterator it = SectionRegions.begin(); it != SectionRegions.end(); ++it) {
+            if (Addr >= it->Addr && Addr < (it->Addr + it->Bytes.size())) {
+                uint64_t Next = 0;
+                for (unsigned i = 0; i < FunctionStarts.size(); ++i) {
+                    if (FunctionStarts[i] <= Addr && FunctionStarts[i + 1] > Addr) {
+                        Next = FunctionStarts[i + 1];
+                        break;
+                    }
+                }
+                if (Next) {
+                    ArrayRef<uint8_t> data = it->Bytes.slice(Addr - it->Addr, Next - Addr);
+//                auto Region = std::make_shared<MemoryRegion>(Addr, data);
+                    //FIXME: What about releasing??????!!!!!!
+                    MemoryRegion *Region = new MemoryRegion(Addr, data);
+                    return *Region;
+                } else {
+//                    ArrayRef<uint8_t> data = it->Bytes.slice(Addr - it->Addr);
+//                    MemoryRegion *Region = new MemoryRegion(Addr, data);
+//                    return *Region;
+                    auto Region =
+                            std::lower_bound(SectionRegions.begin(), SectionRegions.end(), Addr,
+                                             [](const MemoryRegion &L, uint64_t Addr) {
+                                                 return L.Addr + L.Bytes.size() <= Addr;
+                                             });
+                    if (Region != SectionRegions.end())
+                    if (Region->Addr <= Addr)
+                        return *Region;
+                }
+            }
+        }
+        return FallbackRegion;
+    }
   auto Region =
       std::lower_bound(SectionRegions.begin(), SectionRegions.end(), Addr,
                        [](const MemoryRegion &L, uint64_t Addr) {
@@ -62,6 +100,9 @@ MCModule *MCObjectDisassembler::buildModule() {
 
   if (SectionRegions.empty()) {
     for (const SectionRef &Section : Obj.sections()) {
+        StringRef SectionName;
+        Section.getName(SectionName);
+        errs() << "Section: " << SectionName << "\n";
       bool isText = Section.isText();
       uint64_t StartAddr = Section.getAddress();
       uint64_t SecSize = Section.getSize();
@@ -116,20 +157,40 @@ void MCObjectDisassembler::buildCFG(MCModule *Module) {
   AddressSetTy CallTargets;
   AddressSetTy TailCallTargets;
 
-  for (const SymbolRef &Symbol : Obj.symbols()) {
-    SymbolRef::Type SymType = Symbol.getType();
-    if (SymType == SymbolRef::ST_Function) {
-      ErrorOr<uint64_t> SymAddrOrErr = Symbol.getAddress();
-      if (SymAddrOrErr.getError())
-        continue;
-      uint64_t SymAddr = *SymAddrOrErr;
-      if (MOS)
-        SymAddr = MOS->getEffectiveLoadAddr(SymAddr);
-      if (getRegionFor(SymAddr).Bytes.empty())
-        continue;
-      createFunction(Module, SymAddr, CallTargets, TailCallTargets);
+    bool S = true;
+    Stripped = false;
+
+//  for (const SymbolRef &Symbol : Obj.symbols()) {
+//    SymbolRef::Type SymType = Symbol.getType();
+//    DEBUG(errs() << Symbol.getName().get() << "\n");
+//    if (SymType == SymbolRef::ST_Function) {
+//      ErrorOr<uint64_t> SymAddrOrErr = Symbol.getAddress();
+//      if (SymAddrOrErr.getError())
+//        continue;
+//      uint64_t SymAddr = *SymAddrOrErr;
+//      if (MOS)
+//        SymAddr = MOS->getEffectiveLoadAddr(SymAddr);
+//      if (getRegionFor(SymAddr).Bytes.empty())
+//        continue;
+//      createFunction(Module, SymAddr, CallTargets, TailCallTargets);
+//      S = false;
+//    }
+//  }
+
+    Stripped = S;
+
+    if (Stripped) {
+        FunctionStarts = findFunctionStarts();
+        RemoveDupsFromAddressVector(FunctionStarts);
+
+        for (AddressSetTy::iterator it = FunctionStarts.begin(); it != FunctionStarts.end(); ++it) {
+        //FIXME: remove this
+//            if (*it < 0x100D5B894   ) {
+//                continue;
+//            }
+            createFunction(Module, *it, CallTargets, TailCallTargets);
+        }
     }
-  }
 
   RemoveDupsFromAddressVector(CallTargets);
   RemoveDupsFromAddressVector(TailCallTargets);
@@ -191,6 +252,20 @@ void MCObjectDisassembler::disassembleFunctionAt(
 
   DEBUG(dbgs() << "Starting CFG at " << utohexstr(BBBeginAddr) << "\n");
 
+    AddressSetTy::iterator startIt = std::find(FunctionStarts.begin(), FunctionStarts.end(), BBBeginAddr);
+    if (startIt == FunctionStarts.end()) {
+        llvm_unreachable("");
+    }
+    AddressSetTy::iterator endIt = startIt;
+    std::advance(endIt, 1);
+
+    uint64_t startAddr = *startIt;
+    uint64_t endAddr = (endIt == FunctionStarts.end()) ? INT64_MAX : *endIt;
+
+    if (BBBeginAddr == 0x10001BBF4) {
+        assert(true);
+    }
+
   Worklist.insert(BBBeginAddr);
   for (size_t wi = 0; wi < Worklist.size(); ++wi) {
     const uint64_t BeginAddr = Worklist[wi];
@@ -283,27 +358,85 @@ void MCObjectDisassembler::disassembleFunctionAt(
       uint64_t InstSize;
 
       for (uint64_t Addr = BeginAddr; Addr < EndAddr; Addr += InstSize) {
+
         MCInst Inst;
         if (Dis.getInstruction(Inst, InstSize,
                                Region.Bytes.slice(Addr - Region.Addr), Addr,
                                nulls(), nulls())) {
-          AddInst(Inst, Addr, InstSize);
+
         } else {
           DEBUG(dbgs() << "Failed disassembly at " << utohexstr(Addr) << "!\n");
           break;
         }
 
         uint64_t BranchTarget;
+          bool isTailcall = false;
+          bool lastInst = false;
+
+          if (Addr == 4297609936) {
+              isTailcall = false;
+          }
+
+          if (MIA.evaluateBranch(Inst, Addr, InstSize, BranchTarget) && (startAddr <= Addr && Addr <= endAddr)) {
+              if (!MIA.isCall(Inst)) {
+                  if (BranchTarget && !(startAddr <= BranchTarget && BranchTarget <= endAddr)) {
+                      bool isDefined = false;
+                      for (AddressSetTy::iterator startIt = FunctionStarts.begin(); startIt != FunctionStarts.end(); ++startIt) {
+                          AddressSetTy::iterator endIt = startIt;
+                          std::advance(endIt, 1);
+                          if (endIt == FunctionStarts.end())
+                              continue;
+                          if ((*startIt) <= BranchTarget && BranchTarget <= (*endIt)) {
+                              isDefined = true;
+                              break;
+                          }
+                      }
+                      if (isDefined && Inst.getOpcode() == 104) {
+                          isTailcall = true;
+                      }
+
+                  }
+              }
+          }
+
+          if (isTailcall) {
+              Inst.setOpcode(125);
+          }
+
+          AddInst(Inst, Addr, InstSize);
+
+          if (isTailcall) {
+              MCInst retInst;
+              MCOperand retOp;
+              retOp.createReg(2);
+              retInst.setOpcode(1343);
+              AddInst(retInst, Addr + InstSize, 4);
+
+              if ((Addr + InstSize) == endAddr) {
+                  lastInst = true;
+              } else {
+                  lastInst = true;
+              }
+          }
+        if (Inst.getOpcode() == 1343) {
+            assert(true);
+        }
+
         if (MIA.evaluateBranch(Inst, Addr, InstSize, BranchTarget)) {
           DEBUG(dbgs() << "Found branch to " << utohexstr(BranchTarget)
                        << "!\n");
           if (MIA.isCall(Inst)) {
             DEBUG(dbgs() << "Found call!\n");
             CallTargets.push_back(BranchTarget);
+          } else {
+              if (checkBranch(Inst, BranchTarget)) {
+//                  Inst.setOpcode(125);
+//                  CallTargets.push_back(BranchTarget);
+              }
           }
         }
 
-        if (MIA.isTerminator(Inst)) {
+        if (MIA.isTerminator(Inst) || lastInst) {
           DEBUG(dbgs() << "Found terminator!\n");
           // Now we have a complete basic block, add successors.
 
@@ -312,7 +445,6 @@ void MCObjectDisassembler::disassembleFunctionAt(
             BBI.SuccAddrs.push_back(Addr + InstSize);
             Worklist.insert(Addr + InstSize);
           }
-
           // If the terminator is a branch, add the target block.
           if (MIA.isBranch(Inst)) {
             uint64_t BranchTarget;
@@ -387,3 +519,60 @@ MCObjectDisassembler::createFunction(MCModule *Module, uint64_t BeginAddr,
   disassembleFunctionAt(Module, MCFN, BeginAddr, CallTargets, TailCallTargets);
   return MCFN;
 }
+
+llvm::MCObjectDisassembler::AddressSetTy MCObjectDisassembler::findFunctionStarts() {
+    AddressSetTy Starts;
+
+    MachOObjectFile *MachO = dyn_cast<MachOObjectFile>((ObjectFile*)&Obj);
+
+    assert(MachO && "Handling Stripped Binaries is only handled for Mach-O");
+
+    MachOObjectFile::load_command_iterator Load_it = MachO->begin_load_commands();
+    MachOObjectFile::load_command_iterator Load_it_end = MachO->end_load_commands();
+    for(; Load_it != Load_it_end; ++Load_it) {
+        if (Load_it->C.cmd == MachO::LC_FUNCTION_STARTS) {
+            uint32_t *Cmd_ptr = (uint32_t*) Load_it->Ptr;
+            uint32_t Offset = Cmd_ptr[2];
+            uint32_t Size = Cmd_ptr[3];
+            MachO::linkedit_data_command c = MachO->getLinkeditDataLoadCommand(*Load_it);
+            errs() << c.dataoff << "\n" << c.datasize << "\n";
+            StringRef FunctionStarts = MachO->getData().slice(Offset, Offset + Size);
+//            MemoryBuffer buffer = MemoryBuffer::getMemBuffer(FunctionStarts);
+            uint64_t LastFunctionStart = 0x0;
+            for (unsigned i = 0; i < Size;) {
+                unsigned n = 0;
+                char *p = (char*) &FunctionStarts.data()[i];
+                uint64_t V = decodeULEB128((uint8_t*)p, &n);
+                assert(n);
+                LastFunctionStart += V;
+                Starts.push_back(LastFunctionStart | 0x100000000);
+                i += n;
+            }
+        }
+    }
+
+//    for (auto &f : Starts) {
+//        errs() << utohexstr(f) << "\n";
+//    }
+
+    std::sort(Starts.begin(), Starts.end());
+
+    return Starts;
+}
+
+bool MCObjectDisassembler::checkBranch(MCInst &Inst, uint64_t Target) {
+    if (!ObjCFile)
+        return false;
+    std::string FunctionName = ObjCFile->getFunctionName(Target);
+    for (object::section_iterator S_it = Obj.section_begin(); S_it != Obj.section_end(); ++S_it) {
+        StringRef SectionName;
+        if (!S_it->getName(SectionName)) {
+            if (SectionName == "__stubs") {
+                if (S_it->getAddress() <= Target && Target < (S_it->getAddress() + S_it->getSize())) {
+                    return true;
+                }
+            }
+        }
+    }
+    return false;
+}
diff --git a/lib/Object/CMakeLists.txt b/lib/Object/CMakeLists.txt
index 8f10143..aceb627 100644
--- a/lib/Object/CMakeLists.txt
+++ b/lib/Object/CMakeLists.txt
@@ -13,6 +13,7 @@ add_llvm_library(LLVMObject
   MachOUniversal.cpp
   Object.cpp
   ObjectFile.cpp
+  ObjectiveCFile.cpp
   RecordStreamer.cpp
   SymbolicFile.cpp
   SymbolSize.cpp
diff --git a/lib/Object/ObjectiveCFile.cpp b/lib/Object/ObjectiveCFile.cpp
new file mode 100644
index 0000000..d60a521
--- /dev/null
+++ b/lib/Object/ObjectiveCFile.cpp
@@ -0,0 +1,297 @@
+#include <llvm/ADT/StringExtras.h>
+#include <llvm/Object/ObjectiveCFile.h>
+#include "llvm/Object/ObjectiveCFile.h"
+#include "llvm/Support/raw_os_ostream.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/LEB128.h"
+
+using namespace llvm;
+using namespace object;
+
+
+void ObjectiveCFile::resolveMethods() {
+    for(section_iterator S_it = MachO->section_begin(); S_it != MachO->section_end(); ++S_it){
+        StringRef SectionName;
+        S_it->getName(SectionName);
+        if (SectionName == "__objc_classlist") {
+            ObjcClasslistAddress = S_it->getAddress();
+            StringRef ObjcClasslistContent;
+            S_it->getContents(ObjcClasslistContent);
+            ObjcClasslistData = ArrayRef<uint8_t>((uint8_t*)ObjcClasslistContent.data(), ObjcClasslistContent.size());
+        } else if (SectionName == "__objc_data") {
+            ObjcDataAddress = S_it->getAddress();
+            StringRef ObjcDataContent;
+            S_it->getContents(ObjcDataContent);
+            ObjcDataData = ArrayRef<uint8_t>((uint8_t*)ObjcDataContent.data(), ObjcDataContent.size());
+        } else if (SectionName == "__objc_const") {
+            ObjcConstAddress = S_it->getAddress();
+            StringRef ObjcConstContent;
+            S_it->getContents(ObjcConstContent);
+            ObjcConstData = ArrayRef<uint8_t>((uint8_t*)ObjcConstContent.data(), ObjcConstContent.size());
+        } else if (SectionName == "__objc_classname") {
+            ObjcClassnamesAddress = S_it->getAddress();
+            StringRef ObjcClassnamesContent;
+            S_it->getContents(ObjcClassnamesContent);
+            ObjcClassnamesData = ArrayRef<uint8_t>((uint8_t*)ObjcClassnamesContent.data(), ObjcClassnamesContent.size());
+        } else if (SectionName == "__objc_methname") {
+            ObjcMethodnamesAddress = S_it->getAddress();
+            StringRef ObjcMethodnamesContent;
+            S_it->getContents(ObjcMethodnamesContent);
+            ObjcMethodnamesData = ArrayRef<uint8_t>((uint8_t*)ObjcMethodnamesContent.data(), ObjcMethodnamesContent.size());
+        } else if (SectionName == "__objc_catlist") {
+            ObjcCatlistAddress = S_it->getAddress();
+            StringRef ObjcCatlistContent;
+            S_it->getContents(ObjcCatlistContent);
+            ObjcCatlistData = ArrayRef<uint8_t>((uint8_t*)ObjcCatlistContent.data(), ObjcCatlistContent.size());
+        }
+    }
+
+    if (!(ObjcClasslistAddress && ObjcClasslistData.size())) {
+        return;
+    }
+
+    assert(ObjcClasslistAddress && ObjcClasslistData.size());
+    assert(ObjcDataAddress && ObjcDataData.size());
+    assert(ObjcConstAddress && ObjcConstData.size());
+    assert(ObjcClassnamesAddress && ObjcClassnamesData.size());
+    assert(ObjcMethodnamesAddress && ObjcMethodnamesData.size());
+    assert(ObjcCatlistAddress && ObjcCatlistData.size());
+
+    for (unsigned ClasslistIdx = 0; ClasslistIdx < ObjcClasslistData.size(); ClasslistIdx += sizeof(uint64_t)) {
+        uint64_t ClassRef = *((uint64_t*)ObjcClasslistData.slice(ClasslistIdx).data());
+
+        assert(ObjcDataAddress <= ClassRef && ClassRef <= ObjcDataAddress + ObjcDataData.size());
+
+        ObjcDataStruct_t *ClassData = (ObjcDataStruct_t*)ObjcDataData.slice(ClassRef - ObjcDataAddress).data();
+
+
+        assert(ObjcConstAddress <= ClassData->Data && ClassData->Data <= ObjcConstAddress + ObjcConstData.size());
+
+        ObjcClassInfoStruct_t *ClassInfo = (ObjcClassInfoStruct_t*)ObjcConstData.slice(ClassData->Data - ObjcConstAddress).data();
+        resolveMethods(ClassInfo, false);
+
+        if (ClassData->ISA) {
+            ObjcDataStruct_t *ISAData = (ObjcDataStruct_t *) ObjcDataData.slice(ClassData->ISA - ObjcDataAddress).data();
+            errs() << "ISA: " << utohexstr(ISAData->ISA) << "\n";
+
+            ObjcClassInfoStruct_t *ISAClassInfo = (ObjcClassInfoStruct_t*)ObjcConstData.slice(ISAData->Data - ObjcConstAddress).data();
+            errs() << utohexstr(ISAClassInfo->BaseMethods) << "\n";
+            errs() << getClassName(ObjcClassnamesData, ObjcClassnamesAddress, ISAClassInfo->Name) << "\n";
+            resolveMethods(ISAClassInfo, true);
+        }
+    }
+
+    for (unsigned CatlistIdx = 0; CatlistIdx < ObjcCatlistData.size(); CatlistIdx += sizeof(uint64_t)) {
+        uint64_t CatRef = *((uint64_t*)ObjcCatlistData.slice(CatlistIdx).data());
+
+        assert(ObjcConstAddress <= CatRef && CatRef <= ObjcConstAddress + ObjcConstData.size());
+
+        ObjcCatInfoStruct_t *catInfo = (ObjcCatInfoStruct_t*)ObjcConstData.slice(CatRef - ObjcConstAddress).data();
+        ObjcDataStruct_t *ClassData = nullptr;
+        ObjcClassInfoStruct_t *ClassInfo = nullptr;
+        if (catInfo->Class) {
+            ClassData = (ObjcDataStruct_t *) ObjcDataData.slice(catInfo->Class - ObjcDataAddress).data();
+            ClassInfo = (ObjcClassInfoStruct_t*)ObjcConstData.slice(ClassData->Data - ObjcConstAddress).data();
+        }
+        resolveMethods(catInfo, true, CatRef, ClassInfo);
+    }
+}
+
+
+StringRef ObjectiveCFile::getClassName(ArrayRef<uint8_t> &ObjcClassnames, uint64_t ObjcClassNamesAddress,
+                                         uint64_t Address) {
+    assert(ObjcClassNamesAddress <= Address && Address <= ObjcClassNamesAddress + ObjcClassnames.size());
+    StringRef s((char*)ObjcClassnames.slice(Address - ObjcClassNamesAddress).data());
+    return s;
+}
+
+StringRef ObjectiveCFile::getMethodName(ArrayRef<uint8_t> &ObjcMethodnames, uint64_t ObjcMethodnamesAddress,
+                                          uint64_t Address) {
+    assert(ObjcMethodnamesAddress <= Address && Address <= ObjcMethodnamesAddress + ObjcMethodnames.size());
+    StringRef s((char*)ObjcMethodnames.slice(Address - ObjcMethodnamesAddress).data());
+    return s;
+}
+
+void ObjectiveCFile::resolveMethods(ObjcClassInfoStruct_t *ClassInfo, bool ClassMethods) {
+    if (!ClassInfo->BaseMethods){
+        return;
+    }
+    StringRef ClassName = getClassName(ObjcClassnamesData, ObjcClassnamesAddress, ClassInfo->Name);
+    if (ClassName == "LastPassModel") {
+        assert(true);
+    }
+    ObjcMethodListHeader_t *MethodlistHeader = (ObjcMethodListHeader_t*)ObjcConstData.slice(ClassInfo->BaseMethods - ObjcConstAddress).data();
+    ObjcMethodListEntry_t *MethodlistEntry = (ObjcMethodListEntry_t*)ObjcConstData.slice(ClassInfo->BaseMethods - ObjcConstAddress + sizeof(ObjcMethodListHeader_t)).data();
+    for (unsigned MethodIdx = 0; MethodIdx < MethodlistHeader->Count; ++MethodIdx) {
+        if (!MethodlistEntry[MethodIdx].Implementation)
+            continue;
+        StringRef Methodname = getMethodName(ObjcMethodnamesData, ObjcMethodnamesAddress, MethodlistEntry[MethodIdx].Name);
+        if (Methodname == "notifyInAppPurchasingEnabledChanged") {
+            assert(true);
+        }
+        std::string N = ((ClassMethods ? "+[" : "-[") + ClassName + " " + Methodname + "]").str();
+        errs() << utohexstr(MethodlistEntry[MethodIdx].Implementation) << ": " << N << "\n";
+                FunctionNames.insert(std::pair<uint64_t, std::string>(MethodlistEntry[MethodIdx].Implementation, N));
+    }
+}
+
+void ObjectiveCFile::resolveMethods(ObjcCatInfoStruct_t *CatInfo, bool ClassMethods, uint64_t CatInfoAddress, ObjcClassInfoStruct_t *ClassInfo) {
+    StringRef ClassName;
+    if (CatInfoAddress == 0x1003a28d0) {
+        assert(true);
+    }
+    if (CatInfo->Class) {
+        assert(ClassInfo && ClassInfo->Name);
+        ClassName = getClassName(ObjcClassnamesData, ObjcClassnamesAddress, ClassInfo->Name);
+    } else {
+        //Pointer do function name is not set yet -> binding info
+        ClassName = getClassName(CatInfoAddress + 8);
+        if (ClassName.startswith("_OBJC_CLASS_$_")) {
+            ClassName = ClassName.substr(strlen("_OBJC_CLASS_$_"));
+        }
+    }
+
+    if (CatInfo->InstaceMethods) {
+        ObjcMethodListHeader_t *MethodlistHeader = (ObjcMethodListHeader_t *) ObjcConstData.slice(
+                CatInfo->InstaceMethods - ObjcConstAddress).data();
+        ObjcMethodListEntry_t *MethodlistEntry = (ObjcMethodListEntry_t *) ObjcConstData.slice(
+                CatInfo->InstaceMethods - ObjcConstAddress + sizeof(ObjcMethodListHeader_t)).data();
+        for (unsigned MethodIdx = 0; MethodIdx < MethodlistHeader->Count; ++MethodIdx) {
+            if (!MethodlistEntry[MethodIdx].Implementation)
+                continue;
+            StringRef Methodname = getMethodName(ObjcMethodnamesData, ObjcMethodnamesAddress,
+                                                 MethodlistEntry[MethodIdx].Name);
+            StringRef N = ("-[" + ClassName + " " + Methodname + "]").str();
+            errs() << utohexstr(MethodlistEntry[MethodIdx].Implementation) << ": " << N << "\n";
+            FunctionNames.insert(std::pair<uint64_t, std::string>(MethodlistEntry[MethodIdx].Implementation, N.str()));
+        }
+    }
+
+    if (CatInfo->ClassMethods) {
+        ObjcMethodListHeader_t *MethodlistHeader = (ObjcMethodListHeader_t *) ObjcConstData.slice(
+                CatInfo->ClassMethods - ObjcConstAddress).data();
+        ObjcMethodListEntry_t *MethodlistEntry = (ObjcMethodListEntry_t *) ObjcConstData.slice(
+                CatInfo->ClassMethods - ObjcConstAddress + sizeof(ObjcMethodListHeader_t)).data();
+        for (unsigned MethodIdx = 0; MethodIdx < MethodlistHeader->Count; ++MethodIdx) {
+            if (!MethodlistEntry[MethodIdx].Implementation)
+                continue;
+            StringRef Methodname = getMethodName(ObjcMethodnamesData, ObjcMethodnamesAddress,
+                                                 MethodlistEntry[MethodIdx].Name);
+            StringRef N = ("+[" + ClassName + " " + Methodname + "]").str();
+            errs() << utohexstr(MethodlistEntry[MethodIdx].Implementation) << ": " << N << "\n";
+            FunctionNames.insert(std::pair<uint64_t, std::string>(MethodlistEntry[MethodIdx].Implementation, N.str()));
+        }
+    }
+}
+
+StringRef ObjectiveCFile::getClassName(uint64_t Pointer) {
+    ArrayRef<uint8_t> BindOpcodes = MachO->getDyldInfoBindOpcodes();
+
+    uint64_t SegmentNo = 0;
+    int64_t Offset = 0;
+    StringRef SymbolName;
+
+    for (unsigned Idx = 0; Idx < BindOpcodes.size();) {
+        if (Idx == 283) {
+            assert(true);
+        }
+        unsigned Opcode = *BindOpcodes.slice(Idx).data();
+
+        if ((Opcode & ~0xF) == MachO::BIND_OPCODE_SET_DYLIB_ORDINAL_IMM) {
+            unsigned Imm = Opcode & 0xF;
+            Idx++;
+        } else if ((Opcode & ~0xF) == MachO::BIND_OPCODE_SET_SYMBOL_TRAILING_FLAGS_IMM) {
+            Idx++;
+            SymbolName = (const char*)BindOpcodes.slice(Idx).data();
+            Idx += SymbolName.size() + 1;
+        } else if (Opcode == (MachO::BIND_OPCODE_SET_TYPE_IMM | 0x1)) {
+            //Set type pointer
+            Idx++;
+        } else if ((Opcode & ~0xF) == MachO::BIND_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB) {
+            SegmentNo = Opcode & 0xF;
+            Idx++;
+            unsigned n;
+            Offset = decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+            Idx += n;
+        } else if (Opcode == MachO::BIND_OPCODE_DO_BIND) {
+            MachO::segment_command_64 Segment = getSegment(SegmentNo);
+            if (Segment.vmaddr + Offset == Pointer) {
+                return SymbolName;
+            }
+            //FIXME: is this add correct???
+            Offset += 8;
+            Idx++;
+        } else if (Opcode == MachO::BIND_OPCODE_ADD_ADDR_ULEB) {
+            Idx++;
+            unsigned n;
+            Offset += decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+            Idx += n;
+        } else if ((Opcode & ~0xF) == MachO::BIND_OPCODE_DO_BIND_ADD_ADDR_IMM_SCALED) {
+            unsigned Scaled = (Opcode & 0xF) * 8;
+            if (getSegment(SegmentNo).vmaddr + Offset == Pointer) {
+                return SymbolName;
+            }
+//            addClass(SymbolName, getSegment(SegmentNo).vmaddr + Offset);
+            //FIXME: again the add of 8
+            Offset += Scaled + 8;
+            Idx++;
+        } else if (Opcode == MachO::BIND_OPCODE_DO_BIND_ULEB_TIMES_SKIPPING_ULEB) {
+            //TODO:
+            Idx++;
+            unsigned n;
+            uint64_t Count = decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+            Idx += n;
+            n = 0;
+            uint64_t Skip = decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+            for (unsigned i = 0; i < Count; ++i) {
+//                addClass(SymbolName, getSegment(SegmentNo).vmaddr + Offset);
+                if (getSegment(SegmentNo).vmaddr + Offset == Pointer) {
+                    return SymbolName;
+                }
+                Offset += 8 + Skip;
+            }
+            Idx += n;
+        } else if (Opcode == MachO::BIND_OPCODE_DO_BIND_ADD_ADDR_ULEB) {
+//            addClass(SymbolName, getSegment(SegmentNo).vmaddr + Offset);
+            if (getSegment(SegmentNo).vmaddr + Offset == Pointer) {
+                return SymbolName;
+            }
+            Idx++;
+            unsigned n;
+            Offset += decodeULEB128(BindOpcodes.slice(Idx).data(), &n) + 8;
+            Idx += n;
+        } else if (Opcode == MachO::BIND_OPCODE_DONE) {
+            break;
+        } else if (Opcode == MachO::BIND_OPCODE_SET_DYLIB_ORDINAL_ULEB) {
+            Idx++;
+            unsigned n;
+            uint64_t dylib = decodeULEB128(BindOpcodes.slice(Idx).data(), &n) + 8;
+            Idx += n;
+        } else if (Opcode == MachO::BIND_OPCODE_SET_ADDEND_SLEB) {
+            Idx++;
+            unsigned n;
+            uint64_t addend = decodeSLEB128(BindOpcodes.slice(Idx).data(), &n);
+            Idx += n;
+        } else {
+            errs() << "0X" << utohexstr(Idx) << "\n";
+            errs() << "0x" << utohexstr(Opcode) << "\n";
+            assert(false);
+        }
+    }
+    llvm_unreachable("");
+}
+
+MachO::segment_command_64 ObjectiveCFile::getSegment(uint64_t SegmentNo) {
+    uint64_t Idx = 0;
+    for(object::MachOObjectFile::load_command_iterator L_it = MachO->begin_load_commands();
+        L_it != MachO->end_load_commands(); ++L_it) {
+        if (L_it->C.cmd == MachO::LC_SEGMENT_64) {
+            if (Idx == SegmentNo) {
+                return MachO->getSegment64LoadCommand(*L_it);
+            } else {
+                Idx++;
+            }
+        }
+    }
+    llvm_unreachable("Cant find segment");
+};
diff --git a/lib/Target/AArch64/AArch64.td b/lib/Target/AArch64/AArch64.td
index d19b319f..e3c6f26 100644
--- a/lib/Target/AArch64/AArch64.td
+++ b/lib/Target/AArch64/AArch64.td
@@ -79,6 +79,14 @@ include "AArch64SchedA53.td"
 include "AArch64SchedA57.td"
 include "AArch64SchedCyclone.td"
 
+
+//===----------------------------------------------------------------------===//
+// Instruction and Register semantics
+//===----------------------------------------------------------------------===//
+
+include "AArch64Sema.td"
+
+
 def ProcA53     : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
                                    "Cortex-A53 ARM processors",
                                    [FeatureFPARMv8,
diff --git a/lib/Target/AArch64/AArch64ISelLowering.h b/lib/Target/AArch64/AArch64ISelLowering.h
index ab36578..c4552e5 100644
--- a/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/lib/Target/AArch64/AArch64ISelLowering.h
@@ -209,7 +209,9 @@ enum NodeType : unsigned {
   LD4LANEpost,
   ST2LANEpost,
   ST3LANEpost,
-  ST4LANEpost
+  ST4LANEpost,
+  AARCH_REG_EXT,
+  AARCH_BC_I64
 };
 
 } // end namespace AArch64ISD
diff --git a/lib/Target/AArch64/AArch64InstrFormats.td b/lib/Target/AArch64/AArch64InstrFormats.td
index 22e91d7..af9e102 100644
--- a/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/lib/Target/AArch64/AArch64InstrFormats.td
@@ -3247,8 +3247,8 @@ class LoadPairPostIdx<bits<2> opc, bit V, RegisterClass regtype,
 let mayStore = 1, mayLoad = 0 in
 class StorePairPostIdx<bits<2> opc, bit V, RegisterClass regtype,
                        Operand idxtype, string asm>
-    : BaseLoadStorePairPostIdx<opc, V, 0, (outs),
-                             (ins GPR64sp:$wback, regtype:$Rt, regtype:$Rt2,
+    : BaseLoadStorePairPostIdx<opc, V, 0, (outs GPR64sp:$wback),
+                             (ins regtype:$Rt, regtype:$Rt2,
                                   GPR64sp:$Rn, idxtype:$offset),
                              asm>,
       Sched<[WriteAdr, WriteSTP]>;
@@ -5419,10 +5419,10 @@ multiclass SIMDThreeScalarHS<bit U, bits<5> opc, string asm,
 multiclass SIMDThreeScalarHSTied<bit U, bit R, bits<5> opc, string asm,
                                  SDPatternOperator OpNode = null_frag> {
   def v1i32: BaseSIMDThreeScalarTied<U, 0b10, R, opc, (outs FPR32:$dst),
-                                     (ins FPR32:$Rd, FPR32:$Rn, FPR32:$Rm), 
+                                     (ins FPR32:$Rd, FPR32:$Rn, FPR32:$Rm),
                                      asm, []>;
   def v1i16: BaseSIMDThreeScalarTied<U, 0b01, R, opc, (outs FPR16:$dst),
-                                     (ins FPR16:$Rd, FPR16:$Rn, FPR16:$Rm), 
+                                     (ins FPR16:$Rd, FPR16:$Rn, FPR16:$Rm),
                                      asm, []>;
 }
 
@@ -8624,9 +8624,9 @@ multiclass SIMDLdSt4SingleAliases<string asm> {
 let Predicates = [HasNEON, HasV8_1a] in {
 
 class BaseSIMDThreeSameVectorTiedR0<bit Q, bit U, bits<2> size, bits<5> opcode,
-                                    RegisterOperand regtype, string asm, 
+                                    RegisterOperand regtype, string asm,
                                     string kind, list<dag> pattern>
-  : BaseSIMDThreeSameVectorTied<Q, U, size, opcode, regtype, asm, kind, 
+  : BaseSIMDThreeSameVectorTied<Q, U, size, opcode, regtype, asm, kind,
                                 pattern> {
   let Inst{21}=0;
 }
@@ -8636,7 +8636,7 @@ multiclass SIMDThreeSameVectorSQRDMLxHTiedHS<bit U, bits<5> opc, string asm,
     [(set (v4i16 V64:$dst),
           (Accum (v4i16 V64:$Rd),
                  (v4i16 (int_aarch64_neon_sqrdmulh (v4i16 V64:$Rn),
-                                                   (v4i16 V64:$Rm)))))]>;         
+                                                   (v4i16 V64:$Rm)))))]>;
   def v8i16 : BaseSIMDThreeSameVectorTiedR0<1, U, 0b01, opc, V128, asm, ".8h",
     [(set (v8i16 V128:$dst),
           (Accum (v8i16 V128:$Rd),
@@ -8700,28 +8700,28 @@ multiclass SIMDIndexedSQRDMLxHSDTied<bit U, bits<4> opc, string asm,
     let Inst{21} = idx{0};
   }
 
-  // FIXME: it would be nice to use the scalar (v1i32) instruction here, but 
+  // FIXME: it would be nice to use the scalar (v1i32) instruction here, but
   // an intermediate EXTRACT_SUBREG would be untyped.
-  // FIXME: direct EXTRACT_SUBREG from v2i32 to i32 is illegal, that's why we 
+  // FIXME: direct EXTRACT_SUBREG from v2i32 to i32 is illegal, that's why we
   // got it lowered here as (i32 vector_extract (v4i32 insert_subvector(..)))
   def : Pat<(i32 (Accum (i32 FPR32Op:$Rd),
-                       (i32 (vector_extract 
+                       (i32 (vector_extract
                                (v4i32 (insert_subvector
-                                       (undef), 
-                                        (v2i32 (int_aarch64_neon_sqrdmulh 
+                                       (undef),
+                                        (v2i32 (int_aarch64_neon_sqrdmulh
                                                  (v2i32 V64:$Rn),
-                                                 (v2i32 (AArch64duplane32 
+                                                 (v2i32 (AArch64duplane32
                                                           (v4i32 V128:$Rm),
                                                           VectorIndexS:$idx)))),
                                       (i32 0))),
                                (i64 0))))),
             (EXTRACT_SUBREG
                 (v2i32 (!cast<Instruction>(NAME # v2i32_indexed)
-                          (v2i32 (INSERT_SUBREG (v2i32 (IMPLICIT_DEF)), 
-                                                FPR32Op:$Rd, 
-                                                ssub)), 
+                          (v2i32 (INSERT_SUBREG (v2i32 (IMPLICIT_DEF)),
+                                                FPR32Op:$Rd,
+                                                ssub)),
                           V64:$Rn,
-                          V128:$Rm, 
+                          V128:$Rm,
                           VectorIndexS:$idx)),
                 ssub)>;
 
@@ -8742,26 +8742,26 @@ multiclass SIMDIndexedSQRDMLxHSDTied<bit U, bits<4> opc, string asm,
   // FIXME: it would be nice to use the scalar (v1i32) instruction here, but
   // an intermediate EXTRACT_SUBREG would be untyped.
   def : Pat<(i32 (Accum (i32 FPR32Op:$Rd),
-                        (i32 (vector_extract 
-                               (v4i32 (int_aarch64_neon_sqrdmulh 
+                        (i32 (vector_extract
+                               (v4i32 (int_aarch64_neon_sqrdmulh
                                         (v4i32 V128:$Rn),
-                                        (v4i32 (AArch64duplane32 
+                                        (v4i32 (AArch64duplane32
                                                  (v4i32 V128:$Rm),
                                                  VectorIndexS:$idx)))),
                                (i64 0))))),
             (EXTRACT_SUBREG
                 (v4i32 (!cast<Instruction>(NAME # v4i32_indexed)
-                         (v4i32 (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), 
-                                               FPR32Op:$Rd, 
-                                               ssub)), 
+                         (v4i32 (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)),
+                                               FPR32Op:$Rd,
+                                               ssub)),
                          V128:$Rn,
-                         V128:$Rm, 
+                         V128:$Rm,
                          VectorIndexS:$idx)),
                 ssub)>;
 
   def i16_indexed : BaseSIMDIndexedTied<1, U, 1, 0b01, opc,
                                         FPR16Op, FPR16Op, V128_lo,
-                                        VectorIndexH, asm, ".h", "", "", ".h", 
+                                        VectorIndexH, asm, ".h", "", "", ".h",
                                         []> {
     bits<3> idx;
     let Inst{11} = idx{2};
@@ -8954,12 +8954,12 @@ class BaseCASP<string order, string size, RegisterOperand RC>
   let NP = 0;
 }
 
-multiclass CompareAndSwapPair<bits<1> Acq, bits<1> Rel, string order> {
-  let Sz = 0b00, Acq = Acq, Rel = Rel in 
-    def s : BaseCASP<order, "", WSeqPairClassOperand>;
-  let Sz = 0b01, Acq = Acq, Rel = Rel in 
-    def d : BaseCASP<order, "", XSeqPairClassOperand>;
-}
+//multiclass CompareAndSwapPair<bits<1> Acq, bits<1> Rel, string order> {
+//  let Sz = 0b00, Acq = Acq, Rel = Rel in
+//    def s : BaseCASP<order, "", WSeqPairClassOperand>;
+//  let Sz = 0b01, Acq = Acq, Rel = Rel in
+//    def d : BaseCASP<order, "", XSeqPairClassOperand>;
+//}
 
 let Predicates = [HasV8_1a] in
 class BaseSWP<string order, string size, RegisterClass RC>
@@ -9016,15 +9016,15 @@ class BaseLDOPregister<string op, string order, string size, RegisterClass RC>
   let Inst{4-0} = Rt;
 }
 
-multiclass LDOPregister<bits<3> opc, string op, bits<1> Acq, bits<1> Rel, 
+multiclass LDOPregister<bits<3> opc, string op, bits<1> Acq, bits<1> Rel,
                         string order> {
-  let Sz = 0b00, Acq = Acq, Rel = Rel, opc = opc in 
+  let Sz = 0b00, Acq = Acq, Rel = Rel, opc = opc in
     def b : BaseLDOPregister<op, order, "b", GPR32>;
-  let Sz = 0b01, Acq = Acq, Rel = Rel, opc = opc in 
+  let Sz = 0b01, Acq = Acq, Rel = Rel, opc = opc in
     def h : BaseLDOPregister<op, order, "h", GPR32>;
-  let Sz = 0b10, Acq = Acq, Rel = Rel, opc = opc in 
+  let Sz = 0b10, Acq = Acq, Rel = Rel, opc = opc in
     def s : BaseLDOPregister<op, order, "", GPR32>;
-  let Sz = 0b11, Acq = Acq, Rel = Rel, opc = opc in 
+  let Sz = 0b11, Acq = Acq, Rel = Rel, opc = opc in
     def d : BaseLDOPregister<op, order, "", GPR64>;
 }
 
@@ -9034,21 +9034,21 @@ class BaseSTOPregister<string asm, RegisterClass OP, Register Reg,
       InstAlias<asm # "\t$Rs, [$Rn]", (inst Reg, OP:$Rs, GPR64sp:$Rn)>;
 
 multiclass STOPregister<string asm, string instr> {
-  def : BaseSTOPregister<asm # "lb", GPR32, WZR, 
+  def : BaseSTOPregister<asm # "lb", GPR32, WZR,
                     !cast<Instruction>(instr # "Lb")>;
-  def : BaseSTOPregister<asm # "lh", GPR32, WZR, 
+  def : BaseSTOPregister<asm # "lh", GPR32, WZR,
                     !cast<Instruction>(instr # "Lh")>;
-  def : BaseSTOPregister<asm # "l",  GPR32, WZR, 
+  def : BaseSTOPregister<asm # "l",  GPR32, WZR,
                     !cast<Instruction>(instr # "Ls")>;
-  def : BaseSTOPregister<asm # "l",  GPR64, XZR, 
+  def : BaseSTOPregister<asm # "l",  GPR64, XZR,
                     !cast<Instruction>(instr # "Ld")>;
-  def : BaseSTOPregister<asm # "b",  GPR32, WZR, 
+  def : BaseSTOPregister<asm # "b",  GPR32, WZR,
                     !cast<Instruction>(instr # "b")>;
-  def : BaseSTOPregister<asm # "h",  GPR32, WZR, 
+  def : BaseSTOPregister<asm # "h",  GPR32, WZR,
                     !cast<Instruction>(instr # "h")>;
-  def : BaseSTOPregister<asm,        GPR32, WZR, 
+  def : BaseSTOPregister<asm,        GPR32, WZR,
                     !cast<Instruction>(instr # "s")>;
-  def : BaseSTOPregister<asm,        GPR64, XZR, 
+  def : BaseSTOPregister<asm,        GPR64, XZR,
                     !cast<Instruction>(instr # "d")>;
 }
 
diff --git a/lib/Target/AArch64/AArch64InstrInfo.td b/lib/Target/AArch64/AArch64InstrInfo.td
index 17c0afc..3967f35 100644
--- a/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/lib/Target/AArch64/AArch64InstrInfo.td
@@ -751,10 +751,10 @@ defm CASL  : CompareAndSwap<0, 1, "l">;
 defm CASAL : CompareAndSwap<1, 1, "al">;
 
 // v8.1 atomic CASP
-defm CASP   : CompareAndSwapPair<0, 0, "">;
-defm CASPA  : CompareAndSwapPair<1, 0, "a">;
-defm CASPL  : CompareAndSwapPair<0, 1, "l">;
-defm CASPAL : CompareAndSwapPair<1, 1, "al">;
+//defm CASP   : CompareAndSwapPair<0, 0, "">;
+//defm CASPA  : CompareAndSwapPair<1, 0, "a">;
+//defm CASPL  : CompareAndSwapPair<0, 1, "l">;
+//defm CASPAL : CompareAndSwapPair<1, 1, "al">;
 
 // v8.1 atomic SWP
 defm SWP   : Swap<0, 0, "">;
diff --git a/lib/Target/AArch64/AArch64RegisterInfo.td b/lib/Target/AArch64/AArch64RegisterInfo.td
index b2efca0..fb62336 100644
--- a/lib/Target/AArch64/AArch64RegisterInfo.td
+++ b/lib/Target/AArch64/AArch64RegisterInfo.td
@@ -25,7 +25,7 @@ let Namespace = "AArch64" in {
   def bsub : SubRegIndex<8>;
   def hsub : SubRegIndex<16>;
   def ssub : SubRegIndex<32>;
-  def dsub : SubRegIndex<32>;
+  def dsub : SubRegIndex<64>;
   def sube32 : SubRegIndex<32>;
   def subo32 : SubRegIndex<32>;
   def qhisub : SubRegIndex<64>;
@@ -602,19 +602,19 @@ def FPR128Op : RegisterOperand<FPR128, "printOperand">;
 // ARMv8.1a atomic CASP register operands
 
 
-def WSeqPairs : RegisterTuples<[sube32, subo32], 
-                               [(rotl GPR32, 0), (rotl GPR32, 1)]>;
-def XSeqPairs : RegisterTuples<[sube64, subo64], 
-                               [(rotl GPR64, 0), (rotl GPR64, 1)]>;
+//def WSeqPairs : RegisterTuples<[sube32, subo32],
+//                               [(rotl GPR32, 0), (rotl GPR32, 1)]>;
+//def XSeqPairs : RegisterTuples<[sube64, subo64],
+//                               [(rotl GPR64, 0), (rotl GPR64, 1)]>;
 
-def WSeqPairsClass   : RegisterClass<"AArch64", [untyped], 32, 
-                                     (add WSeqPairs)>{
-  let Size = 64;
-}
-def XSeqPairsClass   : RegisterClass<"AArch64", [untyped], 64, 
-                                     (add XSeqPairs)>{
-  let Size = 128;
-}
+//def WSeqPairsClass   : RegisterClass<"AArch64", [untyped], 32,
+//                                     (add WSeqPairs)>{
+//  let Size = 64;
+//}
+//def XSeqPairsClass   : RegisterClass<"AArch64", [untyped], 64,
+//                                     (add XSeqPairs)>{
+//  let Size = 128;
+//}
 
 
 let RenderMethod = "addRegOperands", ParserMethod="tryParseGPRSeqPair" in {
@@ -622,14 +622,14 @@ let RenderMethod = "addRegOperands", ParserMethod="tryParseGPRSeqPair" in {
   def XSeqPairsAsmOperandClass : AsmOperandClass { let Name = "XSeqPair"; }
 }
 
-def WSeqPairClassOperand :
-    RegisterOperand<WSeqPairsClass, "printGPRSeqPairsClassOperand<32>"> {
-  let ParserMatchClass = WSeqPairsAsmOperandClass;
-}
-def XSeqPairClassOperand :
-    RegisterOperand<XSeqPairsClass, "printGPRSeqPairsClassOperand<64>"> {
-  let ParserMatchClass = XSeqPairsAsmOperandClass;
-}
+//def WSeqPairClassOperand :
+//    RegisterOperand<WSeqPairsClass, "printGPRSeqPairsClassOperand<32>"> {
+//  let ParserMatchClass = WSeqPairsAsmOperandClass;
+//}
+//def XSeqPairClassOperand :
+//    RegisterOperand<XSeqPairsClass, "printGPRSeqPairsClassOperand<64>"> {
+//  let ParserMatchClass = XSeqPairsAsmOperandClass;
+//}
 
 
 //===----- END: v8.1a atomic CASP register operands -----------------------===//
diff --git a/lib/Target/AArch64/AArch64Sema.td b/lib/Target/AArch64/AArch64Sema.td
new file mode 100644
index 0000000..fe00f70
--- /dev/null
+++ b/lib/Target/AArch64/AArch64Sema.td
@@ -0,0 +1,542 @@
+include "llvm/DC/Semantics.td"
+
+class Sema_F<Instruction inst, dag pattern>
+  : Semantics<inst, [pattern, (implicit NZCV)]>;
+
+class Sema_F_Str<string inst, dag pattern>
+: Sema_F<!cast<Instruction>(inst), pattern>;
+
+// suppress errors, not correct yet!
+
+def : Semantics<ADCSWr, [(set GPR32:$Rd, NZCV, (AArch64adc_flag GPR32:$Rn, GPR32:$Rm, NZCV))]>;
+def : Semantics<ADCSXr, [(set GPR64:$Rd, NZCV, (AArch64adc_flag GPR64:$Rn, GPR64:$Rm, NZCV))]>;
+
+def : Semantics<ADDSWri, [(set GPR32:$Rd, NZCV, (AArch64add_flag GPR32sp:$Rn, addsub_shifted_imm32:$imm))]>;
+def : Semantics<ADDSWrr, [(set GPR32:$Rd, NZCV, (AArch64add_flag GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<ADDSWrs, [(set GPR32:$Rd, NZCV, (AArch64add_flag GPR32:$Rn, arith_shifted_reg32:$Rm))]>;
+def : Semantics<ADDSWrx, [(set GPR32:$R1, NZCV, (AArch64add_flag GPR32sp:$R2, ADDSanonymous_755:$R3))]>;
+def : Semantics<ADDSXri, [(set GPR64:$Rd, NZCV, (AArch64add_flag GPR64sp:$Rn, addsub_shifted_imm64:$imm))]>;
+def : Semantics<ADDSXrr, [(set GPR64:$Rd, NZCV, (AArch64add_flag GPR64:$Rn, GPR64:$Rm))]>;
+def : Semantics<ADDSXrs, [(set GPR64:$Rd, NZCV, (AArch64add_flag GPR64:$Rn, arith_shifted_reg64:$Rm))]>;
+def : Semantics<ADDSXrx, [(set GPR64:$R1, NZCV, (AArch64add_flag GPR64sp:$R2, ADDSanonymous_756:$R3))]>;
+
+def : Semantics<ANDSWri, [(set GPR32:$Rd, NZCV, (AArch64and_flag GPR32:$Rn, logical_imm32:$imm))]>;
+def : Semantics<ANDSWrr, [(set GPR32:$Rd, NZCV, (AArch64and_flag GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<ANDSWrs, [(set GPR32:$Rd, NZCV, (AArch64and_flag GPR32:$Rn, logical_shifted_reg32:$Rm))]>;
+def : Semantics<ANDSXri, [(set GPR64:$Rd, NZCV, (AArch64and_flag GPR64:$Rn, logical_imm64:$imm))]>;
+def : Semantics<ANDSXrr, [(set GPR64:$Rd, NZCV, (AArch64and_flag GPR64:$Rn, GPR64:$Rm))]>;
+def : Semantics<ANDSXrs, [(set GPR64:$Rd, NZCV, (AArch64and_flag GPR64:$Rn, logical_shifted_reg64:$Rm))]>;
+
+def : Semantics<ANDWrr, [(set GPR32:$Rd, (and GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<ANDXrr, [(set GPR64:$Rd, (and GPR64:$Rn, GPR64:$Rm))]>;
+
+def : Semantics<ADDWrr, [(set GPR32:$Rd, (add GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<ADDXrr, [(set GPR64:$Rd, (add GPR64:$Rn, GPR64:$Rm))]>;
+
+def : Semantics<SBCSWr, [(set GPR32:$Rd, NZCV, (AArch64sbc_flag GPR32:$Rn, GPR32:$Rm, NZCV)), (implicit NZCV)]>;
+def : Semantics<SBCSXr, [(set GPR64:$Rd, NZCV, (AArch64sbc_flag GPR64:$Rn, GPR64:$Rm, NZCV)), (implicit NZCV)]>;
+
+def : Semantics<SUBSWri, [(set GPR32:$Rd, NZCV, (AArch64sub_flag GPR32sp:$Rn, addsub_shifted_imm32:$imm))]>;
+def : Semantics<SUBSWrr, [(set GPR32:$Rd, NZCV, (AArch64sub_flag GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<SUBSWrs, [(set GPR32:$Rd, NZCV, (AArch64sub_flag GPR32:$Rn, arith_shifted_reg32:$Rm))]>;
+def : Semantics<SUBSWrx, [(set GPR32:$R1, NZCV, (AArch64sub_flag GPR32sp:$R2, SUBSanonymous_755:$R3))]>;
+def : Semantics<SUBSXri, [(set GPR64:$Rd, NZCV, (AArch64sub_flag GPR64sp:$Rn, addsub_shifted_imm64:$imm))]>;
+def : Semantics<SUBSXrr, [(set GPR64:$Rd, NZCV, (AArch64sub_flag GPR64:$Rn, GPR64:$Rm))]>;
+def : Semantics<SUBSXrs, [(set GPR64:$Rd, NZCV, (AArch64sub_flag GPR64:$Rn, arith_shifted_reg64:$Rm))]>;
+def : Semantics<SUBSXrx, [(set GPR64:$R1, NZCV, (AArch64sub_flag GPR64sp:$R2, SUBSanonymous_756:$R3))]>;
+
+def : Semantics<STURXi, [(store GPR64:$Rt, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+def : Semantics<BICSWrs, [(set GPR32:$Rd, (add GPR32:$Rn, logical_shifted_reg32:$Rm))]>;
+def : Semantics<BICSXrs, [(set GPR64:$Rd, (add GPR64:$Rn, logical_shifted_reg64:$Rm))]>;
+
+
+def : Semantics<LDRBBui, [(set GPR32:$Rt, (zext (i8 (load (add GPR64sp:$Rn, uimm12s1:$offset)))))]>;
+def : Semantics<LDRBui, [(set FPR8:$Rt, (bitconvert (i8 (load (add GPR64sp:$Rn, uimm12s1:$offset)))))]>;
+def : Semantics<LDRDui, [(set (f64 FPR64:$Rt), (load (add GPR64sp:$Rn, uimm12s8:$offset)))]>;
+def : Semantics<LDRHHui, [(set GPR32:$Rt, (zext (i16 (load (add GPR64sp:$Rn, uimm12s2:$offset)))))]>;
+def : Semantics<LDRHui, [(set (f16 FPR16:$Rt), (load (add GPR64sp:$Rn, uimm12s2:$offset)))]>;
+def : Semantics<LDRQui, [(set (f128 FPR128:$Rt), (load (add GPR64sp:$Rn, uimm12s16:$offset)))]>;
+def : Semantics<LDRSBWui, [(set GPR32:$Rt, (sext (i8 (load (add GPR64sp:$Rn, uimm12s1:$offset)))))]>;
+def : Semantics<LDRSBXui, [(set GPR64:$Rt, (sext (i8 (load (add GPR64sp:$Rn, uimm12s1:$offset)))))]>;
+def : Semantics<LDRSHWui, [(set GPR32:$Rt, (sext (i16 (load (add GPR64sp:$Rn, uimm12s2:$offset)))))]>;
+def : Semantics<LDRSHXui, [(set GPR64:$Rt, (sext (i16 (load (add GPR64sp:$Rn, uimm12s2:$offset)))))]>;
+def : Semantics<LDRSWui, [(set GPR64:$Rt, (sext (i32 (load (add GPR64sp:$Rn, uimm12s4:$offset)))))]>;
+def : Semantics<LDRSui, [(set (f32 FPR32:$Rt), (load (add GPR64sp:$Rn, uimm12s4:$offset)))]>;
+def : Semantics<LDRWui, [(set GPR32:$Rt, (load (add GPR64sp:$Rn, uimm12s4:$offset)))]>;
+def : Semantics<LDRXui, [(set GPR64:$Rt, (load (add GPR64sp:$Rn, uimm12s8:$offset)))]>;
+def : Semantics<LDURBBi, [(set GPR32:$Rt, (zext (i8 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURBi, [(set FPR8:$Rt, (bitconvert (i8 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURDi, [(set (f64 FPR64:$Rt), (load (add GPR64sp:$Rn, simm9:$offset)))]>;
+def : Semantics<LDURHHi, [(set GPR32:$Rt, (zext (i16 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURHi, [(set FPR16:$Rt, (load (add GPR64sp:$Rn, simm9:$offset)))]>;
+def : Semantics<LDURQi, [(set (f128 FPR128:$Rt), (load (add GPR64sp:$Rn, simm9:$offset)))]>;
+def : Semantics<LDURSBWi, [(set GPR32:$Rt, (sext (i8 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURSBXi, [(set GPR64:$Rt, (sext (i8 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURSHWi, [(set GPR32:$Rt, (sext (i16 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURSHXi, [(set GPR64:$Rt, (sext (i16 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURSWi, [(set GPR64:$Rt, (sext (i32 (load (add GPR64sp:$Rn, simm9:$offset)))))]>;
+def : Semantics<LDURSi, [(set (f32 FPR32:$Rt), (load (add GPR64sp:$Rn, simm9:$offset)))]>;
+def : Semantics<LDURWi, [(set GPR32:$Rt, (load (add GPR64sp:$Rn, simm9:$offset)))]>;
+def : Semantics<LDURXi, [(set GPR64:$Rt, (load (add GPR64sp:$Rn, simm9:$offset)))]>;
+
+def : Semantics<STRBBui, [(store (i8 (trunc GPR32:$Rt)), (add GPR64sp:$Rn, uimm12s1:$offset))]>;
+def : Semantics<STRBui, [(store FPR8:$Rt, (add GPR64sp:$Rn, uimm12s1:$offset))]>;
+def : Semantics<STRDui, [(store (f64 FPR64:$Rt), (add GPR64sp:$Rn, uimm12s8:$offset))]>;
+def : Semantics<STRQui, [(store (f128 FPR128:$Rt), (add GPR64sp:$Rn, uimm12s16:$offset))]>;
+def : Semantics<STRHHui, [(store (i16 (trunc GPR32:$Rt)), (add GPR64sp:$Rn, uimm12s2:$offset))]>;
+def : Semantics<STRHui, [(store (f16 FPR16:$Rt), (add GPR64sp:$Rn, uimm12s2:$offset))]>;
+def : Semantics<STRSui, [(store (f32 FPR32:$Rt), (add GPR64sp:$Rn, uimm12s4:$offset))]>;
+def : Semantics<STRWui, [(store GPR32:$Rt, (add GPR64sp:$Rn, uimm12s4:$offset))]>;
+def : Semantics<STRXui, [(store GPR64:$Rt, (add GPR64sp:$Rn, uimm12s8:$offset))]>;
+def : Semantics<STURBBi, [(store (i8 (trunc GPR32:$Rt)), (add GPR64sp:$Rn, simm9:$offset))]>;
+def : Semantics<STURBi, [(store (i8 (bitconvert FPR8:$Rt)), (add GPR64sp:$Rn, simm9:$offset))]>;
+def : Semantics<STURDi, [(store (f64 FPR64:$Rt), (add GPR64sp:$Rn, simm9:$offset))]>;
+def : Semantics<STURHHi, [(store (i16 (trunc GPR32:$Rt)), (add GPR64sp:$Rn, simm9:$offset))]>;
+def : Semantics<STURHi, [(store (f16 FPR16:$Rt), (add GPR64sp:$Rn, simm9:$offset))]>;
+def : Semantics<STURQi, [(store (f128 FPR128:$Rt), (add GPR64sp:$Rn, simm9:$offset))]>;
+def : Semantics<STURSi, [(store (f32 FPR32:$Rt), (add GPR64sp:$Rn, simm9:$offset))]>;
+def : Semantics<STURWi, [(store GPR32:$Rt, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+
+//Start of "real" definitions
+
+def AArchDec_Ext64  : SDNode<"AArch64ISD::AARCH_REG_EXT",  SDTypeProfile<1, 2, []>>;
+
+class Sema_LDR_ro<Instruction inst, ValueType DstType, DAGOperand DstReg, string LoadOp, int LoadWidth, int OffsetRegWidth> : Semantics<inst,
+  [(set (DstType DstReg:$Rt), (!cast<SDPatternOperator>(LoadOp) (add GPR64sp:$Rn, (AArchDec_Ext64 !cast<DAGOperand>("GPR"#OffsetRegWidth):$Rm, !cast<Operand>("ro_"#!if(!eq(OffsetRegWidth, 64), "X", "W")#"extend"#LoadWidth):$extend))))]>;
+
+class Sema_zext_LDR_ro<Instruction inst, ValueType DstType, DAGOperand DstReg , int LoadWidth, int OffsetRegWidth> :
+  Semantics<inst, [(set (DstType DstReg:$Rt), (zext (!cast<ValueType>("i"#LoadWidth) (load (add GPR64sp:$Rn, (AArchDec_Ext64 !cast<DAGOperand>("GPR"#OffsetRegWidth):$Rm, !cast<Operand>("ro_"#!if(!eq(OffsetRegWidth, 64), "X", "W")#"extend"#LoadWidth):$extend))))))]>;
+
+class Sema_sext_LDR_ro<Instruction inst, ValueType DstType, DAGOperand DstReg , int LoadWidth, int OffsetRegWidth> :
+  Semantics<inst, [(set (DstType DstReg:$Rt), (sext (!cast<ValueType>("i"#LoadWidth) (load (add GPR64sp:$Rn, (AArchDec_Ext64 !cast<DAGOperand>("GPR"#OffsetRegWidth):$Rm, !cast<Operand>("ro_"#!if(!eq(OffsetRegWidth, 64), "X", "W")#"extend"#LoadWidth):$extend))))))]>;
+
+def : Sema_zext_LDR_ro<LDRBBroX, i32, GPR32, 8, 64>;
+def : Sema_zext_LDR_ro<LDRBBroW, i32, GPR32, 8, 32>;
+
+def : Semantics<LDRBroW, [(set FPR8:$Rt, (bitconvert (i8 (load (add GPR64sp:$Rn, (AArchDec_Ext64 GPR32:$Rm, ro_Wextend8:$extend))))))]>;
+def : Semantics<LDRBroX, [(set FPR8:$Rt, (bitconvert (i8 (load (add GPR64sp:$Rn, (AArchDec_Ext64 GPR64:$Rm, ro_Xextend8:$extend))))))]>;
+
+def : Sema_LDR_ro<LDRDroW, f64, FPR64, "load", 64, 32>;
+def : Sema_LDR_ro<LDRDroX, f64, FPR64, "load", 64, 64>;
+
+def : Sema_zext_LDR_ro<LDRHHroX, i32, GPR32, 16, 64>;
+def : Sema_zext_LDR_ro<LDRHHroW, i32, GPR32, 16, 32>;
+
+def : Sema_LDR_ro<LDRHroW, f16, FPR16, "load", 16, 32>;
+def : Sema_LDR_ro<LDRHroX, f16, FPR16, "load", 16, 64>;
+
+def : Sema_LDR_ro<LDRQroW, f128, FPR128, "load", 128, 32>;
+def : Sema_LDR_ro<LDRQroX, f128, FPR128, "load", 128, 64>;
+
+def : Sema_sext_LDR_ro<LDRSBWroX, i32, GPR32, 8, 64>;
+def : Sema_sext_LDR_ro<LDRSBWroW, i32, GPR32, 8, 32>;
+
+def : Sema_sext_LDR_ro<LDRSBXroX, i64, GPR64, 8, 64>;
+def : Sema_sext_LDR_ro<LDRSBXroW, i64, GPR64, 8, 32>;
+
+def : Sema_sext_LDR_ro<LDRSHWroX, i32, GPR32, 16, 64>;
+def : Sema_sext_LDR_ro<LDRSHWroW, i32, GPR32, 16, 32>;
+
+def : Sema_sext_LDR_ro<LDRSHXroX, i64, GPR64, 16, 64>;
+def : Sema_sext_LDR_ro<LDRSHXroW, i64, GPR64, 16, 32>;
+
+def : Sema_sext_LDR_ro<LDRSWroX, i64, GPR64, 32, 64>;
+def : Sema_sext_LDR_ro<LDRSWroW, i64, GPR64, 32, 32>;
+
+
+def : Sema_LDR_ro<LDRSroW, f32, FPR32, "load", 32, 32>;
+def : Sema_LDR_ro<LDRSroX, f32, FPR32, "load", 32, 64>;
+
+def : Sema_LDR_ro<LDRWroW, i32, GPR32, "load", 32, 32>;
+def : Sema_LDR_ro<LDRWroX, i32, GPR32, "load", 32, 64>;
+
+def : Sema_LDR_ro<LDRXroW, i64, GPR64, "load", 64, 32>;
+def : Sema_LDR_ro<LDRXroX, i64, GPR64, "load", 64, 64>;
+
+
+
+class Sema_STR_ro<Instruction inst, string StoreOp, ValueType SrcType, DAGOperand SrcReg, int StoreWidth, int OffsetRegWidth> :
+  Semantics<inst, [(!cast<SDPatternOperator>(StoreOp) (SrcType SrcReg:$Rt), (add GPR64sp:$Rn, (AArchDec_Ext64 !cast<DAGOperand>("GPR"#OffsetRegWidth):$Rm, !cast<Operand>("ro_"#!if(!eq(OffsetRegWidth, 64), "X", "W")#"extend"#StoreWidth):$extend)))]>;
+
+def : Sema_STR_ro<STRBBroW, "truncstorei8", i32, GPR32, 8, 32>;
+def : Sema_STR_ro<STRBBroX, "truncstorei8", i32, GPR32, 8, 64>;
+
+def : Sema_STR_ro<STRBroW, "store", untyped, FPR8, 8, 32>;
+def : Sema_STR_ro<STRBroX, "store", untyped, FPR8, 8, 64>;
+
+def : Sema_STR_ro<STRDroW, "store", f64, FPR64, 64, 32>;
+def : Sema_STR_ro<STRDroX, "store", f64, FPR64, 64, 64>;
+
+def : Sema_STR_ro<STRHHroW, "truncstorei16", i32, GPR32, 16, 32>;
+def : Sema_STR_ro<STRHHroX, "truncstorei16", i32, GPR32, 16, 64>;
+
+def : Sema_STR_ro<STRHroW, "store", f16, FPR16, 16, 32>;
+def : Sema_STR_ro<STRHroX, "store", f16, FPR16, 16, 64>;
+
+def : Sema_STR_ro<STRQroW, "store", f128, FPR128, 128, 32>;
+def : Sema_STR_ro<STRQroX, "store", f128, FPR128, 128, 64>;
+
+def : Sema_STR_ro<STRSroW, "store", f32, FPR32, 32, 32>;
+def : Sema_STR_ro<STRSroX, "store", f32, FPR32, 32, 64>;
+
+def : Sema_STR_ro<STRWroW, "store", i32, GPR32, 32, 32>;
+def : Sema_STR_ro<STRWroX, "store", i32, GPR32, 32, 64>;
+
+def : Sema_STR_ro<STRXroW, "store", i64, GPR64, 64, 32>;
+def : Sema_STR_ro<STRXroX, "store", i64, GPR64, 64, 64>;
+
+
+//Dummies
+def : Semantics<PRFMroW, [(AArch64Prefetch imm:$Rt, (add GPR64sp:$Rn, (AArchDec_Ext64 GPR32:$Rm, ro_Wextend64:$extend)))]>;
+def : Semantics<PRFMroX, [(AArch64Prefetch imm:$Rt, (add GPR64sp:$Rn, (AArchDec_Ext64 GPR64:$Rm, ro_Xextend64:$extend)))]>;
+
+def : Semantics<PRFMui, [(AArch64Prefetch imm:$Rt, (add GPR64sp:$Rn, uimm12s8:$offset))]>;
+def : Semantics<PRFUMi, [(AArch64Prefetch imm:$Rt, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+
+
+def : Semantics<MOVZXi, [(set GPR64:$Rd ,(shl (i64 (zext movimm32_imm:$imm)), movimm64_shift:$shift))]>;
+def : Semantics<MOVZWi, [(set GPR32:$Rd ,(shl movimm32_imm:$imm, movimm32_shift:$shift))]>;
+
+def : Semantics<MOVNXi, [(set GPR64:$Rd ,(xor -1, (shl (i64 (zext movimm32_imm:$imm)), movimm64_shift:$shift)))]>;
+def : Semantics<MOVNWi, [(set GPR32:$Rd ,(xor -1, (shl movimm32_imm:$imm, movimm32_shift:$shift)))]>;
+
+//Redefinitions of Operands
+
+def : Semantics<ADDXrx, [(set GPR64sp:$R1, (add GPR64sp:$R2, arith_extended_reg32to64<i64>:$R3))]>;
+def : Semantics<SUBXrx, [(set GPR64sp:$R1, (sub GPR64sp:$R2, arith_extended_reg32to64<i64>:$R3))]>;
+def : Semantics<SUBWrx, [(set GPR32sp:$R1, (sub GPR32sp:$R2, arith_extended_reg32<i32>:$R3))]>;
+def : Semantics<SUBXri, [(set GPR64sp:$Rd, (sub GPR64sp:$Rn, addsub_shifted_imm64:$imm))]>;
+def : Semantics<SUBWrs, [(set GPR32:$Rd, (sub GPR32:$Rn, arith_shifted_reg32:$Rm))]>;
+def : Semantics<SUBXrs, [(set GPR64:$Rd, (sub GPR64:$Rn, arith_shifted_reg64:$Rm))]>;
+
+
+class MADD<Instruction inst, int Width> : Semantics<inst,
+  [(set !cast<DAGOperand>("GPR"#Width):$Rd, (add !cast<DAGOperand>("GPR"#Width):$Ra, (mul !cast<DAGOperand>("GPR"#Width):$Rn, !cast<DAGOperand>("GPR"#Width):$Rm)))]>;
+def : MADD<MADDWrrr, 32>;
+def : MADD<MADDXrrr, 64>;
+
+
+class MSUB<Instruction inst, int Width> : Semantics<inst,
+  [(set !cast<DAGOperand>("GPR"#Width):$Rd, (sub !cast<DAGOperand>("GPR"#Width):$Ra, (mul !cast<DAGOperand>("GPR"#Width):$Rn, !cast<DAGOperand>("GPR"#Width):$Rm)))]>;
+def : MSUB<MSUBWrrr, 32>;
+def : MSUB<MSUBXrrr, 64>;
+
+
+//STP LDP
+
+class STP<Instruction inst, ValueType SrcType, DAGOperand SrcOperand, int Width> : Semantics<inst,
+  [(store (SrcType SrcOperand:$Rt), (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset)))), (store (SrcType SrcOperand:$Rt2), (add Width, (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset)))))]>;
+
+class STPpost<Instruction inst, ValueType SrcType, DAGOperand SrcOperand, int Width> : Semantics<inst,
+  [(store (SrcType SrcOperand:$Rt), GPR64sp:$Rn), (store (SrcType SrcOperand:$Rt2), (add Width, GPR64sp:$Rn)), (set GPR64sp:$wback, (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset))))]>;
+
+class STPpre<Instruction inst, ValueType SrcType, DAGOperand SrcOperand, int Width> : Semantics<inst,
+  [(set GPR64sp:$wback, (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset)))), (store (SrcType SrcOperand:$Rt), GPR64sp:$wback), (store (SrcType SrcOperand:$Rt2), (add Width, GPR64sp:$wback))]>;
+
+def : STP<STPWi, i32, GPR32, 4>;
+def : STP<STPXi, i64, GPR64, 8>;
+def : STP<STPSi, f32, FPR32, 4>;
+def : STP<STPDi, f64, FPR64, 8>;
+def : STP<STPQi, f128, FPR128, 16>;
+
+def : STPpre<STPWpre, i32, GPR32, 4>;
+def : STPpre<STPXpre, i64, GPR64, 8>;
+def : STPpre<STPSpre, f32, FPR32, 4>;
+def : STPpre<STPDpre, f64, FPR64, 8>;
+def : STPpre<STPQpre, f128, FPR128, 16>;
+
+def : STPpost<STPWpost, i32, GPR32, 4>;
+def : STPpost<STPXpost, i64, GPR64, 8>;
+def : STPpost<STPSpost, f32, FPR32, 4>;
+def : STPpost<STPDpost, f64, FPR64, 8>;
+def : STPpost<STPQpost, f128, FPR128, 16>;
+
+class LDP<Instruction inst, ValueType DstType, DAGOperand DstOperand, int Width> : Semantics<inst,
+  [(set (DstType DstOperand:$Rt), (load (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset))))), (set (DstType DstOperand:$Rt2), (load (add Width, (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset))))))]>;
+
+class LDPpre<Instruction inst, ValueType DstType, DAGOperand DstOperand, int Width> : Semantics<inst,
+  [(set GPR64sp:$wback, (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset)))), (set (DstType DstOperand:$Rt), (load GPR64sp:$wback)), (set (DstType DstOperand:$Rt2), (load (add Width, GPR64sp:$wback)))]>;
+
+class LDPpost<Instruction inst, ValueType DstType, DAGOperand DstOperand, int Width> : Semantics<inst,
+  [(set (DstType DstOperand:$Rt), (load GPR64sp:$Rn)), (set (DstType DstOperand:$Rt2), (load (add Width, GPR64sp:$Rn))), (set GPR64sp:$wback, (add GPR64sp:$Rn, (i64 (sext !cast<DAGOperand>("simm7s"#Width):$offset))))]>;
+
+def : LDP<LDPWi, i32, GPR32, 4>;
+def : LDP<LDPXi, i64, GPR64, 8>;
+def : LDP<LDPSi, f32, FPR32, 4>;
+def : LDP<LDPDi, f64, FPR64, 8>;
+def : LDP<LDPQi, f128, FPR128, 16>;
+
+def : LDPpost<LDPWpost, i32, GPR32, 4>;
+def : LDPpost<LDPXpost, i64, GPR64, 8>;
+def : LDPpost<LDPSpost, f32, FPR32, 4>;
+def : LDPpost<LDPDpost, f64, FPR64, 8>;
+def : LDPpost<LDPQpost, f128, FPR128, 16>;
+
+def : LDPpre<LDPWpre, i32, GPR32, 4>;
+def : LDPpre<LDPXpre, i64, GPR64, 8>;
+def : LDPpre<LDPSpre, f32, FPR32, 4>;
+def : LDPpre<LDPDpre, f64, FPR64, 8>;
+def : LDPpre<LDPQpre, f128, FPR128, 16>;
+
+def : Semantics<LDPSWi , [(set GPR64:$Rt, (sext (i32 (load (add GPR64sp:$Rn, (i64 (sext simm7s4:$offset))))))), (set GPR64:$Rt2, (sext (i32 (load (add 4, (add GPR64sp:$Rn, (i64 (sext simm7s4:$offset))))))))]>;
+def : Semantics<LDPSWpost , [(set GPR64:$Rt, (sext (i32 (load GPR64sp:$Rn)))), (set GPR64:$Rt2, (sext (i32 (load (add 4, GPR64sp:$Rn))))), (set GPR64sp:$wback, (add GPR64sp:$Rn, (i64 (sext simm7s4:$offset))))]>;
+def : Semantics<LDPSWpre , [(set GPR64sp:$wback, (add GPR64sp:$Rn, (i64 (sext simm7s4:$offset)))), (set GPR64:$Rt, (sext (i32 (load GPR64sp:$wback)))), (set GPR64:$Rt2, (sext (i32 (load (add 4, GPR64sp:$wback)))))]>;
+
+
+//LDR STR
+
+//TODO: isn't this the 'pre' pattern???
+class LDRpost<Instruction inst, int LoadWidth> : Semantics<inst,
+  [(set GPR32:$Rt, (zext (!cast<ValueType>("i"#LoadWidth) (load GPR64sp:$Rn)))), (set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+def : LDRpost<LDRBBpost, 8>;
+def : LDRpost<LDRHHpost, 16>;
+
+
+//Load and extend
+
+class LDR_zext<Instruction inst, int LoadWidth> : Semantics<inst,
+ [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (set GPR32:$Rt, (zext (!cast<ValueType>("i"#LoadWidth) (load GPR64sp:$wback))))]>;
+
+class LDR_sext_pre<Instruction inst, int LoadWidth> : Semantics<inst,
+ [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (set GPR32:$Rt, (sext (!cast<ValueType>("i"#LoadWidth) (load GPR64sp:$wback))))]>;
+
+class LDR_sext64_pre<Instruction inst, int LoadWidth> : Semantics<inst,
+  [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (set GPR64:$Rt, (sext (!cast<ValueType>("i"#LoadWidth) (load GPR64sp:$wback))))]>;
+
+class LDR_pre<Instruction inst, ValueType DstType, DAGOperand DstOperand> : Semantics<inst,
+  [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (set (DstType DstOperand:$Rt), (load GPR64sp:$wback))]>;
+
+class LDR_post<Instruction inst, ValueType DstType, DAGOperand DstOperand> : Semantics<inst,
+  [(set (DstType DstOperand:$Rt), (load GPR64sp:$Rn)), (set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+class LDR_sext_post<Instruction inst, DAGOperand DstOperand, int LoadWidth> : Semantics<inst,
+  [(set DstOperand:$Rt, (sext (!cast<ValueType>("i"#LoadWidth) (load GPR64sp:$Rn)))), (set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+class STR_post<Instruction inst, ValueType SrcType, DAGOperand SrcOperand> : Semantics<inst,
+  [(store (SrcType SrcOperand:$Rt), GPR64sp:$Rn), (set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+class STR_trunc_post<Instruction inst, int StoreWidth> : Semantics<inst,
+  [(store (!cast<ValueType>("i"#StoreWidth) (trunc GPR32:$Rt)), GPR64sp:$Rn), (set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset))]>;
+
+class STR_trunc_pre<Instruction inst, int StoreWidth> : Semantics<inst,
+  [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (store (!cast<ValueType>("i"#StoreWidth) (trunc GPR32:$Rt)), GPR64sp:$wback)]>;
+
+class STR_pre<Instruction inst, DAGOperand SrcOperand> : Semantics<inst,
+  [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (store SrcOperand:$Rt, GPR64sp:$wback)]>;
+
+def : STR_trunc_post<STRBBpost, 8>;
+def : STR_trunc_post<STRHHpost, 16>;
+
+def : STR_post<STRXpost, i64, GPR64>;
+def : STR_post<STRWpost, i32, GPR32>;
+def : STR_post<STRSpost, f32, FPR32>;
+def : STR_post<STRDpost, f64, FPR64>;
+def : STR_post<STRQpost, f128, FPR128>;
+
+def : Semantics<STRDpre, [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (store (f64 FPR64:$Rt), GPR64sp:$wback)]>;
+def : Semantics<STRQpre, [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (store (f128 FPR128:$Rt), GPR64sp:$wback)]>;
+
+def : STR_pre<STRXpre, GPR64>;
+def : STR_pre<STRWpre, GPR32>;
+
+def : STR_trunc_pre<STRBBpre, 8>;
+def : STR_trunc_pre<STRHHpre, 16>;
+
+def : LDR_pre<LDRXpre, i64, GPR64>;
+def : LDR_pre<LDRWpre, i32, GPR32>;
+def : LDR_pre<LDRSpre, f32, FPR32>;
+def : LDR_pre<LDRQpre, f128, FPR128>;
+def : LDR_pre<LDRDpre, f64, FPR64>;
+def : LDR_pre<LDRHpre, f16, FPR16>;
+def : LDR_sext_pre<LDRSBWpre, 8>;
+def : LDR_sext_pre<LDRSHWpre, 16>;
+def : LDR_sext64_pre<LDRSWpre, 32>;
+def : LDR_post<LDRXpost, i64, GPR64>;
+def : LDR_post<LDRWpost, i32, GPR32>;
+def : LDR_post<LDRDpost, f64, FPR64>;
+def : LDR_post<LDRSpost, f32, FPR32>;
+def : LDR_post<LDRHpost, f16, FPR16>;
+def : LDR_post<LDRQpost, f128, FPR128>;
+
+def : LDR_zext<LDRBBpre, 8>;
+def : LDR_sext_post<LDRSBWpost, GPR32, 8>;
+def : LDR_sext_post<LDRSWpost, GPR64, 32>;
+def : LDR_sext_post<LDRSHXpost, GPR64, 16>;
+def : LDR_sext_post<LDRSHWpost, GPR32, 16>;
+def : LDR_sext_post<LDRSBXpost, GPR64, 8>;
+
+def : Semantics<LDRSBXpre, [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (set GPR64:$Rt, (sext (i8 (load GPR64sp:$wback))))]>;
+
+def : Semantics<ASRVWr, [(set GPR32:$Rd, (sra GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<ASRVXr, [(set GPR64:$Rd, (sra GPR64:$Rn, GPR64:$Rm))]>;
+
+def : Semantics<LSLVWr, [(set GPR32:$Rd, (shl GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<LSLVXr, [(set GPR64:$Rd, (shl GPR64:$Rn, GPR64:$Rm))]>;
+
+def : Semantics<LSRVWr, [(set GPR32:$Rd, (srl GPR32:$Rn, GPR32:$Rm))]>;
+def : Semantics<LSRVXr, [(set GPR64:$Rd, (srl GPR64:$Rn, GPR64:$Rm))]>;
+
+def : Semantics<RORVWr, [(set GPR32:$Rd, (or (shl GPR32:$Rn, (sub (i32 32), GPR32:$Rm)), (srl GPR32:$Rn, GPR32:$Rm)))]>;
+def : Semantics<RORVXr, [(set GPR64:$Rd, (or (shl GPR64:$Rn, (sub (i64 64), GPR64:$Rm)), (srl GPR64:$Rn, GPR64:$Rm)))]>;
+
+
+class LDAXR<Instruction inst, ValueType DstType, DAGOperand DstOperand, SDPatternOperator Op> :
+  Semantics<inst, [(set (DstType DstOperand:$Rt), (Op GPR64sp0:$Rn))]>;
+
+def : LDAXR<LDAXRW, i32, GPR32, load>;
+def : LDAXR<LDAXRX, i64, GPR64, load>;
+def : LDAXR<LDAXRB, i32, GPR32, zextloadi8>;
+def : LDAXR<LDAXRH, i32, GPR32, zextloadi16>;
+
+//TODO: maybe the status register should not be static...
+class STLXR<Instruction inst, ValueType SrcType, DAGOperand SrcOperand, SDPatternOperator Op> :
+  Semantics<inst, [(set GPR32:$Ws, 0), (Op (SrcType SrcOperand:$Rt), GPR64sp0:$Rn)]>;
+
+def : STLXR<STLXRB, i32, GPR32, truncstorei8>;
+def : STLXR<STLXRH, i32, GPR32, truncstorei16>;
+def : STLXR<STLXRW, i32, GPR32, store>;
+def : STLXR<STLXRX, i64, GPR64, store>;
+
+class STXP<Instruction inst, ValueType SrcType, DAGOperand SrcOperand, int StoreWidth> : Semantics<inst,
+  [(set GPR32:$Ws, 0), (store (SrcType SrcOperand:$Rt), GPR64sp0:$Rn), (store (SrcType SrcOperand:$Rt2), (add StoreWidth, GPR64sp0:$Rn))]>;
+
+def : STXP<STXPW, i32, GPR32, 4>;
+def : STXP<STXPX, i64, GPR64, 8>;
+
+def : STXP<STLXPW, i32, GPR32, 4>;
+def : STXP<STLXPX, i64, GPR64, 8>;
+
+
+def : Semantics<LDRSWl, [(set GPR64:$Rt, (sext (i32 (load (i64 (bitconvert am_ldrlit:$label))))))]>;
+def : Semantics<LDRWl, [(set GPR32:$Rt, (load (i64 (bitconvert am_ldrlit:$label))))]>;
+def : Semantics<LDRXl, [(set GPR64:$Rt, (load (i64 (bitconvert am_ldrlit:$label))))]>;
+def : Semantics<LDRSl, [(set (f32 FPR32:$Rt), (load (i64 (bitconvert am_ldrlit:$label))))]>;
+def : Semantics<LDRDl, [(set (f64 FPR64:$Rt), (load (i64 (bitconvert am_ldrlit:$label))))]>;
+def : Semantics<LDRQl, [(set (f128 FPR128:$Rt), (load (i64 (bitconvert am_ldrlit:$label))))]>;
+
+
+def : Semantics<SUBWri, [(set GPR32sp:$Rd, (sub GPR32sp:$Rn, addsub_shifted_imm32:$imm))]>;
+
+//Misc
+
+def : Semantics<ADR, [(set GPR64:$Xd, adrlabel:$label)]>;
+
+
+//FP
+
+class Sema_FMOV<Instruction inst, ValueType DstType, DAGOperand DstOperand, ValueType SrcType, DAGOperand SrcOperand> : Semantics<inst, [(set (DstType DstOperand:$Rd), (bitconvert (SrcType SrcOperand:$Rn)))]>;
+
+def : Sema_FMOV<FMOVXDr, f64, FPR64, i64, GPR64>;
+def : Sema_FMOV<FMOVWSr, f32, FPR32, i32, GPR32>;
+def : Sema_FMOV<FMOVDXr, i64, GPR64, f64, FPR64>;
+def : Sema_FMOV<FMOVSWr, i32, GPR32, f32, FPR32>;
+def : Sema_FMOV<FMOVSr, f32, FPR32, f32, FPR32>;
+def : Semantics<FMOVDr, [(set (f64 FPR64:$Rd), (f64 FPR64:$Rn))]>;
+
+//def : Semantics<SCVTFv1i64, [(set (f64 FPR64:$Rd), (bitconvert (AArch64sitof (i64 (bitconvert (f64 FPR64:$Rn))))))]>;
+
+def : Semantics<HINT, [(set WZR, imm0_127:$imm)]>;
+def : Semantics<BRK, [(set WZR, imm0_65535:$imm)]>;
+
+
+
+//VECTOR
+
+def : Semantics<INSvi8gpr, [(set V128:$dst, (vector_insert (v16i8 V128:$Rd), (i8 (trunc GPR32:$Rn)), VectorIndexB:$idx))]>;
+def : Semantics<INSvi16gpr, [(set V128:$dst, (vector_insert (v8i16 V128:$Rd), (i16 (trunc GPR32:$Rn)), VectorIndexH:$idx))]>;
+
+//LDAR STLR
+
+def : Semantics<LDARW, [(set GPR32:$Rt, (load GPR64sp0:$Rn))]>;
+def : Semantics<LDARX, [(set GPR64:$Rt, (load GPR64sp0:$Rn))]>;
+def : Semantics<LDARB, [(set GPR32:$Rt, (zext (i8 (load GPR64sp0:$Rn))))]>;
+def : Semantics<LDARH, [(set GPR32:$Rt, (zext (i16 (load GPR64sp0:$Rn))))]>;
+
+def : Semantics<LDXRW, [(set GPR32:$Rt, (load GPR64sp0:$Rn))]>;
+def : Semantics<LDXRX, [(set GPR64:$Rt, (load GPR64sp0:$Rn))]>;
+def : Semantics<LDXRB, [(set GPR32:$Rt, (zext (i8 (load GPR64sp0:$Rn))))]>;
+def : Semantics<LDXRH, [(set GPR32:$Rt, (zext (i16 (load GPR64sp0:$Rn))))]>;
+
+def : Semantics<STLRB , [(store (i8 (trunc GPR32:$Rt)), GPR64sp0:$Rn)]>;
+def : Semantics<STLRH , [(store (i16 (trunc GPR32:$Rt)), GPR64sp0:$Rn)]>;
+def : Semantics<STLRW , [(store GPR32:$Rt, GPR64sp0:$Rn)]>;
+def : Semantics<STLRX , [(store GPR64:$Rt, GPR64sp0:$Rn)]>;
+
+def : Semantics<STXRB, [(set GPR32:$Ws, 0), (store (i8 (trunc GPR32:$Rt)), GPR64sp0:$Rn)]>;
+def : Semantics<STXRH, [(set GPR32:$Ws, 0), (store (i16 (trunc GPR32:$Rt)), GPR64sp0:$Rn)]>;
+def : Semantics<STXRW, [(set GPR32:$Ws, 0), (store GPR32:$Rt, GPR64sp0:$Rn)]>;
+def : Semantics<STXRX, [(set GPR32:$Ws, 0), (store GPR64:$Rt, GPR64sp0:$Rn)]>;
+
+///////
+
+def : Semantics<BSLv16i8, [(set (v16i8 V128:$dst), (or (and (v16i8 V128:$Rd), (v16i8 V128:$Rn)), (and (vnot (v16i8 V128:$Rd)), (v16i8 V128:$Rm))))]>;
+
+
+
+
+
+//XTN
+
+def : Semantics<XTNv4i32, [(set (v4i32 V128:$dst), (bitconvert (or (srl (i128 (shl (i128 (bitconvert (v4i32 V128:$Rd))), (i128 64))), (i128 64)), (i128 (shl (i128 (zext (i64 (bitconvert (v2i32 (trunc (v2i64 V128:$Rn))))))), (i128 64))))))]>;
+def : Semantics<XTNv8i16, [(set (v8i16 V128:$dst), (bitconvert (or (srl (i128 (shl (i128 (bitconvert (v8i16 V128:$Rd))), (i128 64))), (i128 64)), (i128 (shl (i128 (zext (i64 (bitconvert (v4i16 (trunc (v4i32 V128:$Rn))))))), (i128 64))))))]>;
+def : Semantics<XTNv16i8, [(set (v16i8 V128:$dst), (bitconvert (or (srl (i128 (shl (i128 (bitconvert (v16i8 V128:$Rd))), (i128 64))), (i128 64)), (i128 (shl (i128 (zext (i64 (bitconvert (v8i8 (trunc (v8i16 V128:$Rn))))))), (i128 64))))))]>;
+
+//def : Semantics<SSHLLv2i32_shift, [(set V128:$Rd, )]>;
+
+
+def : Semantics<LDRHHpre, [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (set GPR32:$Rt, (zext (i16 (load GPR64sp:$wback))))]>;
+
+def : Semantics<MOVIv4i32, [(set (v4i32 V128:$Rd), (AArch64movi (shl imm0_255:$imm8, logical_vec_shift:$shift)))]>;
+def : Semantics<MOVIv8i16, [(set (v8i16 V128:$Rd), (AArch64movi (shl imm0_255:$imm8, logical_vec_hw_shift:$shift)))]>;
+
+def : Semantics<RBITXr, [(set GPR64:$Rd, (int_aarch64_rbit GPR64:$Rn))]>;
+def : Semantics<RBITWr, [(set GPR32:$Rd, (int_aarch64_rbit GPR32:$Rn))]>;
+
+def : Semantics<CPYi8, [(set FPR8:$dst, (bitconvert (i8 (vector_extract (v16i8 V128:$src), VectorIndexB:$idx))))]>;
+def : Semantics<CPYi16, [(set FPR16:$dst, (f16 (vector_extract (v8f16 V128:$src), VectorIndexH:$idx)))]>;
+def : Semantics<CPYi32, [(set FPR32:$dst, (f32 (vector_extract (v4f32 V128:$src), VectorIndexS:$idx)))]>;
+def : Semantics<CPYi64, [(set FPR64:$dst, (f64 (vector_extract (v2f64 V128:$src), VectorIndexD:$idx)))]>;
+
+def : Semantics<SQSHRNv16i8_shift, [(set (v16i8 V128:$dst), (v16i8 (bitconvert (or (shl (i128 (zext (i64 (bitconvert (v8i8 (int_aarch64_neon_sqshrn (v8i16 V128:$Rn), vecshiftR16Narrow:$imm)))))), (i128 64)), (i128 (bitconvert (v16i8 V128:$Rd)))))))]>;
+
+
+def : Semantics<MVNIv8i16, [(set (v8i16 V128:$Rd), (AArch64mvni_shift imm0_255:$imm8, (i32 imm:$shift)))]>;
+def : Semantics<MOVIv4i16, [(set (v4i16 V64:$Rd), (AArch64movi_shift imm0_255:$imm8, (i32 imm:$shift)))]>;
+def : Semantics<MOVIv2i32, [(set (v2i32 V64:$Rd), (AArch64movi_shift imm0_255:$imm8, (i32 imm:$shift)))]>;
+def : Semantics<MVNIv4i16, [(set (v4i16 V64:$Rd), (AArch64mvni_shift imm0_255:$imm8, (i32 imm:$shift)))]>;
+def : Semantics<MVNIv4i32, [(set (v4i32 V128:$Rd), (AArch64mvni_shift imm0_255:$imm8, (i32 imm:$shift)))]>;
+
+def : Semantics<RSHRNv8i16_shift, [(set (v8i16 V128:$dst), (v8i16 (bitconvert (or (i128 (bitconvert (v4i32 V128:$Rd))), (shl (i128 (zext (i64 (bitconvert (v4i16 (int_aarch64_neon_rshrn (v4i32 V128:$Rn), vecshiftR32Narrow:$imm)))))), (i128 64))))))]>;
+
+def : Semantics<SMOVvi32to64, [(set (i64 GPR64:$Rd), (i64 (sext (vector_extract (v4i32 V128:$Rn), VectorIndexS:$idx))))]>;
+
+
+def : Semantics<STRSpre, [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (store (f32 FPR32:$Rt), GPR64sp:$Rn)]>;
+
+def : Semantics<LDRSHXpre, [(set GPR64sp:$wback, (add GPR64sp:$Rn, simm9:$offset)), (set GPR64:$Rt, (sext (i16 (load GPR64sp:$Rn))))]>;
+
+
+multiclass STLine<string inst, DAGOperand loadOperand, ValueType loadType, DAGOperand incrOperand> {
+    def : Semantics<!cast<Instruction>(inst), [(store  (loadType (bitconvert loadOperand:$Vt)), GPR64sp:$Rn)]>;
+    def : Semantics<!cast<Instruction>(inst#"_POST"), [(store  (loadType (bitconvert loadOperand:$Vt)), GPR64sp:$Rn), (set GPR64sp:$wback, (add GPR64sp:$Rn, incrOperand:$Xm))]>;
+}
+
+//defm : STLine<"ST2Twov2d", VecListTwo2d, v4i64, GPR64pi32>;
+//defm : STLine<"ST2Twov2s", VecListTwo2s, v4i32, GPR64pi16>;
+//defm : STLine<"ST2Twov4s", VecListTwo4s, v8i32, GPR64pi32>;
+//defm : STLine<"ST2Twov4h", VecListTwo4h, v8i16, GPR64pi16>;
+//defm : STLine<"ST2Twov8h", VecListTwo8h, v16i16, GPR64pi32>;
+//defm : STLine<"ST2Twov8b", VecListTwo8b, v16i8, GPR64pi16>;
+//defm : STLine<"ST2Twov16b", VecListTwo16b, v32i8, GPR64pi32>;
+
+
+
+//multiclass foobar {
+//def : Semantics<ST2Twov2d, [(store  (v4i64 (bitconvert VecListTwo2d:$Vt)), GPR64sp:$Rn)]>;
+//def : Semantics<ST2Twov8b, [(store  (v16i8 (bitconvert VecListTwo8b:$Vt)), GPR64sp:$Rn)]>;
+//def : Semantics<LD2Twov2d, [(set VecListTwo2d:$Vt, (bitconvert (v4i64 (load GPR64sp:$Rn))))]>;
+//}
diff --git a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 20db170..5f64cee 100644
--- a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -896,14 +896,16 @@ public:
       AArch64MCRegisterClasses[AArch64::GPR64RegClassID].contains(Reg.RegNum);
   }
   bool isWSeqPair() const {
-    return Kind == k_Register && !Reg.isVector &&
-           AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID].contains(
-               Reg.RegNum);
+      return false;
+//    return Kind == k_Register && !Reg.isVector &&
+//           AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID].contains(
+//               Reg.RegNum);
   }
   bool isXSeqPair() const {
-    return Kind == k_Register && !Reg.isVector &&
-           AArch64MCRegisterClasses[AArch64::XSeqPairsClassRegClassID].contains(
-               Reg.RegNum);
+    return false;
+// /    return Kind == k_Register && !Reg.isVector &&
+//           AArch64MCRegisterClasses[AArch64::XSeqPairsClassRegClassID].contains(
+//               Reg.RegNum);
   }
 
   bool isGPR64sp0() const {
@@ -4476,11 +4478,11 @@ AArch64AsmParser::tryParseGPRSeqPair(OperandVector &Operands) {
   
   unsigned Pair = 0;
   if(isXReg) {
-    Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube64,
-           &AArch64MCRegisterClasses[AArch64::XSeqPairsClassRegClassID]);
+//    Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube64,
+//           &AArch64MCRegisterClasses[AArch64::XSeqPairsClassRegClassID]);
   } else {
-    Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube32,
-           &AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID]);
+//    Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube32,
+//           &AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID]);
   }
 
   Operands.push_back(AArch64Operand::CreateReg(Pair, false, S, getLoc(),
diff --git a/lib/Target/AArch64/CMakeLists.txt b/lib/Target/AArch64/CMakeLists.txt
index f26327f..b844e21 100644
--- a/lib/Target/AArch64/CMakeLists.txt
+++ b/lib/Target/AArch64/CMakeLists.txt
@@ -12,6 +12,7 @@ tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM AArch64GenSema.inc -gen-semantics)
 add_public_tablegen_target(AArch64CommonTableGen)
 
 add_llvm_target(AArch64CodeGen
@@ -53,3 +54,4 @@ add_subdirectory(Disassembler)
 add_subdirectory(InstPrinter)
 add_subdirectory(MCTargetDesc)
 add_subdirectory(Utils)
+add_subdirectory(DC)
diff --git a/lib/Target/AArch64/DC/AArch64DCInfo.cpp b/lib/Target/AArch64/DC/AArch64DCInfo.cpp
new file mode 100644
index 0000000..516d28f
--- /dev/null
+++ b/lib/Target/AArch64/DC/AArch64DCInfo.cpp
@@ -0,0 +1,38 @@
+#include "AArch64InstrSema.h"
+#include "AArch64RegisterSema.h"
+#include "llvm/Support/TargetRegistry.h"
+
+using namespace llvm;
+
+DCInstrSema *createAArch64DCInstrSema(StringRef TT,
+                                  DCRegisterSema &DRS,
+                                  const MCRegisterInfo &MRI,
+                                  const MCInstrInfo &MII) {
+  (void)MRI;
+  (void)MII;
+  return new AArch64InstrSema(DRS);
+}
+
+DCRegisterSema *createAArch64DCRegisterSema(StringRef TT,
+                                        const MCRegisterInfo &MRI,
+                                        const MCInstrInfo &MII,
+                                        const DataLayout &DL) {
+  return new AArch64RegisterSema(MRI, MII, DL);
+}
+
+// Force static initialization.
+extern "C" void LLVMInitializeAArch64TargetDC() {
+  // These are only available for x86_64:
+  // Register the DC instruction semantic info.
+  TargetRegistry::RegisterDCInstrSema(TheAArch64leTarget,
+                                      createAArch64DCInstrSema);
+  TargetRegistry::RegisterDCInstrSema(TheAArch64beTarget,
+                                      createAArch64DCInstrSema);
+
+  // Register the DC register semantic info.
+  TargetRegistry::RegisterDCRegisterSema(TheAArch64leTarget,
+                                         createAArch64DCRegisterSema);
+ TargetRegistry::RegisterDCRegisterSema(TheAArch64beTarget,
+                                        createAArch64DCRegisterSema);
+
+}
diff --git a/lib/Target/AArch64/DC/AArch64InstrSema.cpp b/lib/Target/AArch64/DC/AArch64InstrSema.cpp
new file mode 100644
index 0000000..a526778
--- /dev/null
+++ b/lib/Target/AArch64/DC/AArch64InstrSema.cpp
@@ -0,0 +1,2993 @@
+#include "AArch64InstrSema.h"
+#include "AArch64RegisterSema.h"
+#include "AArch64ISelLowering.h"
+#include "MCTargetDesc/AArch64MCTargetDesc.h"
+#include "llvm/ADT/APInt.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/CodeGen/ISDOpcodes.h"
+#include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/IR/BasicBlock.h"
+#include "llvm/IR/Constants.h"
+#include "llvm/IR/DerivedTypes.h"
+#include "llvm/IR/Function.h"
+#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/InstrTypes.h"
+#include "llvm/IR/Instruction.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/IR/LLVMContext.h"
+#include "llvm/IR/Module.h"
+#include "llvm/IR/Type.h"
+#include "llvm/IR/TypeBuilder.h"
+#include "AArch64GenSema.inc"
+#include "MCTargetDesc/AArch64AddressingModes.h"
+#include "llvm/Support/Debug.h"
+
+#define DEBUG_TYPE "dc-sema"
+
+using namespace llvm;
+
+int64_t getOnes(int64_t Num) {
+    if (!Num)
+        return 0;
+    int64_t O = 0x1;
+    while (--Num) {
+        O = (O << 1) | 0x1;
+    }
+    return O;
+}
+
+namespace llvm {
+    namespace AArch64 {
+        enum NZCVShift {
+            N = 31,
+            Z = 30,
+            C = 29,
+            V = 28,
+        };
+    }
+}
+
+AArch64InstrSema::AArch64InstrSema(DCRegisterSema &DRS) :
+        DCInstrSema(AArch64::OpcodeToSemaIdx, AArch64::InstSemantics, AArch64::ConstantArray,
+                    DRS) {
+
+}
+
+bool AArch64InstrSema::translateTargetInst() {
+    printInstruction();
+    unsigned Opcode = CurrentInst->Inst.getOpcode();
+    switch (Opcode) {
+
+      //due to the size of this cases they were moved to a separate file
+#include "LD_ST_cases.h"
+
+        case AArch64::RET: {
+            Builder->CreateBr(ExitBB);
+            return true;
+        }
+        case AArch64::UBFMXri:
+        case AArch64::UBFMWri:
+        case AArch64::BFMWri:
+        case AArch64::BFMXri:{
+            int64_t DstRegNo = 0;
+            Value *Src = NULL;
+            int64_t Rotate = NULL;
+            int64_t Left = NULL;
+
+            switch (Opcode) {
+                case AArch64::UBFMXri:
+                case AArch64::UBFMWri: {
+                    DstRegNo = CurrentInst->Inst.getOperand(0).getReg();
+                    Src = getReg(CurrentInst->Inst.getOperand(1).getReg());
+                    Rotate = CurrentInst->Inst.getOperand(2).getImm();
+                    Left = CurrentInst->Inst.getOperand(3).getImm();
+                    break;
+                }
+                case AArch64::BFMXri:
+                case AArch64::BFMWri: {
+                    DstRegNo = CurrentInst->Inst.getOperand(0).getReg();
+                    Src = getReg(CurrentInst->Inst.getOperand(2).getReg());
+                    Rotate = CurrentInst->Inst.getOperand(3).getImm();
+                    Left = CurrentInst->Inst.getOperand(4).getImm();
+                    break;
+                }
+            }
+
+            int64_t C = 0;
+
+            Value *Result = NULL;
+
+            if (Left >= Rotate) {
+                C = getOnes(Left - Rotate + 1);
+                C = C << Rotate;
+                Result = Builder->CreateAnd(Src, C);
+                Result = Builder->CreateLShr(Result, Rotate);
+            } else {
+                C = getOnes(Left + 1);
+                Result = Builder->CreateAnd(Src, C);
+                Result = Builder->CreateShl(Result, Src->getType()->getIntegerBitWidth() - Rotate);
+                C = C << (Src->getType()->getIntegerBitWidth() - Rotate);
+            }
+
+            switch (Opcode) {
+                default: {
+                    break;
+                }
+                case AArch64::BFMWri: {
+                    Value *Dst = getReg(DstRegNo);
+                    C = ~C;
+                    Value *Old = Builder->CreateAnd(Dst, C);
+                    Result = Builder->CreateOr(Old, Result);
+                    break;
+                }
+            }
+
+            setReg(DstRegNo, Result);
+            return true;
+        }
+        case AArch64::MOVKXi:
+        case AArch64::MOVKWi: {
+            uint64_t DstRegNo = CurrentInst->Inst.getOperand(0).getReg();
+            Value *Src = getReg(CurrentInst->Inst.getOperand(1).getReg());
+            int64_t Imm = CurrentInst->Inst.getOperand(2).getImm();
+            int64_t Shift = CurrentInst->Inst.getOperand(3).getImm();
+            uint64_t Mask = ~(0xFFFFL << Shift);
+            Imm = Imm << Shift;
+            Value *Val = Builder->CreateAnd(Src, Mask);
+            Val = Builder->CreateOr(Src, Imm);
+            setReg(DstRegNo, Val);
+            return true;
+        }
+        case AArch64::SBFMWri:
+        case AArch64::SBFMXri: {
+            int64_t DstRegNo = CurrentInst->Inst.getOperand(0).getReg();
+            Value *Src = getReg(CurrentInst->Inst.getOperand(1).getReg());
+            int64_t Rotate = CurrentInst->Inst.getOperand(2).getImm();
+            int64_t Left = CurrentInst->Inst.getOperand(3).getImm();
+
+            uint64_t Width = Src->getType()->getIntegerBitWidth();
+            if (Left >= Rotate) {
+                int64_t C = getOnes(Left - Rotate + 1);
+                C = C << Rotate;
+                Src = Builder->CreateAnd(Src, C);
+                Src = Builder->CreateLShr(Src, Rotate);
+                Src = Builder->CreateTrunc(Src, Builder->getIntNTy(Left - Rotate + 1));
+                Src = Builder->CreateSExt(Src, Builder->getIntNTy(Width));
+            } else {
+                int64_t C = getOnes(Left + 1);
+                Src = Builder->CreateAnd(Src, C);
+                Src = Builder->CreateTrunc(Src, Builder->getIntNTy(Left));
+                Src = Builder->CreateSExt(Src, Builder->getIntNTy(Width));
+                Src = Builder->CreateShl(Src, Src->getType()->getIntegerBitWidth() - Rotate);
+            }
+
+            setReg(DstRegNo, Src);
+
+            return true;
+        }
+        case AArch64::FADDPv2i32p: {
+            Value *srcReg = getReg(CurrentInst->Inst.getOperand(1).getReg());
+            srcReg = Builder->CreateBitCast(srcReg, VectorType::get(Builder->getFloatTy(), 2));
+            Value *res = Builder->CreateFAdd(Builder->CreateExtractElement(srcReg, (uint64_t)0), Builder->CreateExtractElement(srcReg, 1));
+            setReg(CurrentInst->Inst.getOperand(0).getReg(), Builder->CreateBitCast(res, Builder->getInt32Ty()));
+            return true;
+        }
+        case AArch64::FADDPv2i64p: {
+            Value *srcReg = getReg(CurrentInst->Inst.getOperand(1).getReg());
+            srcReg = Builder->CreateBitCast(srcReg, VectorType::get(Builder->getDoubleTy(), 2));
+            Value *res = Builder->CreateFAdd(Builder->CreateExtractElement(srcReg, (uint64_t)0), Builder->CreateExtractElement(srcReg, 1));
+            setReg(CurrentInst->Inst.getOperand(0).getReg(), Builder->CreateBitCast(res, Builder->getInt64Ty()));
+            return true;
+        }
+            //Prefetch instructions are not handled (which is valid)
+        case AArch64::PRFMl:
+        case AArch64::PRFMroW:
+        case AArch64::PRFMroX:
+        case AArch64::PRFMui:
+        case AArch64::PRFUMi: {
+            return true;
+        }
+        case AArch64::DMB: {
+            return true;
+        }
+
+
+        case AArch64::TBLv16i8Four:
+        case AArch64::TBLv16i8One:
+        case AArch64::TBLv16i8Three:
+        case AArch64::TBLv16i8Two:
+        case AArch64::TBLv8i8Four:
+        case AArch64::TBLv8i8One:
+        case AArch64::TBLv8i8Three:
+        case AArch64::TBLv8i8Two:
+        case AArch64::TBXv16i8Four:
+        case AArch64::TBXv16i8One:
+        case AArch64::TBXv16i8Three:
+        case AArch64::TBXv16i8Two:
+        case AArch64::TBXv8i8Four:
+        case AArch64::TBXv8i8One:
+        case AArch64::TBXv8i8Three:
+        case AArch64::TBXv8i8Two:
+        {
+            //FIXME
+            errs() << "TBLv16i8One not handled yet!\n";
+            return true;
+        }
+        case AArch64::FCVTLv2i32:
+        case AArch64::FCVTLv4i16:
+        case AArch64::FCVTLv4i32:
+        case AArch64::FCVTLv8i16:
+        case AArch64::FCVTNv2i32:
+        case AArch64::FCVTNv4i16:
+        case AArch64::FCVTNv4i32:
+        case AArch64::FCVTNv8i16: {
+            uint64_t DstRegNo = CurrentInst->Inst.getOperand(0).getReg();
+            Value *Src = getReg(CurrentInst->Inst.getOperand(1).getReg());
+            Value *Dst = getReg(DstRegNo);
+            Src = Builder->CreateZExtOrTrunc(Src, Dst->getType());
+            setReg(DstRegNo, Src);
+            return true;
+        }
+        case AArch64::FMLAv4i32_indexed:
+        case AArch64::FMLSv1i32_indexed:
+        case AArch64::FMLSv1i64_indexed:
+        case AArch64::FMLAv2i32_indexed:
+        case AArch64::FMLAv2i64_indexed:
+        case AArch64::FMLAv1i32_indexed:
+        case AArch64::FMLAv1i64_indexed:
+        {
+            return true;
+        }
+        case AArch64::SHLLv16i8:
+        case AArch64::SHLLv2i32:
+        case AArch64::SHLLv4i16:
+        case AArch64::SHLLv4i32:
+        case AArch64::SHLLv8i16:
+        case AArch64::SHLLv8i8:
+        {
+            return true;
+        }
+        case AArch64::SHRNv8i16_shift:
+        {
+            return true;
+        }
+        case AArch64::SQXTUNv16i8:
+        case AArch64::SQXTNv8i16:
+        case AArch64::UQXTNv8i16:
+        {
+            return true;
+        }
+    }
+    if (Idx) {
+        DEBUG(errs() << "Use table\n");
+        return false;
+    }
+    // llvm_unreachable("not handled yet");
+    //FIXME: unhandled instruction should lead to an error...
+    return true;
+}
+
+void AArch64InstrSema::translateCustomOperand(unsigned OperandType, unsigned MIOperandNo) {
+    switch (OperandType) {
+        default: {
+            errs() << "Unhandled OpType: " << OperandType << "\n";
+            errs() << utohexstr(CurrentInst->Address) << "\n";
+            llvm_unreachable("");
+            break;
+        }
+        case AArch64::OpTypes::ADDSanonymous_755: {
+            DEBUG(errs() << "Operand:ADDSanonymous_755\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::SUBanonymous_745:
+        //arith_extended_reg32
+        case AArch64::OpTypes::ADDanonymous_745:
+        //arith_extended_reg32to64<i64>
+        case AArch64::OpTypes::ADDanonymous_746: {
+
+            Value *Reg = getReg(getRegOp(MIOperandNo));
+            uint64_t arith_extend64 = AArch64_AM::getArithExtendType(getImmOp(MIOperandNo + 1));
+            Type *ExtType = NULL;
+
+            switch (OperandType) {
+                case AArch64::OpTypes::ADDanonymous_746: {
+                    DEBUG(errs() << "Operand:ADDanonymous_746\n");
+                    ExtType = Builder->getInt64Ty();
+                    break;
+                }
+                case AArch64::OpTypes::SUBanonymous_745: {
+                    DEBUG(errs() << "Operand:ADDanonymous_745\n");
+                    ExtType = Builder->getInt32Ty();
+                    break;
+                }
+                case AArch64::OpTypes::ADDanonymous_745: {
+                    DEBUG(errs() << "Operand:ADDanonymous_745\n");
+                    ExtType = Builder->getInt32Ty();
+                    break;
+                }
+            }
+
+            registerResult(ArithExtend(Reg, ExtType, arith_extend64));
+            break;
+        }
+        //arith_extended_reg32to64
+        case AArch64::OpTypes::SUBanonymous_746:
+        //arith_extended_reg32
+        case AArch64::OpTypes::SUBSanonymous_755:
+        case AArch64::OpTypes::SUBSanonymous_756:
+        case AArch64::OpTypes::ADDSanonymous_756:{
+            DEBUG(errs() << "Operand:SUBSanonymous_755\n");
+            Value *Reg = getReg(getRegOp(MIOperandNo));
+            uint64_t arith_extend64 = AArch64_AM::getArithExtendType(getImmOp(MIOperandNo + 1));
+
+            Type *ExtType = NULL;
+
+            switch (OperandType) {
+                case AArch64::OpTypes::SUBSanonymous_755: {
+                    DEBUG(errs() << "Operand:SUBSanonymous_755\n");
+                    ExtType = Builder->getInt32Ty();
+                    break;
+                }
+                case AArch64::OpTypes::SUBanonymous_746: {
+                    DEBUG(errs() << "Operand:SUBanonymous_746\n");
+                    ExtType = Builder->getInt64Ty();
+                    break;
+                }
+                case AArch64::OpTypes::SUBSanonymous_756: {
+                    DEBUG(errs() << "Operand:SUBSanonymous_756\n");
+                    ExtType = Builder->getInt64Ty();
+                    break;
+                }
+                case AArch64::OpTypes::ADDSanonymous_756: {
+                    DEBUG(errs() << "Operand:ADDSanonymous_756\n");
+                    ExtType = Builder->getInt64Ty();
+                    break;
+                }
+            }
+            registerResult(ArithExtend(Reg, ExtType, arith_extend64));
+
+            break;
+        }
+        case AArch64::OpTypes::VectorIndex1: {
+            DEBUG(errs() << "Operand:VectorIndex1\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::VectorIndexB: {
+            DEBUG(errs() << "Operand:VectorIndexB\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::VectorIndexD: {
+            DEBUG(errs() << "Operand:VectorIndexD\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::VectorIndexH: {
+            DEBUG(errs() << "Operand:VectorIndexH\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::VectorIndexS: {
+            DEBUG(errs() << "Operand:VectorIndexS\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::addsub_shifted_imm32:
+        case AArch64::OpTypes::addsub_shifted_imm64:{
+            switch (OperandType) {
+                case AArch64::OpTypes::addsub_shifted_imm32:
+                    DEBUG(errs() << "Operand:addsub_shifted_imm32\n");
+                    break;
+                case AArch64::OpTypes::addsub_shifted_imm64:
+                    DEBUG(errs() << "Operand:addsub_shifted_imm64\n");
+                    break;
+            }
+
+            uint64_t Imm = getImmOp(MIOperandNo);
+            uint64_t Shift = getImmOp(MIOperandNo + 1);
+
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst =
+                    ConstantInt::get(cast<IntegerType>(ResType), Imm << Shift);
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::addsub_shifted_imm32_neg: {
+            DEBUG(errs() << "Operand:addsub_shifted_imm32_neg\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::addsub_shifted_imm64_neg: {
+            DEBUG(errs() << "Operand:addsub_shifted_imm64_neg\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::adrlabel: {
+            DEBUG(errs() << "Operand:adrlabel\n");
+            uint64_t Target = CurrentInst->Address + (getImmOp(MIOperandNo));
+            registerResult(Builder->getInt64(Target));
+            break;
+        }
+        case AArch64::OpTypes::adrplabel: {
+            DEBUG(errs() << "Operand:adrplabel\n");
+            uint64_t Offset = getImmOp(MIOperandNo) << 12;
+            registerResult(Builder->getInt64(Offset));
+            break;
+        }
+        case AArch64::OpTypes::am_bl_target: {
+            DEBUG(errs() << "Operand:am_bl_target\n");
+            uint64_t Target = CurrentInst->Address + (getImmOp(MIOperandNo) * 4);
+            registerResult(Builder->getInt64(Target));
+            break;
+        }
+        case AArch64::OpTypes::am_b_target: {
+            DEBUG(errs() << "Operand:am_b_target\n");
+            uint64_t Target = CurrentInst->Address + (getImmOp(MIOperandNo) * 4);
+            registerResult(Builder->getInt64(Target));
+            break;
+        }
+        case AArch64::OpTypes::am_brcond: {
+            DEBUG(errs() << "Operand:am_brcond\n");
+            uint64_t Target = CurrentInst->Address + (getImmOp(MIOperandNo) * 4);
+            registerResult(getOrCreateBasicBlock(Target));
+            registerResult(getOrCreateBasicBlock(getBasicBlockEndAddress()));
+            break;
+        }
+        case AArch64::OpTypes::am_ldrlit: {
+            DEBUG(errs() << "Operand:am_ldrlit\n");
+            uint64_t Target = CurrentInst->Address + (getImmOp(MIOperandNo) * 4);
+            registerResult(Builder->getInt64(Target));
+            break;
+        }
+        case AArch64::OpTypes::am_tbrcond: {
+            DEBUG(errs() << "Operand:am_tbrcond\n");
+            uint64_t Target = CurrentInst->Address + (getImmOp(MIOperandNo) * 4);
+            registerResult(Builder->getInt64(Target));
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1014_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1014_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1015_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1015_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1016_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1016_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1017_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1017_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1018_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1018_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1019_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1019_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1020_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1020_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1021_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1021_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1022_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1022_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1023_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1023_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1024_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1024_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::anonymous_1025_movimm: {
+            DEBUG(errs() << "Operand:anonymous_1025_movimm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::arith_extend: {
+            DEBUG(errs() << "Operand:arith_extend\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::arith_extend64: {
+            DEBUG(errs() << "Operand:arith_extend64\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::arith_extendlsl64: {
+            DEBUG(errs() << "Operand:arith_extendlsl64\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::arith_shift32: {
+            DEBUG(errs() << "Operand:arith_shift32\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::arith_shift64: {
+            DEBUG(errs() << "Operand:arith_shift64\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::arith_shifted_reg32:
+        case AArch64::OpTypes::arith_shifted_reg64: {
+            switch (OperandType) {
+                case AArch64::OpTypes::arith_shifted_reg64:
+                    DEBUG(errs() << "Operand:arith_shifted_reg64\n");
+                    break;
+                case AArch64::OpTypes::arith_shifted_reg32:
+                    DEBUG(errs() << "Operand:arith_shifted_reg32\n");
+                    break;
+            }
+            Value *OpReg = getReg(getRegOp(MIOperandNo));
+            OpReg = Builder->CreateShl(OpReg, getImmOp(MIOperandNo + 1));
+            registerResult(OpReg);
+            break;
+        }
+        case AArch64::OpTypes::barrier_op: {
+            DEBUG(errs() << "Operand:barrier_op\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::ccode: {
+            DEBUG(errs() << "Operand:ccode\n");
+            uint64_t CC = getImmOp(MIOperandNo);
+            Value *Cmp = NULL;
+            switch (CC) {
+                case AArch64CC::EQ: {
+                    DEBUG(errs() << "CC: EQ\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *Z_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::Z));
+                    Cmp = Builder->CreateICmpNE(Z_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::NE: {
+                    DEBUG(errs() << "CC: NE\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *Z_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::Z));
+                    Cmp = Builder->CreateICmpEQ(Z_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::HS: {
+                    DEBUG(errs() << "CC: HS\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *C_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+                    Cmp = Builder->CreateICmpNE(C_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::LO: {
+                    DEBUG(errs() << "CC: LO\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *C_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+                    Cmp = Builder->CreateICmpEQ(C_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::MI: {
+                    DEBUG(errs() << "CC: MI\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *N_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::N));
+                    Cmp = Builder->CreateICmpNE(N_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::PL: {
+                    DEBUG(errs() << "CC: PL\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *N_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::N));
+                    Cmp = Builder->CreateICmpEQ(N_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::VS: {
+                    DEBUG(errs() << "CC: VS\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *V_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::V));
+                    Cmp = Builder->CreateICmpNE(V_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::VC: {
+                    DEBUG(errs() << "CC: VC\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *V_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::V));
+                    Cmp = Builder->CreateICmpEQ(V_flag, Builder->getInt32(0));
+                    break;
+                }
+                case AArch64CC::HI: {
+                    DEBUG(errs() << "CC: HI\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *C_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+                    Value *Z_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::Z));
+                    Cmp = Builder->CreateAnd(Builder->CreateICmpNE(C_flag, Builder->getInt32(0)), Builder->CreateICmpEQ(Z_flag, Builder->getInt32(0)));
+                    break;
+                }
+                case AArch64CC::LS: {
+                    DEBUG(errs() << "CC: LS\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *C_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+                    Value *Z_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::Z));
+                    Cmp = Builder->CreateOr(Builder->CreateICmpEQ(C_flag, Builder->getInt32(0)), Builder->CreateICmpNE(Z_flag, Builder->getInt32(0)));
+                    break;
+                }
+                case AArch64CC::GE: {
+                    DEBUG(errs() << "CC: GE\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *N_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::N));
+                    Value *V_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::V));
+                    Cmp = Builder->CreateICmpEQ(N_flag, V_flag);
+                    break;
+                }
+                case AArch64CC::LT: {
+                    DEBUG(errs() << "CC: LT\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *N_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::N));
+                    Value *V_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::V));
+                    Cmp = Builder->CreateICmpNE(N_flag, V_flag);
+                    break;
+                }
+                case AArch64CC::GT: {
+                    DEBUG(errs() << "CC: GT\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *Z_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::Z));
+                    Value *N_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::N));
+                    Value *V_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::V));
+                    Cmp = Builder->CreateICmpEQ(N_flag, V_flag);
+                    Cmp = Builder->CreateAnd(Builder->CreateICmpEQ(Z_flag, Builder->getInt32(0)), Cmp);
+                    break;
+                }
+                case AArch64CC::LE: {
+                    DEBUG(errs() << "CC: LE\n");
+                    Value *NZCV = getReg(AArch64::NZCV);
+                    Value *Z_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::Z));
+                    Value *N_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::N));
+                    Value *V_flag = Builder->CreateAnd(NZCV, Builder->getInt32(0x1 << AArch64::NZCVShift::V));
+                    Cmp = Builder->CreateOr(Builder->CreateICmpNE(Z_flag, Builder->getInt32(0)), Builder->CreateICmpNE(N_flag, V_flag));
+                    break;
+                }
+                case AArch64CC::AL: {
+                    DEBUG(errs() << "CC: AL\n");
+                    Cmp = Builder->getInt1(true);
+                    break;
+                }
+                case AArch64CC::NV: {
+                    DEBUG(errs() << "CC: NV\n");
+                    llvm_unreachable("");
+                    break;
+                }
+            }
+            assert(Cmp);
+            registerResult(Cmp);
+            break;
+        }
+        case AArch64::OpTypes::f32imm: {
+            DEBUG(errs() << "Operand:f32imm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::f64imm: {
+            DEBUG(errs() << "Operand:f64imm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::fixedpoint_f32_i32: {
+            DEBUG(errs() << "Operand:fixedpoint_f32_i32\n");
+            uint64_t FBits = getImmOp(MIOperandNo);
+            registerResult(ConstantFP::get(Builder->getFloatTy(), pow(2.0, FBits)));
+            break;
+        }
+        case AArch64::OpTypes::fixedpoint_f32_i64: {
+            DEBUG(errs() << "Operand:fixedpoint_f32_i64\n");
+            uint64_t FBits = getImmOp(MIOperandNo);
+            registerResult(ConstantFP::get(Builder->getFloatTy(), pow(2.0, FBits)));
+            break;
+        }
+        case AArch64::OpTypes::fixedpoint_f64_i32: {
+            DEBUG(errs() << "Operand:fixedpoint_f64_i32\n");
+            uint64_t FBits = getImmOp(MIOperandNo);
+            registerResult(ConstantFP::get(Builder->getDoubleTy(), pow(2.0, FBits)));
+            break;
+        }
+        case AArch64::OpTypes::fixedpoint_f64_i64: {
+            DEBUG(errs() << "Operand:fixedpoint_f64_i64\n");
+            uint64_t FBits = getImmOp(MIOperandNo);
+            registerResult(ConstantFP::get(Builder->getDoubleTy(), pow(2.0, FBits)));
+            break;
+        }
+        case AArch64::OpTypes::fpimm32:
+        case AArch64::OpTypes::fpimm64: {
+
+            float FPImm = AArch64_AM::getFPImmFloat(getImmOp(MIOperandNo));
+            Type *Ty = NULL;
+            switch (OperandType) {
+                case AArch64::OpTypes::fpimm64: {
+                    DEBUG(errs() << "Operand:fpimm64\n");
+                    Ty = Builder->getDoubleTy();
+                    break;
+                }
+                case AArch64::OpTypes::fpimm32: {
+                    DEBUG(errs() << "Operand:fpimm32\n");
+                    Ty = Builder->getFloatTy();
+                    break;
+                }
+            }
+            registerResult(ConstantFP::get(Ty, FPImm));
+            break;
+        }
+        case AArch64::OpTypes::fpimm8: {
+            DEBUG(errs() << "Operand:fpimm8\n");
+            registerResult(Builder->getInt8(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::i16imm: {
+            DEBUG(errs() << "Operand:i16imm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i1imm: {
+            DEBUG(errs() << "Operand:i1imm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i32imm: {
+            DEBUG(errs() << "Operand:i32imm\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::i32shift_a: {
+            DEBUG(errs() << "Operand:i32shift_a\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i32shift_b: {
+            DEBUG(errs() << "Operand:i32shift_b\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i32shift_sext_i16: {
+            DEBUG(errs() << "Operand:i32shift_sext_i16\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i32shift_sext_i8: {
+            DEBUG(errs() << "Operand:i32shift_sext_i8\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i64imm: {
+            DEBUG(errs() << "Operand:i64imm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i64shift_a: {
+            DEBUG(errs() << "Operand:i64shift_a\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i64shift_b: {
+            DEBUG(errs() << "Operand:i64shift_b\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i64shift_sext_i16: {
+            DEBUG(errs() << "Operand:i64shift_sext_i16\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i64shift_sext_i32: {
+            DEBUG(errs() << "Operand:i64shift_sext_i32\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i64shift_sext_i8: {
+            DEBUG(errs() << "Operand:i64shift_sext_i8\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::i8imm: {
+            DEBUG(errs() << "Operand:i8imm\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::imm0_127: {
+            DEBUG(errs() << "Operand:imm0_127\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::imm0_15: {
+            DEBUG(errs() << "Operand:imm0_15\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::imm0_255: {
+            DEBUG(errs() << "Operand:imm0_255\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::imm0_31: {
+            DEBUG(errs() << "Operand:imm0_31\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::imm0_63: {
+            DEBUG(errs() << "Operand:imm0_63\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::imm0_65535: {
+            DEBUG(errs() << "Operand:imm0_65535\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::imm0_7: {
+            DEBUG(errs() << "Operand:imm0_7\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::imm32_0_15:
+        case AArch64::OpTypes::imm32_0_31: {
+            switch (OperandType) {
+                case AArch64::OpTypes::imm32_0_15:
+                    DEBUG(errs() << "Operand:imm32_0_15\n");
+                    break;
+                case AArch64::OpTypes::imm32_0_31:
+                    DEBUG(errs() << "Operand:imm32_0_31\n");
+                    break;
+            }
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::inv_ccode: {
+            DEBUG(errs() << "Operand:inv_ccode\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::logical_imm32: {
+            DEBUG(errs() << "Operand:logical_imm32\n");
+            uint64_t logical_imm = AArch64_AM::decodeLogicalImmediate(getImmOp(MIOperandNo), 32);
+            registerResult(Builder->getInt32(logical_imm));
+            break;
+        }
+        case AArch64::OpTypes::logical_imm32_not: {
+            DEBUG(errs() << "Operand:logical_imm32_not\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::logical_imm64: {
+            DEBUG(errs() << "Operand:logical_imm64\n");
+            uint64_t logical_imm = AArch64_AM::decodeLogicalImmediate(getImmOp(MIOperandNo), 64);
+            registerResult(Builder->getInt64(logical_imm));
+            break;
+        }
+        case AArch64::OpTypes::logical_imm64_not: {
+            DEBUG(errs() << "Operand:logical_imm64_not\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::logical_shift32: {
+            DEBUG(errs() << "Operand:logical_shift32\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::logical_shift64: {
+            DEBUG(errs() << "Operand:logical_shift64\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::logical_shifted_reg32:
+        case AArch64::OpTypes::logical_shifted_reg64: {
+            switch (OperandType) {
+                case AArch64::OpTypes::logical_shifted_reg64:
+                    DEBUG(errs() << "Operand:logical_shifted_reg64\n");
+                    break;
+                case AArch64::OpTypes::logical_shifted_reg32:
+                    DEBUG(errs() << "Operand:logical_shifted_reg32\n");
+                    break;
+            }
+
+            Value *Reg = getReg(getRegOp(MIOperandNo));
+            uint64_t Shift = getImmOp(MIOperandNo + 1);
+
+            if (Shift > Reg->getType()->getIntegerBitWidth() * 3) {
+                Shift = Shift % Reg->getType()->getIntegerBitWidth();
+                Value *LSBits = Builder->getInt(APInt(Reg->getType()->getIntegerBitWidth(), getOnes(Shift)));
+                LSBits = Builder->CreateAnd(Reg, LSBits);
+                LSBits = Builder->CreateShl(LSBits, Reg->getType()->getIntegerBitWidth() - Shift);
+                Reg = Builder->CreateLShr(Reg, Shift);
+                Reg = Builder->CreateOr(Reg, LSBits);
+            } else if (Shift > Reg->getType()->getIntegerBitWidth() * 2) {
+                Reg = Builder->CreateAShr(Reg, Shift % Reg->getType()->getIntegerBitWidth());
+            } else if (Shift > Reg->getType()->getIntegerBitWidth()) {
+                Reg = Builder->CreateLShr(Reg, Shift % Reg->getType()->getIntegerBitWidth());
+            } else {
+                Reg = Builder->CreateShl(Reg, Shift);
+            }
+            registerResult(Reg);
+            break;
+        }
+        case AArch64::OpTypes::logical_vec_hw_shift: {
+            DEBUG(errs() << "Operand:logical_vec_hw_shift\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::logical_vec_shift: {
+            DEBUG(errs() << "Operand:logical_vec_shift\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::maski16_or_more: {
+            DEBUG(errs() << "Operand:maski16_or_more\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::maski8_or_more: {
+            DEBUG(errs() << "Operand:maski8_or_more\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::move_vec_shift: {
+            DEBUG(errs() << "Operand:move_vec_shift\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst =
+                    ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo)- 256);
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::movimm32_imm: {
+            DEBUG(errs() << "Operand:movimm32_imm\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst =
+                    ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::movimm32_shift:
+        case AArch64::OpTypes::movimm64_shift: {
+            switch (OperandType) {
+                case AArch64::OpTypes::movimm32_shift: {
+                    DEBUG(errs() << "Operand:movimm32_shift\n");
+                    break;
+                }
+                case AArch64::OpTypes::movimm64_shift: {
+                    DEBUG(errs() << "Operand:movimm64_shift\n");
+                    break;
+                }
+            }
+
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst =
+                    ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::movk_symbol_g0: {
+            DEBUG(errs() << "Operand:movk_symbol_g0\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::movk_symbol_g1: {
+            DEBUG(errs() << "Operand:movk_symbol_g1\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::movk_symbol_g2: {
+            DEBUG(errs() << "Operand:movk_symbol_g2\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::movk_symbol_g3: {
+            DEBUG(errs() << "Operand:movk_symbol_g3\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::movz_symbol_g0: {
+            DEBUG(errs() << "Operand:movz_symbol_g0\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::movz_symbol_g1: {
+            DEBUG(errs() << "Operand:movz_symbol_g1\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::movz_symbol_g2: {
+            DEBUG(errs() << "Operand:movz_symbol_g2\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::movz_symbol_g3: {
+            DEBUG(errs() << "Operand:movz_symbol_g3\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::mrs_sysreg_op: {
+            DEBUG(errs() << "Operand:mrs_sysreg_op\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::msr_sysreg_op: {
+            DEBUG(errs() << "Operand:msr_sysreg_op\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::neg_addsub_shifted_imm32: {
+            DEBUG(errs() << "Operand:neg_addsub_shifted_imm32\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::neg_addsub_shifted_imm64: {
+            DEBUG(errs() << "Operand:neg_addsub_shifted_imm64\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::prfop: {
+            DEBUG(errs() << "Operand:prfop\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::pstatefield_op: {
+            DEBUG(errs() << "Operand:pstatefield_op\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::ro_Wextend128:
+        case AArch64::OpTypes::ro_Xextend128:
+        case AArch64::OpTypes::ro_Wextend16:
+        case AArch64::OpTypes::ro_Wextend64:
+        case AArch64::OpTypes::ro_Wextend8:
+        case AArch64::OpTypes::ro_Xextend16:
+        case AArch64::OpTypes::ro_Xextend32:
+        case AArch64::OpTypes::ro_Xextend64:
+        case AArch64::OpTypes::ro_Xextend8:
+        case AArch64::OpTypes::ro_Wextend32: {
+            uint64_t ShiftScale = 0;
+            uint64_t Ext = -1U;
+            switch (OperandType) {
+                case AArch64::OpTypes::ro_Wextend8:
+                    DEBUG(errs() << "Operand:ro_Wextend8\n");
+                    ShiftScale = 0;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTW : AArch64_AM::UXTW;
+                    break;
+                case AArch64::OpTypes::ro_Wextend16:
+                    DEBUG(errs() << "Operand:ro_Wextend16\n");
+                    ShiftScale = 1;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTW : AArch64_AM::UXTW;
+                    break;
+                case AArch64::OpTypes::ro_Wextend32:
+                    DEBUG(errs() << "Operand:ro_Wextend32\n");
+                    ShiftScale = 2;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTW : AArch64_AM::UXTW;
+                    break;
+                case AArch64::OpTypes::ro_Wextend64:
+                    DEBUG(errs() << "Operand:ro_Wextend64\n");
+                    ShiftScale = 3;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTW : AArch64_AM::UXTW;
+                    break;
+                case AArch64::OpTypes::ro_Wextend128:
+                    DEBUG(errs() << "Operand:ro_Wextend128\n");
+                    ShiftScale = 4;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTW : AArch64_AM::UXTW;
+                    break;
+                case AArch64::OpTypes::ro_Xextend8:
+                    DEBUG(errs() << "Operand:ro_Xextend8\n");
+                    ShiftScale = 0;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTX : AArch64_AM::UXTX;
+                    break;
+                case AArch64::OpTypes::ro_Xextend16:
+                    DEBUG(errs() << "Operand:ro_Xextend16\n");
+                    ShiftScale = 1;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTX : AArch64_AM::UXTX;
+                    break;
+                case AArch64::OpTypes::ro_Xextend32:
+                    DEBUG(errs() << "Operand:ro_Xextend32\n");
+                    ShiftScale = 2;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTX : AArch64_AM::UXTX;
+                    break;
+                case AArch64::OpTypes::ro_Xextend64:
+                    DEBUG(errs() << "Operand:ro_Xextend64\n");
+                    ShiftScale = 3;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTX : AArch64_AM::UXTX;
+                    break;
+                case AArch64::OpTypes::ro_Xextend128:
+                    DEBUG(errs() << "Operand:ro_Xextend128\n");
+                    ShiftScale = 4;
+                    Ext =  getImmOp(MIOperandNo) ? AArch64_AM::SXTX : AArch64_AM::UXTX;
+                    break;
+            }
+            assert(ShiftScale || OperandType == AArch64::OpTypes::ro_Xextend8 || OperandType == AArch64::OpTypes::ro_Wextend8);
+            assert(Ext != -1U);
+            uint64_t Shift = getImmOp(MIOperandNo + 1) * ShiftScale;
+            registerResult(Builder->getInt64((Ext << 32) | Shift));
+            break;
+        }
+        case AArch64::OpTypes::simdimmtype10: {
+            DEBUG(errs() << "Operand:simdimmtype10\n");
+            uint64_t Imm = getImmOp(MIOperandNo);
+            uint64_t V = 0;
+            for (unsigned i = 0; i < 8; ++i) {
+                if (Imm & (0x1 << i)) {
+                    V |= (0xFF << (i * 8));
+                }
+            }
+            registerResult(Builder->getInt64(V));
+            break;
+        }
+        case AArch64::OpTypes::simm7s16: {
+            DEBUG(errs() << "Operand:simm7s16\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo) * 16));
+            break;
+        }
+        case AArch64::OpTypes::simm9: {
+            DEBUG(errs() << "Operand:simm9\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst =
+                    ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::simm9_offset_fb128: {
+            DEBUG(errs() << "Operand:simm9_offset_fb128\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::simm9_offset_fb16: {
+            DEBUG(errs() << "Operand:simm9_offset_fb16\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::simm9_offset_fb32: {
+            DEBUG(errs() << "Operand:simm9_offset_fb32\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::simm9_offset_fb64: {
+            DEBUG(errs() << "Operand:simm9_offset_fb64\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::simm9_offset_fb8: {
+            DEBUG(errs() << "Operand:simm9_offset_fb8\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::sys_cr_op: {
+            DEBUG(errs() << "Operand:sys_cr_op\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::tbz_imm0_31_diag: {
+            DEBUG(errs() << "Operand:tbz_imm0_31_diag\n");
+            uint64_t BitNo = getImmOp(MIOperandNo);
+            uint64_t Mask = 0x1L << BitNo;
+            registerResult(Builder->getInt32(Mask));
+            break;
+        }
+        case AArch64::OpTypes::tbz_imm0_31_nodiag: {
+            DEBUG(errs() << "Operand:tbz_imm0_31_nodiag\n");
+            llvm_unreachable("Operand not implemented");
+            break;
+        }
+        case AArch64::OpTypes::tbz_imm32_63: {
+            DEBUG(errs() << "Operand:tbz_imm32_63\n");
+            uint64_t BitNo = getImmOp(MIOperandNo);
+            uint64_t Mask = 0x1L << BitNo;
+            registerResult(Builder->getInt64(Mask));
+            break;
+            break;
+        }
+        case AArch64::OpTypes::uimm12s1:
+        case AArch64::OpTypes::uimm12s16:
+        case AArch64::OpTypes::uimm12s2:
+        case AArch64::OpTypes::uimm12s4:
+        case AArch64::OpTypes::uimm12s8:
+        case AArch64::OpTypes::simm7s4:
+        case AArch64::OpTypes::simm7s8:{
+
+            uint64_t Scale = 0;
+
+            switch (OperandType) {
+                case AArch64::OpTypes::uimm12s1:
+                    DEBUG(errs() << "Operand:uimm12s1\n");
+                    Scale = 1;
+                    break;
+                case AArch64::OpTypes::uimm12s16:
+                    DEBUG(errs() << "Operand:uimm12s16\n");
+                    Scale = 16;
+                    break;
+                case AArch64::OpTypes::uimm12s2:
+                    DEBUG(errs() << "Operand:uimm12s2\n");
+                    Scale = 2;
+                    break;
+                case AArch64::OpTypes::uimm12s8:
+                    DEBUG(errs() << "Operand:uimm12s8\n");
+                    Scale = 8;
+                    break;
+                case AArch64::OpTypes::uimm12s4:
+                    DEBUG(errs() << "Operand:uimm12s4\n");
+                    Scale = 4;
+                    break;
+                case AArch64::OpTypes::simm7s4:
+                    DEBUG(errs() << "Operand:simm7s4\n");
+                    Scale = 4;
+                    break;
+                case AArch64::OpTypes::simm7s8:
+                    DEBUG(errs() << "Operand:simm7s8\n");
+                    Scale = 8;
+                    break;
+            }
+            assert(Scale);
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst =
+                    ConstantInt::get(cast<IntegerType>(ResType), Scale * getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::vecshiftL16: {
+            DEBUG(errs() << "Operand:vecshiftL16\n");
+            registerResult(Builder->getInt32(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::vecshiftL32: {
+            DEBUG(errs() << "Operand:vecshiftL32\n");
+            registerResult(Builder->getInt32(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::vecshiftL64: {
+            DEBUG(errs() << "Operand:vecshiftL64\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::vecshiftL8: {
+            DEBUG(errs() << "Operand:vecshiftL8\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::vecshiftR16: {
+            DEBUG(errs() << "Operand:vecshiftR16\n");
+            registerResult(Builder->getInt32(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::vecshiftR16Narrow: {
+            DEBUG(errs() << "Operand:vecshiftR16Narrow\n");
+            registerResult(Builder->getInt32(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::vecshiftR32: {
+            DEBUG(errs() << "Operand:vecshiftR32\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::vecshiftR32Narrow: {
+            DEBUG(errs() << "Operand:vecshiftR32Narrow\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::vecshiftR64: {
+            DEBUG(errs() << "Operand:vecshiftR64\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+        case AArch64::OpTypes::vecshiftR64Narrow: {
+            DEBUG(errs() << "Operand:vecshiftR64Narrow\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Cst = ConstantInt::get(cast<IntegerType>(ResType), getImmOp(MIOperandNo));
+            registerResult(Cst);
+            break;
+        }
+        case AArch64::OpTypes::vecshiftR8: {
+            DEBUG(errs() << "Operand:vecshiftR8\n");
+            registerResult(Builder->getInt64(getImmOp(MIOperandNo)));
+            break;
+        }
+    }
+}
+
+Value *AArch64InstrSema::getNZCVFlags(Value *Result, Value *LHS, Value *RHS) {
+    Type *ResType = Result->getType();
+    Value *Zero =
+            ConstantInt::get(cast<IntegerType>(ResType), 0);
+    Value *Z_flag = Builder->CreateICmpEQ(Result, Zero);
+    Value *N_flag = Builder->CreateICmpSLT(Result, Zero);
+
+    Value *C_flag = NULL;
+    Value *V_flag = NULL;
+    if (LHS && RHS) {
+        std::vector<Value*> args;
+        args.push_back(LHS);
+        args.push_back(RHS);
+        std::vector<Type*> types;
+        types.push_back(LHS->getType());
+        Value *usub = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::usub_with_overflow, types), args);
+        usub = Builder->CreateExtractValue(usub, 1, "unsigned_overflow");
+        usub = Builder->CreateNot(usub);
+
+        Value *ssub = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::ssub_with_overflow, types), args);
+        ssub = Builder->CreateExtractValue(ssub, 1, "signed_overflow");
+        C_flag = usub;
+        V_flag = ssub;
+    } else {
+        C_flag = Builder->getInt1(false);
+        V_flag = Builder->getInt1(false);
+    }
+
+    return getNZCVFlag(N_flag, Z_flag, C_flag, V_flag);
+}
+
+
+Value *AArch64InstrSema::getNZCVFlag(Value *N, Value *Z, Value *C, Value *V) {
+    if (C == NULL) {
+        C = Builder->getInt1(false);
+    }
+    if (V == NULL) {
+        V = Builder->getInt1(false);
+    }
+
+    Value *NZCV = Builder->CreateSelect(N, Builder->getInt32(0x1 << AArch64::NZCVShift::N), Builder->getInt32(0));
+    NZCV = Builder->CreateOr(NZCV, Builder->CreateSelect(Z, Builder->getInt32(0x1 << AArch64::NZCVShift::Z), Builder->getInt32(0)));
+    NZCV = Builder->CreateOr(NZCV, Builder->CreateSelect(C, Builder->getInt32(0x1 << AArch64::NZCVShift::C), Builder->getInt32(0)));
+    NZCV = Builder->CreateOr(NZCV, Builder->CreateSelect(V, Builder->getInt32(0x1 << AArch64::NZCVShift::V), Builder->getInt32(0)));
+
+    return NZCV;
+}
+
+Value *AArch64InstrSema::ArithExtend(Value *Value, Type *ExtType, uint64_t Ext) {
+    switch (Ext) {
+        default:
+            errs() << Ext << "\n";
+            llvm_unreachable("");
+        case AArch64_AM::UXTW: {
+            Value = Builder->CreateZExt(Value, ExtType);
+            break;
+        }
+        case AArch64_AM::SXTW: {
+            Value = Builder->CreateSExt(Value, ExtType);
+            break;
+        }
+        case AArch64_AM::SXTB: {
+            Value = Builder->CreateTrunc(Value, Builder->getInt8Ty());
+            Value = Builder->CreateSExt(Value, ExtType);
+            break;
+        }
+        case AArch64_AM::UXTB: {
+            Value = Builder->CreateTrunc(Value, Builder->getInt8Ty());
+            Value = Builder->CreateZExt(Value, ExtType);
+        }
+        case AArch64_AM::SXTH: {
+            Value = Builder->CreateTrunc(Value, Builder->getInt16Ty());
+            Value = Builder->CreateSExt(Value, ExtType);
+            break;
+        }
+        case AArch64_AM::UXTH: {
+            Value = Builder->CreateTrunc(Value, Builder->getInt16Ty());
+            Value = Builder->CreateZExt(Value, ExtType);
+            break;
+        }
+    }
+    return Value;
+}
+
+Value *AArch64InstrSema::FPCompare(Value * LHS, Value * RHS) {
+    Value *Sub = Builder->CreateFSub(LHS, RHS);
+
+    Value *Zero = ConstantFP::get(LHS->getType(), 0.0);
+
+    Value *Z_flag = Builder->CreateFCmpOEQ(Sub, Zero);
+    Value *N_flag = Builder->CreateFCmpOLT(Sub, Zero);
+    //TODO: C and V flag!
+
+    return getNZCVFlag(N_flag, Z_flag);
+}
+
+void AArch64InstrSema::translateTargetOpcode() {
+    switch (Opcode) {
+        default:
+            errs() << Opcode << "\n";
+            llvm_unreachable("unknown opcode!");
+        case AArch64ISD::ADDS: {
+            ResEVT = NextVT();
+            Value *V1 = getNextOperand();
+            Value *V2 = getNextOperand();
+            Value *Result = Builder->CreateBinOp(Instruction::Sub, V1, V2);
+            registerResult(Result);
+            registerResult(getNZCVFlags(Result, V1, V2));
+            break;
+        }
+        case AArch64ISD::CALL: {
+            insertCall(getNextOperand());
+            break;
+        }
+        case AArch64ISD::SUBS: {
+            ResEVT = NextVT();
+            Value *V1 = getNextOperand();
+            Value *V2 = getNextOperand();
+            Value *Result = Builder->CreateBinOp(Instruction::Sub, V1, V2);
+            registerResult(Result);
+            registerResult(getNZCVFlags(Result, V1, V2));
+            break;
+        }
+        case AArch64ISD::BRCOND: {
+            BasicBlock *TrueBBlock = dyn_cast<BasicBlock>(getNextOperand());
+            BasicBlock *FalseBBlock = dyn_cast<BasicBlock>(getNextOperand());
+            Value *Cond = getNextOperand();
+            Builder->CreateCondBr(Cond, TrueBBlock, FalseBBlock);
+            break;
+        }
+        case AArch64ISD::CBNZ:
+        case AArch64ISD::CBZ: {
+            Value *Reg = getNextOperand();
+            BasicBlock *TrueBBlock = dyn_cast<BasicBlock>(getNextOperand());
+            Value *Zero = ConstantInt::get(Reg->getType(), 0);
+            switch (Opcode) {
+                case AArch64ISD::CBNZ: {
+                    Builder->CreateCondBr(Builder->CreateICmpNE(Reg, Zero), TrueBBlock, getOrCreateBasicBlock(getBasicBlockEndAddress()));
+                    break;
+                }
+                case AArch64ISD::CBZ: {
+                    Builder->CreateCondBr(Builder->CreateICmpEQ(Reg, Zero), TrueBBlock, getOrCreateBasicBlock(getBasicBlockEndAddress()));
+                    break;
+                }
+            }
+            break;
+        }
+        case AArch64ISD::CCMP: {
+            Value *LHS = getNextOperand();
+            Value *RHS = getNextOperand();
+            Value *NZCVfalse = getNextOperand();
+            NZCVfalse = Builder->CreateShl(NZCVfalse, 28);
+            Value *Cond = getNextOperand();
+            //TODO: not used?
+            Value *NZCVold = getNextOperand();
+
+            Value *Result = Builder->CreateSub(LHS, RHS);
+            Value *NZCVtrue = getNZCVFlags(Result, LHS, RHS);
+
+            registerResult(Builder->CreateSelect(Cond, NZCVtrue, NZCVfalse));
+
+            break;
+        }
+        case AArch64ISD::WrapperLarge: {
+            DEBUG(errs() << "ISD: WrapperLarge\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::TLSDESC_CALLSEQ: {
+            DEBUG(errs() << "ISD: TLSDESC_CALLSEQ\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ADRP: {
+            uint64_t Offset = cast<ConstantInt>(getNextOperand())->getValue().getZExtValue();
+            registerResult(Builder->getInt64((CurrentInst->Address + Offset) & ~0xFFF));
+            DEBUG(errs() << "ISD: ADRP\n");
+            break;
+        }
+        case AArch64ISD::ADDlow: {
+            DEBUG(errs() << "ISD: ADDlow\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LOADgot: {
+            DEBUG(errs() << "ISD: LOADgot\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::RET_FLAG: {
+            DEBUG(errs() << "ISD: RET_FLAG\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CSEL: {
+            DEBUG(errs() << "ISD: CSEL\n");
+            Value *V1 = getNextOperand();
+            Value *V2 = getNextOperand();
+            Value *V3 = getNextOperand();
+            Value *NZCV = getNextOperand();
+            registerResult(Builder->CreateSelect(V3, V1, V2));
+            break;
+        }
+        case AArch64ISD::FCSEL: {
+            DEBUG(errs() << "ISD: FCSEL\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CSINV: {
+            DEBUG(errs() << "ISD: CSINV\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CSNEG: {
+            DEBUG(errs() << "ISD: CSNEG\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CSINC: {
+            DEBUG(errs() << "ISD: CSINC\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::THREAD_POINTER: {
+            DEBUG(errs() << "ISD: THREAD_POINTER\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ADC: {
+            DEBUG(errs() << "ISD: ADC\n");
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *nzcv = getNextOperand();
+
+            Value *one = Builder->getInt(APInt(op1->getType()->getPrimitiveSizeInBits(), 1));
+            Value *C_flag = Builder->CreateAnd(nzcv, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+
+            C_flag = Builder->CreateZExtOrTrunc(C_flag, op2->getType());
+
+            op2 = Builder->CreateSub(op2, one);
+            op2 = Builder->CreateAdd(op2, C_flag);
+            Value *Result = Builder->CreateSub(op1, op2);
+
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::SBC: {
+            DEBUG(errs() << "ISD: SBC\n");
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *nzcv = getNextOperand();
+
+            Value *one = Builder->getInt(APInt(op1->getType()->getPrimitiveSizeInBits(), 1));
+            Value *C_flag = Builder->CreateAnd(nzcv, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+
+            C_flag = Builder->CreateZExtOrTrunc(C_flag, op2->getType());
+
+            op2 = Builder->CreateSub(op2, one);
+            op2 = Builder->CreateAdd(op2, C_flag);
+            Value *Result = Builder->CreateSub(op1, op2);
+
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::ADCS: {
+            DEBUG(errs() << "ISD: ADCS\n");
+            EVT res2VT = NextVT();
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *nzcv = getNextOperand();
+
+            Value *C_flag = Builder->CreateAnd(nzcv, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+
+            C_flag = Builder->CreateZExtOrTrunc(C_flag, op2->getType());
+
+            op2 = Builder->CreateAdd(op2, C_flag);
+            Value *Result = Builder->CreateAdd(op1, op2);
+
+            Value *nzcvNew = getNZCVFlags(Result, op1, op2);
+
+            registerResult(Result);
+            registerResult(nzcvNew);
+            break;
+        }
+        case AArch64ISD::SBCS: {
+            DEBUG(errs() << "ISD: SBCS\n");
+            EVT res2VT = NextVT();
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *nzcv = getNextOperand();
+
+            Value *one = Builder->getInt(APInt(op1->getType()->getPrimitiveSizeInBits(), 1));
+            Value *C_flag = Builder->CreateAnd(nzcv, Builder->getInt32(0x1 << AArch64::NZCVShift::C));
+
+            C_flag = Builder->CreateZExtOrTrunc(C_flag, op2->getType());
+
+            op2 = Builder->CreateSub(op2, one);
+            op2 = Builder->CreateAdd(op2, C_flag);
+            Value *Result = Builder->CreateSub(op1, op2);
+
+            Value *nzcvNew = getNZCVFlags(Result, op1, op2);
+
+            registerResult(Result);
+            registerResult(nzcvNew);
+            break;
+        }
+        case AArch64ISD::ANDS: {
+            DEBUG(errs() << "ISD: ANDS\n");
+            NextVT();
+            Value *LHS = getNextOperand();
+            Value *RHS = getNextOperand();
+            Value *Result = Builder->CreateAnd(LHS, RHS);
+            registerResult(Result);
+            registerResult(getNZCVFlags(Result));
+            break;
+        }
+        case AArch64ISD::CCMN: {
+            DEBUG(errs() << "ISD: CCMN\n");
+
+            Value *LHS = getNextOperand();
+            Value *RHS = getNextOperand();
+            Value *NZCVfalse = getNextOperand();
+            NZCVfalse = Builder->CreateShl(NZCVfalse, 28);
+            Value *Cond = getNextOperand();
+
+            //Old NZCV not used...
+            (void)getNextOperand();
+
+            Value *Minus_One = ConstantInt::get(RHS->getType(), -1);
+            RHS = Builder->CreateMul(RHS, Minus_One);
+            Value *Result = Builder->CreateSub(LHS, RHS);
+            Value *NZCVtrue = getNZCVFlags(Result, LHS, RHS);
+
+            registerResult(Builder->CreateSelect(Cond, NZCVtrue, NZCVfalse));
+            break;
+        }
+        case AArch64ISD::FCCMP: {
+            DEBUG(errs() << "ISD: FCCMP\n");
+            Value *Op1 = getNextOperand();
+            Value *Op2 = getNextOperand();
+            Value *NZCVfalse = getNextOperand();
+            NZCVfalse = Builder->CreateShl(NZCVfalse, 28);
+            Value *Cond = getNextOperand();
+            //Old NZCV is not used
+            (void)getNextOperand();
+            Value *NZCVtrue = FPCompare(Op1, Op2);
+            registerResult(Builder->CreateSelect(Cond, NZCVtrue, NZCVfalse));
+            break;
+        }
+        case AArch64ISD::FCMP: {
+            DEBUG(errs() << "ISD: FCMP\n");
+            Value *Op1 = getNextOperand();
+            Value *Op2 = getNextOperand();
+            registerResult(FPCompare(Op1, Op2));
+            break;
+        }
+        case AArch64ISD::EXTR: {
+            DEBUG(errs() << "ISD: EXTR\n");
+            //FIXME: EXTR is handled wrong for sure...
+            Value *Reg1 = getNextOperand();
+            Value *Reg2 = getNextOperand();
+            ConstantInt *lsbVal = dyn_cast<ConstantInt>(getNextOperand());
+            Value *Result = Builder->CreateOr(Reg1, Reg2);
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::DUP: {
+            DEBUG(errs() << "ISD: DUP\n");
+            assert(ResEVT.getSimpleVT().isVector());
+
+            Value *Op = getNextOperand();
+            MVT SVT = ResEVT.getSimpleVT();
+
+            Type *ElemType = IntegerType::get(*Ctx, SVT.getScalarSizeInBits());
+            Value *Elem = Builder->CreateTrunc(Op, ElemType);
+
+            Value *Vector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+            Elem = Builder->CreateZExt(Elem, Vector->getType());
+
+            for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+                Vector = Builder->CreateOr(Vector, Elem);
+                Elem = Builder->CreateShl(Elem, SVT.getScalarSizeInBits());
+            }
+
+            Vector = Builder->CreateBitCast(Vector, ResEVT.getTypeForEVT(*Ctx));
+            registerResult(Vector);
+
+            break;
+        }
+
+        case AArch64ISD::DUPLANE16:
+        case AArch64ISD::DUPLANE32:
+        case AArch64ISD::DUPLANE8:
+        case AArch64ISD::DUPLANE64: {
+            switch (Opcode) {
+                case AArch64ISD::DUPLANE8:
+                    DEBUG(errs() << "ISD: DUPLANE8\n");
+                    break;
+                case AArch64ISD::DUPLANE16:
+                    DEBUG(errs() << "ISD: DUPLANE16\n");
+                    break;
+                case AArch64ISD::DUPLANE32:
+                    DEBUG(errs() << "ISD: DUPLANE32\n");
+                    break;
+                case AArch64ISD::DUPLANE64:
+                    DEBUG(errs() << "ISD: DUPLANE64\n");
+                    break;
+            }
+            assert(ResEVT.getSimpleVT().isVector());
+
+            Value *SrcVector = getNextOperand();
+            Value *Idx = getNextOperand();
+            Value *Elem = Builder->CreateExtractElement(SrcVector, Idx);
+
+            Value *Vector = Builder->getInt(APInt(ResEVT.getSimpleVT().getVectorNumElements() * ResEVT.getSimpleVT().getScalarSizeInBits(), 0));
+            Vector = Builder->CreateBitCast(Vector, VectorType::get(Elem->getType(), ResEVT.getSimpleVT().getVectorNumElements()));
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++i) {
+                Vector = Builder->CreateInsertElement(Vector, Elem, i);
+            }
+            registerResult(Builder->CreateBitCast(Vector, ResEVT.getTypeForEVT(*Ctx)));
+
+            break;
+        }
+        case AArch64ISD::MOVIedit:
+        case AArch64ISD::MOVI: {
+            MVT SVT = ResEVT.getSimpleVT();
+            if (SVT.isVector()) {
+                Value *V = getNextOperand();
+                if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
+                    uint64_t Const = CI->getValue().getZExtValue();
+                    Value *ConstVal = Builder->getInt(APInt(SVT.getScalarSizeInBits(), Const));
+                    ConstVal = Builder->CreateZExt(ConstVal, IntegerType::get(*Ctx, SVT.getVectorNumElements() * SVT.getScalarSizeInBits()));
+                    Value *Vector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+                    for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+                        Vector = Builder->CreateOr(Vector, ConstVal);
+                        ConstVal = Builder->CreateShl(ConstVal, SVT.getScalarSizeInBits());
+                    }
+                    registerResult(Vector);
+
+
+//                    Value *Vector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+//                    Vector = Builder->CreateBitCast(Vector, VectorType::get(IntegerType::get(*Ctx, SVT.getScalarSizeInBits()), SVT.getVectorNumElements()));
+//                    for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+//                        Builder->CreateInsertElement(Vector, Builder->getInt(APInt(SVT.getScalarSizeInBits(), Const)), i);
+//                    }
+//                    Vector = Builder->CreateBitCast(Vector, IntegerType::get(*Ctx, SVT.getScalarSizeInBits() * SVT.getVectorNumElements()));
+//                    registerResult(Vector);
+                } else {
+
+                    Value *ConstVal = Builder->CreateSExtOrTrunc(V, IntegerType::get(*Ctx, ResEVT.getScalarSizeInBits()));
+                    ConstVal = Builder->CreateZExt(ConstVal, IntegerType::get(*Ctx, SVT.getVectorNumElements() * SVT.getScalarSizeInBits()));
+                    Value *Vector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+                    for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+                        Vector = Builder->CreateOr(Vector, ConstVal);
+                        ConstVal = Builder->CreateShl(ConstVal, SVT.getScalarSizeInBits());
+                    }
+                    registerResult(Vector);
+                }
+            } else {
+                llvm_unreachable("MVT not implemented!");
+            }
+            DEBUG(errs() << "ISD: MOVI\n");
+            break;
+        }
+        case AArch64ISD::MOVIshift: {
+            DEBUG(errs() << "ISD: MOVIshift\n");
+            Value *imm = getNextOperand();
+            Value *shift = getNextOperand();
+            imm = Builder->CreateShl(imm, shift);
+            imm = Builder->CreateZExtOrTrunc(imm, ResEVT.getVectorElementType().getTypeForEVT(*Ctx));
+
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+            for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                result = Builder->CreateInsertElement(result, imm, i);
+            }
+            registerResult(result);
+            break;
+        }
+//        case AArch64ISD::MOVIedit: {
+//            errs() << "ISD: MOVIedit\n";
+//            llvm_unreachable("Not implemented");
+//            break;
+//        }
+        case AArch64ISD::MOVImsl: {
+            DEBUG(errs() << "ISD: MOVImsl\n");
+            Value *imm = getNextOperand();
+            ConstantInt *shift = dyn_cast<ConstantInt>(getNextOperand());
+            assert(shift);
+            imm = Builder->CreateShl(imm, shift);
+            imm = Builder->CreateZExtOrTrunc(imm, ResEVT.getVectorElementType().getTypeForEVT(*Ctx));
+            uint64_t lo = getOnes(shift->getZExtValue());
+            imm = Builder->CreateOr(imm, lo);
+
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+            for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                result = Builder->CreateInsertElement(result, imm, i);
+            }
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::FMOV: {
+            DEBUG(errs() << "ISD: FMOV\n");
+
+            if (ResEVT.getSimpleVT().isVector()) {
+                Value *Op = getNextOperand();
+                MVT SVT = ResEVT.getSimpleVT();
+
+                Type *ElemType = IntegerType::get(*Ctx, SVT.getVectorNumElements() * SVT.getScalarSizeInBits());
+                Value *Elem = Builder->CreateZExtOrTrunc(Op, ElemType);
+
+                Value *Vector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+
+                for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+                    Vector = Builder->CreateOr(Vector, Elem);
+                    Elem = Builder->CreateShl(Elem, SVT.getScalarSizeInBits());
+                }
+
+                Vector = Builder->CreateBitCast(Vector, ResEVT.getTypeForEVT(*Ctx));
+                registerResult(Vector);
+            } else {
+                llvm_unreachable("has to be a vector?");
+            }
+
+            break;
+        }
+        case AArch64ISD::MVNIshift: {
+            DEBUG(errs() << "ISD: MVNIshift\n");
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+
+            Value *elem = getNextOperand();
+            Value *shift = getNextOperand();
+            elem = Builder->CreateShl(elem, shift);
+            elem = Builder->CreateZExtOrTrunc(elem, ResEVT.getVectorElementType().getTypeForEVT(*Ctx));
+
+            for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                result = Builder->CreateInsertElement(result, elem, i);
+            }
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::MVNImsl: {
+            DEBUG(errs() << "ISD: MVNImsl\n");
+            Value *imm = getNextOperand();
+            ConstantInt *shift = dyn_cast<ConstantInt>(getNextOperand());
+            assert(shift);
+            imm = Builder->CreateShl(imm, shift);
+            imm = Builder->CreateNot(imm);
+            imm = Builder->CreateZExtOrTrunc(imm, ResEVT.getVectorElementType().getTypeForEVT(*Ctx));
+            uint64_t lo = getOnes(shift->getZExtValue());
+            imm = Builder->CreateOr(imm, lo);
+
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+            for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                result = Builder->CreateInsertElement(result, imm, i);
+            }
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::BICi: {
+            DEBUG(errs() << "ISD: BICi\n");
+            Value *vec = getNextOperand();
+            VectorType *vecTy = dyn_cast<VectorType>(vec->getType());
+            assert(vecTy);
+            Value *mask = getNextOperand();
+            Value *shift = getNextOperand();
+
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+
+            if (VectorType *maskTy = dyn_cast<VectorType>(mask->getType())) {
+                llvm_unreachable("not implemented yet..");
+            } else {
+                for (unsigned i = 0; i < vecTy->getVectorNumElements(); ++i) {
+                    Value *elem = Builder->CreateNot(Builder->CreateShl(mask, shift));
+                    elem = Builder->CreateZExtOrTrunc(elem, vecTy->getElementType());
+                    elem = Builder->CreateAnd(Builder->CreateExtractElement(vec, i), elem);
+                    result = Builder->CreateInsertElement(result, elem, i);
+                }
+            }
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::ORRi: {
+            DEBUG(errs() << "ISD: ORRi\n");
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+
+            Value *vec = getNextOperand();
+
+            Value *val = getNextOperand();
+            val = Builder->CreateShl(val, getNextOperand());
+            val = Builder->CreateZExtOrTrunc(val, ResEVT.getVectorElementType().getTypeForEVT(*Ctx));
+
+            for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                Value *elem = Builder->CreateOr(Builder->CreateExtractElement(vec, i), val);
+                result = Builder->CreateInsertElement(result, elem, i);
+            }
+
+            registerResult(result);
+
+            break;
+        }
+        case AArch64ISD::BSL: {
+            DEBUG(errs() << "ISD: BSL\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::NEG: {
+            DEBUG(errs() << "ISD: NEG\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ZIP1: {
+            DEBUG(errs() << "ISD: ZIP1\n");
+            //FIXME: not handled correct...
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *result = Builder->CreateOr(op1, op2);
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::ZIP2: {
+            DEBUG(errs() << "ISD: ZIP2\n");
+            //FIXME: not handled correct...
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *result = Builder->CreateOr(op1, op2);
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::UZP1: {
+            DEBUG(errs() << "ISD: UZP1\n");
+            //FIXME: not handled correct...
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *result = Builder->CreateOr(op1, op2);
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::UZP2: {
+            DEBUG(errs() << "ISD: UZP2\n");
+            //FIXME: not handled correct...
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *result = Builder->CreateOr(op1, op2);
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::TRN1: {
+            DEBUG(errs() << "ISD: TRN1\n");
+            //FIXME: implement this!
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *result = Builder->CreateOr(op1, op2);
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::TRN2: {
+            DEBUG(errs() << "ISD: TRN2\n");
+            //FIXME: implement this!
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *result = Builder->CreateOr(op1, op2);
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::REV16: {
+            DEBUG(errs() << "ISD: REV16\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::REV32: {
+            DEBUG(errs() << "ISD: REV32\n");
+            // TODO: Check Implementation. Is this correct?
+            // Two possibilites here:
+            // REV32 Vd.<T>, Vn.<T> => Element reverse in 32-bit words (vector). Where <T> is 8B, 16B, 4H, or 8H.
+            // REV32 Xd, Xm => Reverse Bytes in Words (extended)
+            //llvm_unreachable("Not implemented");
+            Value *in = getNextOperand();
+            in = Builder->CreateBitCast(in, VectorType::get(Builder->getInt32Ty(), ResEVT.getSizeInBits() / 32));
+
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, VectorType::get(Builder->getInt32Ty(), ResEVT.getSizeInBits() / 32));
+
+            std::vector<Type*> types;
+            types.push_back(Builder->getInt32Ty());
+
+            Function *intr = Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_rbit, types);
+
+            for (unsigned i = 0; i < ResEVT.getSizeInBits() / 2; ++i) {
+                std::vector<Value*> args;
+                args.push_back(Builder->CreateExtractElement(in, i));
+                Value *rev = Builder->CreateCall(intr, args);
+                result = Builder->CreateInsertElement(result, rev, i);
+            }
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::REV64: {
+            DEBUG(errs() << "ISD: REV64\n");
+            Value *in = getNextOperand();
+            in = Builder->CreateBitCast(in, VectorType::get(Builder->getInt64Ty(), ResEVT.getSizeInBits() / 64));
+
+            Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, VectorType::get(Builder->getInt64Ty(), ResEVT.getSizeInBits() / 64));
+
+            std::vector<Type*> types;
+            types.push_back(Builder->getInt64Ty());
+
+            Function *intr = Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_rbit, types);
+
+            for (unsigned i = 0; i < ResEVT.getSizeInBits() / 2; ++i) {
+                std::vector<Value*> args;
+                args.push_back(Builder->CreateExtractElement(in, i));
+                Value *rev = Builder->CreateCall(intr, args);
+                result = Builder->CreateInsertElement(result, rev, i);
+            }
+            result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::EXT: {
+            DEBUG(errs() << "ISD: EXT\n");
+            //FIXME: Not implemented yet!!!!!!!!!!!
+            Value *V1 = getNextOperand();
+            Value *V2 = getNextOperand();
+            Value *V3 = getNextOperand();
+            registerResult(V1);
+            break;
+        }
+        case AArch64ISD::VSHL: {
+            DEBUG(errs() << "ISD: VSHL\n");
+            Value *Vector = getNextOperand();
+            Value *SHRVal = getNextOperand();
+            uint64_t SHL = cast<ConstantInt>(SHRVal)->getValue().getZExtValue();
+            Vector = Builder->CreateShl(Vector, SHL);
+            registerResult(Vector);
+            break;
+        }
+        case AArch64ISD::VLSHR: {
+            DEBUG(errs() << "ISD: VLSHR\n");
+            Value *Vector = getNextOperand();
+            Value *SHRVal = getNextOperand();
+            uint64_t SHR = cast<ConstantInt>(SHRVal)->getValue().getZExtValue();
+            Vector = Builder->CreateLShr(Vector, SHR);
+            registerResult(Vector);
+            break;
+        }
+        case AArch64ISD::VASHR: {
+            DEBUG(errs() << "ISD: VASHR\n");
+            assert(ResEVT.getSimpleVT().isVector());
+            Value *op = getNextOperand();
+            ConstantInt *shift = dyn_cast<ConstantInt>(getNextOperand());
+            assert(shift);
+            Value *result = Builder->getInt(APInt(ResEVT.getSimpleVT().getVectorNumElements() * ResEVT.getSimpleVT().getScalarSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, op->getType());
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++i) {
+                Value *elem = Builder->CreateExtractElement(op, i);
+                elem = Builder->CreateAShr(elem, shift->getZExtValue());
+                result = Builder->CreateInsertElement(result, elem, i);
+            }
+            registerResult(result);
+            break;
+        }
+        case AArch64ISD::SQSHL_I: {
+            DEBUG(errs() << "ISD: SQSHL_I\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::UQSHL_I: {
+            DEBUG(errs() << "ISD: UQSHL_I\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::SQSHLU_I: {
+            DEBUG(errs() << "ISD: SQSHLU_I\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::SRSHR_I: {
+            DEBUG(errs() << "ISD: SRSHR_I\n");
+            Value *op1 = getNextOperand();
+            ConstantInt *shift = dyn_cast<ConstantInt>(getNextOperand());
+            assert(shift);
+
+            Value *result = Builder->getInt(APInt(ResEVT.getSimpleVT().getSizeInBits(), 0));
+            result = Builder->CreateBitCast(result, op1->getType());
+
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++i) {
+                Value *elem = Builder->CreateExtractElement(op1, i);
+                elem = Builder->CreateAShr(elem, shift->getZExtValue());
+                result = Builder->CreateInsertElement(result, elem, i);
+            }
+
+            registerResult(result);
+
+            break;
+        }
+        case AArch64ISD::URSHR_I: {
+            DEBUG(errs() << "ISD: URSHR_I\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CMEQ: {
+            DEBUG(errs() << "ISD: CMEQ\n");
+            assert(ResEVT.getSimpleVT().isVector());
+
+            Value *vector1 = getNextOperand();
+            Value *vector2 = getNextOperand();
+
+            uint64_t ones = getOnes(ResEVT.getSimpleVT().getVectorElementType().getSizeInBits());
+
+            Value *Result = UndefValue::get(VectorType::get(IntegerType::get(*Ctx, ResEVT.getVectorElementType().getSizeInBits()), ResEVT.getVectorNumElements()));
+
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++ i) {
+                Value *elem1 = Builder->CreateExtractElement(vector1, i);
+                Value *elem2 = Builder->CreateExtractElement(vector2, i);
+                Value *cmp = Builder->CreateICmpEQ(elem1, elem2);
+
+                Value *v = Builder->CreateSelect(cmp, Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), ones)), Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0)));
+                Builder->CreateInsertElement(Result, v, i);
+            }
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::CMGE: {
+            DEBUG(errs() << "ISD: CMGE\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CMGT: {
+            DEBUG(errs() << "ISD: CMGT\n");
+            MVT SVT = ResEVT.getSimpleVT();
+
+            Value *Vector1 = getNextOperand();
+            Value *Vector2 = getNextOperand();
+
+            Value *ResultVector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+            ResultVector = Builder->CreateBitCast(ResultVector, VectorType::get(IntegerType::get(*Ctx, SVT.getScalarSizeInBits()), SVT.getVectorNumElements()));
+
+            Value *OneMask = Builder->getInt(APInt(SVT.getScalarSizeInBits(), -1U));
+            Value *ZeroMask = Builder->getInt(APInt(SVT.getScalarSizeInBits(), 0));
+            for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+                Value *E1 = Builder->CreateExtractElement(Vector1, i);
+                Value *E2 = Builder->CreateExtractElement(Vector2, i);
+
+                Value *NewElem = Builder->CreateSelect(Builder->CreateICmpSGT(E1, E2), OneMask, ZeroMask);
+                ResultVector = Builder->CreateInsertElement(ResultVector, NewElem, i);
+            }
+
+            registerResult(ResultVector);
+            break;
+            break;
+        }
+        case AArch64ISD::CMHI: {
+            DEBUG(errs() << "ISD: CMHI\n");
+            MVT SVT = ResEVT.getSimpleVT();
+
+            Value *Vector1 = getNextOperand();
+            Value *Vector2 = getNextOperand();
+
+            Value *ResultVector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+            ResultVector = Builder->CreateBitCast(ResultVector, VectorType::get(IntegerType::get(*Ctx, SVT.getScalarSizeInBits()), SVT.getVectorNumElements()));
+
+            Value *OneMask = Builder->getInt(APInt(SVT.getScalarSizeInBits(), -1U));
+            Value *ZeroMask = Builder->getInt(APInt(SVT.getScalarSizeInBits(), 0));
+            for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+                Value *E1 = Builder->CreateExtractElement(Vector1, i);
+                Value *E2 = Builder->CreateExtractElement(Vector2, i);
+
+                Value *NewElem = Builder->CreateSelect(Builder->CreateICmpUGT(E1, E2), OneMask, ZeroMask);
+                ResultVector = Builder->CreateInsertElement(ResultVector, NewElem, i);
+            }
+
+            registerResult(ResultVector);
+            break;
+        }
+        case AArch64ISD::CMHS: {
+            DEBUG(errs() << "ISD: CMHS\n");
+            MVT SVT = ResEVT.getSimpleVT();
+
+            Value *Vector1 = getNextOperand();
+            Value *Vector2 = getNextOperand();
+
+            Value *ResultVector = Builder->getInt(APInt(SVT.getVectorNumElements() * SVT.getScalarSizeInBits(), 0));
+            ResultVector = Builder->CreateBitCast(ResultVector, VectorType::get(IntegerType::get(*Ctx, SVT.getScalarSizeInBits()), SVT.getVectorNumElements()));
+
+            Value *OneMask = Builder->getInt(APInt(SVT.getScalarSizeInBits(), -1U));
+            Value *ZeroMask = Builder->getInt(APInt(SVT.getScalarSizeInBits(), 0));
+            for (unsigned i = 0; i < SVT.getVectorNumElements(); ++i) {
+                Value *E1 = Builder->CreateExtractElement(Vector1, i);
+                Value *E2 = Builder->CreateExtractElement(Vector2, i);
+
+                Value *NewElem = Builder->CreateSelect(Builder->CreateICmpSGT(E1, E2), OneMask, ZeroMask);
+                ResultVector = Builder->CreateInsertElement(ResultVector, NewElem, i);
+            }
+
+            registerResult(ResultVector);
+            break;
+        }
+        case AArch64ISD::FCMEQ:
+        case AArch64ISD::FCMGE:
+        case AArch64ISD::FCMGT:
+        case AArch64ISD::FCMEQz:
+        case AArch64ISD::FCMGEz:
+        case AArch64ISD::FCMGTz:
+        case AArch64ISD::FCMLEz:
+        case AArch64ISD::FCMLTz: {
+            Value *op1 = getNextOperand();
+            Value *op2 = nullptr;
+
+            switch (Opcode) {
+                case AArch64ISD::FCMEQ:
+                case AArch64ISD::FCMGE:
+                case AArch64ISD::FCMGT:
+                {
+                    op2 = getNextOperand();
+                    break;
+                }
+                case AArch64ISD::FCMEQz:
+                case AArch64ISD::FCMGEz:
+                case AArch64ISD::FCMGTz:
+                case AArch64ISD::FCMLEz:
+                case AArch64ISD::FCMLTz:
+                {
+                    op2 = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+                    op2 = Builder->CreateBitCast(op2, op1->getType());
+                    break;
+                }
+            }
+
+            if (ResEVT.isVector()) {
+                Type *elemTy = ResEVT.getVectorElementType().getTypeForEVT(*Ctx);
+                Constant *zero = ConstantInt::get(elemTy, 0, false);
+                Constant *allOnes = ConstantInt::get(elemTy, -1U, false);
+
+                Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+                result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+
+                for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+                    Value *elem1 = Builder->CreateExtractElement(op1, i);
+                    Value *elem2 = Builder->CreateExtractElement(op2, i);
+
+                    Value *cmp = nullptr;
+                    switch (Opcode) {
+                        default:
+                            llvm_unreachable("");
+                        case AArch64ISD::FCMGTz:
+                        case AArch64ISD::FCMGT:
+                        {
+                            DEBUG(errs() << "ISD: FCMGT\n");
+                            cmp = Builder->CreateFCmpUGT(elem1, elem2);
+                            break;
+                        }
+                        case AArch64ISD::FCMGEz:
+                        case AArch64ISD::FCMGE:
+                        {
+                            DEBUG(errs() << "ISD: FCMGE\n");
+                            cmp = Builder->CreateFCmpUGE(elem1, elem2);
+                            break;
+                        }
+                        case AArch64ISD::FCMEQz:
+                        case AArch64ISD::FCMEQ: {
+                            DEBUG(errs() << "ISD: FCMEQ\n");
+                            cmp = Builder->CreateFCmpUEQ(elem1, elem2);
+                            break;
+                        }
+                        case AArch64ISD::FCMLEz:
+                        {
+                            DEBUG(errs() << "ISD: FCMLEz\n");
+                            cmp = Builder->CreateFCmpULE(elem1, elem2);
+                            break;
+                        }
+                        case AArch64ISD::FCMLTz:
+                        {
+                            DEBUG(errs() << "ISD: FCMLTz\n");
+                            cmp = Builder->CreateFCmpULT(elem1, elem2);
+                            break;
+                        }
+                    }
+
+                    Value *resElem = Builder->CreateSelect(cmp, allOnes, zero);
+                    result = Builder->CreateInsertElement(result, resElem, i);
+                }
+
+                registerResult(result);
+
+            } else {
+                llvm_unreachable("");
+            }
+
+            break;
+        }
+        case AArch64ISD::CMEQz: {
+            DEBUG(errs() << "ISD: CMEQz\n");
+            assert(ResEVT.getSimpleVT().isVector());
+
+            Value *vector1 = getNextOperand();
+
+            uint64_t ones = getOnes(ResEVT.getSimpleVT().getVectorElementType().getSizeInBits());
+
+            Value *Result = UndefValue::get(VectorType::get(IntegerType::get(*Ctx, ResEVT.getVectorElementType().getSizeInBits()), ResEVT.getVectorNumElements()));
+
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++ i) {
+                Value *elem1 = Builder->CreateExtractElement(vector1, i);
+                Value *elem2 = Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0));
+                Value *cmp = Builder->CreateICmpEQ(elem1, elem2);
+
+                Value *v = Builder->CreateSelect(cmp, Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), ones)), Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0)));
+                Builder->CreateInsertElement(Result, v, i);
+            }
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::CMGEz: {
+            DEBUG(errs() << "ISD: CMGEz\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CMGTz: {
+            DEBUG(errs() << "ISD: CMGTz\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::CMLEz: {
+            DEBUG(errs() << "ISD: CMLEz\n");
+            assert(ResEVT.getSimpleVT().isVector());
+
+            Value *vector1 = getNextOperand();
+
+            uint64_t ones = getOnes(ResEVT.getSimpleVT().getVectorElementType().getSizeInBits());
+
+            Value *Result = UndefValue::get(VectorType::get(IntegerType::get(*Ctx, ResEVT.getVectorElementType().getSizeInBits()), ResEVT.getVectorNumElements()));
+
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++ i) {
+                Value *elem1 = Builder->CreateExtractElement(vector1, i);
+                Value *elem2 = Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0));
+                Value *cmp = Builder->CreateICmpSLE(elem1, elem2);
+
+                Value *v = Builder->CreateSelect(cmp, Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), ones)), Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0)));
+                Builder->CreateInsertElement(Result, v, i);
+            }
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::CMLTz: {
+            DEBUG(errs() << "ISD: CMLTz\n");
+            assert(ResEVT.getSimpleVT().isVector());
+
+            Value *vector1 = getNextOperand();
+
+            uint64_t ones = getOnes(ResEVT.getSimpleVT().getVectorElementType().getSizeInBits());
+
+            Value *Result = UndefValue::get(VectorType::get(IntegerType::get(*Ctx, ResEVT.getVectorElementType().getSizeInBits()), ResEVT.getVectorNumElements()));
+
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++ i) {
+                Value *elem1 = Builder->CreateExtractElement(vector1, i);
+                Value *elem2 = Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0));
+                Value *cmp = Builder->CreateICmpSLT(elem1, elem2);
+
+                Value *v = Builder->CreateSelect(cmp, Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), ones)), Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0)));
+                Builder->CreateInsertElement(Result, v, i);
+            }
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::SADDV: {
+            DEBUG(errs() << "ISD: SADDV\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::UADDV: {
+            DEBUG(errs() << "ISD: UADDV\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::SMINV: {
+            DEBUG(errs() << "ISD: SMINV\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::UMINV: {
+            DEBUG(errs() << "ISD: UMINV\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::SMAXV: {
+            DEBUG(errs() << "ISD: SMAXV\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::UMAXV: {
+            DEBUG(errs() << "ISD: UMAXV\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::NOT: {
+            DEBUG(errs() << "ISD: NOT\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::BIT: {
+            DEBUG(errs() << "ISD: BIT\n");
+            assert(ResEVT.getSimpleVT().isVector());
+
+            Value *Result = getNextOperand();
+
+            Value *ValueVec = getNextOperand();
+            ValueVec = Builder->CreateBitCast(ValueVec, ResEVT.getTypeForEVT(*Ctx));
+            Value *cmpVec = getNextOperand();
+            cmpVec = Builder->CreateBitCast(cmpVec, ResEVT.getTypeForEVT(*Ctx));
+
+            Value *zero = Builder->getInt(APInt(ResEVT.getSimpleVT().getVectorElementType().getSizeInBits(), 0));
+            for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++i) {
+                Value *cmpElement = Builder->CreateExtractElement(cmpVec, i);
+                Value *cmp = Builder->CreateICmpEQ(cmpElement, zero);
+                Value *trueElem = Builder->CreateExtractElement(ValueVec, i);
+                Value *v = Builder->CreateSelect(cmp, zero, trueElem);
+                Result = Builder->CreateInsertElement(Result, v, i);
+            }
+
+            registerResult(Result);
+            break;
+        }
+        case AArch64ISD::TBZ: {
+            DEBUG(errs() << "ISD: TBZ\n");
+            Value *CmpReg = getNextOperand();
+            Value *Mask = getNextOperand();
+            Value *TrueTargetOffset = getNextOperand();
+
+            Value *Cmp = Builder->CreateAnd(CmpReg, Mask);
+            Cmp = Builder->CreateICmpEQ(Cmp, ConstantInt::get(cast<IntegerType>(CmpReg->getType()), 0));
+
+            uint64_t Target = cast<ConstantInt>(TrueTargetOffset)->getValue().getZExtValue();
+            BasicBlock *TrueBBlock = getOrCreateBasicBlock(Target);
+            BasicBlock *FalseBBlock = getOrCreateBasicBlock(getBasicBlockEndAddress());
+            Builder->CreateCondBr(Cmp, TrueBBlock, FalseBBlock);
+            break;
+        }
+        case AArch64ISD::TBNZ: {
+            DEBUG(errs() << "ISD: TBNZ\n");
+            Value *CmpReg = getNextOperand();
+            Value *Mask = getNextOperand();
+            Value *TrueTargetOffset = getNextOperand();
+
+            Value *Cmp = Builder->CreateAnd(CmpReg, Mask);
+            Cmp = Builder->CreateICmpNE(Cmp, ConstantInt::get(cast<IntegerType>(CmpReg->getType()), 0));
+
+            uint64_t Target = cast<ConstantInt>(TrueTargetOffset)->getValue().getZExtValue();
+            BasicBlock *TrueBBlock = getOrCreateBasicBlock(Target);
+            BasicBlock *FalseBBlock = getOrCreateBasicBlock(getBasicBlockEndAddress());
+            Builder->CreateCondBr(Cmp, TrueBBlock, FalseBBlock);
+            break;
+        }
+        case AArch64ISD::TC_RETURN: {
+            DEBUG(errs() << "ISD: TC_RETURN\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::PREFETCH: {
+            DEBUG(errs() << "ISD: PREFETCH\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::SITOF: {
+            DEBUG(errs() << "ISD: SITOF\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Op = getNextOperand();
+            if (!Op->getType()->isIntegerTy()) {
+                Op = Builder->CreateBitCast(Op, IntegerType::get(getGlobalContext(), ResType->getScalarSizeInBits()));
+            }
+            registerResult(Builder->CreateSIToFP(Op, ResType));
+            break;
+        }
+        case AArch64ISD::UITOF: {
+            DEBUG(errs() << "ISD: UITOF\n");
+            Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+            Value *Op = getNextOperand();
+            if (!Op->getType()->isIntegerTy()) {
+                Op = Builder->CreateBitCast(Op, IntegerType::get(getGlobalContext(), ResType->getScalarSizeInBits()));
+            }
+            registerResult(Builder->CreateUIToFP(Op, ResType));
+            break;
+        }
+        case AArch64ISD::NVCAST: {
+            DEBUG(errs() << "ISD: NVCAST\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::SMULL: {
+            DEBUG(errs() << "ISD: SMULL\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::UMULL: {
+            DEBUG(errs() << "ISD: UMULL\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD2post: {
+            DEBUG(errs() << "ISD: LD2post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD3post: {
+            DEBUG(errs() << "ISD: LD3post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD4post: {
+            DEBUG(errs() << "ISD: LD4post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST2post: {
+            DEBUG(errs() << "ISD: ST2post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST3post: {
+            DEBUG(errs() << "ISD: ST3post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST4post: {
+            DEBUG(errs() << "ISD: ST4post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD1x2post: {
+            DEBUG(errs() << "ISD: LD1x2post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD1x3post: {
+            DEBUG(errs() << "ISD: LD1x3post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD1x4post: {
+            DEBUG(errs() << "ISD: LD1x4post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST1x2post: {
+            DEBUG(errs() << "ISD: ST1x2post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST1x3post: {
+            DEBUG(errs() << "ISD: ST1x3post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST1x4post: {
+            DEBUG(errs() << "ISD: ST1x4post\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD1DUPpost: {
+            DEBUG(errs() << "ISD: LD1DUPpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD2DUPpost: {
+            DEBUG(errs() << "ISD: LD2DUPpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD3DUPpost: {
+            DEBUG(errs() << "ISD: LD3DUPpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD4DUPpost: {
+            DEBUG(errs() << "ISD: LD4DUPpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD1LANEpost: {
+            DEBUG(errs() << "ISD: LD1LANEpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD2LANEpost: {
+            DEBUG(errs() << "ISD: LD2LANEpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD3LANEpost: {
+            DEBUG(errs() << "ISD: LD3LANEpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::LD4LANEpost: {
+            DEBUG(errs() << "ISD: LD4LANEpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST2LANEpost: {
+            DEBUG(errs() << "ISD: ST2LANEpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST3LANEpost: {
+            DEBUG(errs() << "ISD: ST3LANEpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::ST4LANEpost: {
+            DEBUG(errs() << "ISD: ST4LANEpost\n");
+            llvm_unreachable("Not implemented");
+            break;
+        }
+        case AArch64ISD::AARCH_REG_EXT: {
+            DEBUG(errs() << "ISD: AARCH_REG_EXT\n");
+            Value *OffsetReg = getNextOperand();
+            uint64_t ExtShift = cast<ConstantInt>(getNextOperand())->getValue().getZExtValue();
+            uint64_t Ext = (ExtShift >> 32);
+            uint64_t Shift = ExtShift ^ (Ext << 32);
+            switch (Ext) {
+                default:
+                    errs() << Ext;
+                    llvm_unreachable("Ext not implemented");
+                case AArch64_AM::UXTW: {
+                    OffsetReg = Builder->CreateTrunc(OffsetReg, Builder->getInt32Ty());
+                    OffsetReg = Builder->CreateZExt(OffsetReg, Builder->getInt64Ty());
+                    break;
+                }
+                case AArch64_AM::SXTX:
+                case AArch64_AM::UXTX: {
+                    break;
+                }
+                case AArch64_AM::SXTW: {
+                    OffsetReg = Builder->CreateTrunc(OffsetReg, Builder->getInt32Ty());
+                    OffsetReg = Builder->CreateSExt(OffsetReg, Builder->getInt64Ty());
+                    break;
+                }
+            }
+
+            OffsetReg = Builder->CreateShl(OffsetReg, Shift);
+            registerResult(OffsetReg);
+            break;
+        }
+        case AArch64ISD::AARCH_BC_I64: {
+            DEBUG(errs() << "ISD: AARCH_REG_EXT\n");
+            Value *V = getNextOperand();
+            V = Builder->CreateBitCast(V, Builder->getInt64Ty());
+            registerResult(V);
+            break;
+        }
+    }
+
+}
+
+void AArch64InstrSema::translateTargetIntrinsic(unsigned IntrinsicID) {
+    switch (IntrinsicID) {
+        default:
+            llvm_unreachable("intrinsic not handled");
+        case Intrinsic::aarch64_neon_sqrshrun:
+        case Intrinsic::aarch64_neon_srshl:
+        case Intrinsic::aarch64_neon_shadd:
+        case Intrinsic::aarch64_neon_shsub:{
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(getGlobalContext()));
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+
+        case Intrinsic::aarch64_neon_sqrshrn:{
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(getGlobalContext()));
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_vcvtfp2fxs: {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(getGlobalContext()));
+            types.push_back(op1->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_vsli: {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *op3 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+            args.push_back(op3);
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(getGlobalContext()));
+            //   types.push_back(op1->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_vsri: {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            Value *op3 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+            args.push_back(op3);
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(getGlobalContext()));
+            //   types.push_back(op1->getType());
+            //types.push_back(op2->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_fcvtas:
+        case Intrinsic::aarch64_neon_fcvtau:
+        case Intrinsic::aarch64_neon_fcvtms:
+        case Intrinsic::aarch64_neon_fcvtmu:
+        case Intrinsic::aarch64_neon_fcvtns:
+        case Intrinsic::aarch64_neon_fcvtnu:
+        case Intrinsic::aarch64_neon_fcvtps:
+        case Intrinsic::aarch64_neon_fcvtpu:
+        case Intrinsic::aarch64_neon_fcvtxn:
+        case Intrinsic::aarch64_neon_fcvtzs:
+        case Intrinsic::aarch64_neon_fcvtzu: {
+            Value *op = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op);
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(getGlobalContext()));
+            types.push_back(op->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_rbit:
+        case Intrinsic::aarch64_neon_rbit:
+        {
+            Value *op = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op);
+
+            std::vector<Type*> types;
+            types.push_back(op->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_sqxtn:
+        case Intrinsic::aarch64_neon_sqxtun:
+        case Intrinsic::aarch64_neon_abs:
+        {
+            Value *op = getNextOperand();
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(*Ctx));
+
+            Function *intrinsic = Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types);
+
+            op = Builder->CreateZExt(op, intrinsic->getArgumentList().front().getType());
+            std::vector<Value*> args;
+            args.push_back(op);
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_ushl:
+        case Intrinsic::aarch64_neon_sshl:
+        {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            std::vector<Type*> types;
+            types.push_back(op1->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_urhadd:
+        case Intrinsic::aarch64_neon_uhadd:
+        {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            std::vector<Type*> types;
+            types.push_back(op1->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_sqdmulh:
+        case Intrinsic::aarch64_neon_sqadd:
+        case Intrinsic::aarch64_neon_sqsub:
+        case Intrinsic::aarch64_neon_uqadd:
+        case Intrinsic::aarch64_neon_uqsub:
+        {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            std::vector<Type*> types;
+            types.push_back(op1->getType());
+            types.push_back(op2->getType());
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_umull:
+        case Intrinsic::aarch64_neon_smull:
+        {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(*Ctx));
+
+            Function *intrinsic = Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types);
+
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_rshrn:
+        {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(*Ctx));
+
+            Function *intrinsic = Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types);
+
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            Value *result = Builder->CreateCall(intrinsic, args);
+            registerResult(result);
+
+            break;
+        }
+        case Intrinsic::aarch64_neon_sqshrn:
+        {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(*Ctx));
+            types.push_back(op2->getType());
+
+            Function *intrinsic = Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types);
+
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            Value *result = Builder->CreateCall(intrinsic, args);
+            registerResult(result);
+
+            break;
+        }
+        case Intrinsic::aarch64_neon_uaddlp:
+        {
+            Value *op = getNextOperand();
+            std::vector<Value*> args;
+            args.push_back(op);
+
+            std::vector<Type*> types;
+//                  types.push_back(ResEVT.getTypeForEVT(*Ctx));
+            types.push_back(ResEVT.getTypeForEVT(*Ctx));
+            types.push_back(op->getType());
+
+            Function *intrinsic = Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types);
+
+            Value *result = Builder->CreateCall(intrinsic, args);
+            registerResult(result);
+            break;
+        }
+        case Intrinsic::aarch64_neon_addp:
+        {
+            Value *op1 = getNextOperand();
+            Value *op2 = getNextOperand();
+
+            std::vector<Type*> types;
+            types.push_back(op1->getType());
+//                  types.push_back(op2->getType());
+
+            Function *intrinsic = Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types);
+
+            std::vector<Value*> args;
+            args.push_back(op1);
+            args.push_back(op2);
+
+            Value *result = Builder->CreateCall(intrinsic, args);
+            registerResult(result);
+
+            break;
+        }
+        case Intrinsic::aarch64_neon_saddlp:
+        case Intrinsic::aarch64_neon_uqxtn:
+        {
+            Value *op = getNextOperand();
+
+            std::vector<Type*> types;
+            types.push_back(ResEVT.getTypeForEVT(*Ctx));
+            types.push_back(op->getType());
+
+            Function *intrinsic = Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types);
+
+            op = Builder->CreateZExt(op, intrinsic->getArgumentList().front().getType());
+            std::vector<Value*> args;
+            args.push_back(op);
+
+            Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, (llvm::Intrinsic::ID)IntrinsicID, types), args);
+            registerResult(result);
+            break;
+        }
+    }
+}
diff --git a/lib/Target/AArch64/DC/AArch64InstrSema.h b/lib/Target/AArch64/DC/AArch64InstrSema.h
new file mode 100644
index 0000000..b4b35ac
--- /dev/null
+++ b/lib/Target/AArch64/DC/AArch64InstrSema.h
@@ -0,0 +1,33 @@
+#ifndef LLVM_LIB_TARGET_AARCH64_DC_AARCH64INSTRSEMA_H
+#define LLVM_LIB_TARGET_AARCH64_DC_AARCH64INSTRSEMA_H
+
+#include "llvm/DC/DCInstrSema.h"
+#include "llvm/Support/Compiler.h"
+
+namespace llvm {
+
+class AArch64InstrSema : public DCInstrSema {
+
+public:
+  AArch64InstrSema(DCRegisterSema &DRS);
+
+  virtual void translateTargetOpcode();
+  virtual void translateCustomOperand(unsigned OperandType,
+                                      unsigned MIOperandNo);
+  virtual void translateImplicit(unsigned RegNo) {};
+protected:
+    virtual bool translateTargetInst() override;
+    virtual void translateTargetIntrinsic(unsigned IntrinsicID);
+
+private:
+    void printInstruction();
+
+    Value *getNZCVFlags(Value *Result, Value *LHS = NULL, Value *RHS = NULL);
+    Value *getNZCVFlag(Value *N, Value *Z, Value *C = NULL, Value *V = NULL);
+
+    Value *ArithExtend(Value *Value, Type *ExtType, uint64_t Ext);
+    Value *FPCompare(Value *LHS, Value *RHS);
+};
+}
+
+#endif
diff --git a/lib/Target/AArch64/DC/AArch64InstrSemaDebug.cpp b/lib/Target/AArch64/DC/AArch64InstrSemaDebug.cpp
new file mode 100644
index 0000000..69124b1
--- /dev/null
+++ b/lib/Target/AArch64/DC/AArch64InstrSemaDebug.cpp
@@ -0,0 +1,10391 @@
+#include "AArch64InstrSema.h"
+
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/ADT/StringExtras.h"
+#include "../AArch64.h"
+#include "llvm/Support/Debug.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "dc-sema"
+
+void AArch64InstrSema::printInstruction() {
+    uint64_t  Address = CurrentInst->Address;
+    DEBUG(CurrentInst->Inst.dump());
+    switch (CurrentInst->Inst.getOpcode()) {
+        default: {
+            llvm_unreachable("unknown opcode");
+        }
+        case AArch64::PHI: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PHI\n");
+            break;
+        }
+        case AArch64::INLINEASM: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INLINEASM\n");
+            break;
+        }
+        case AArch64::CFI_INSTRUCTION: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CFI_INSTRUCTION\n");
+            break;
+        }
+        case AArch64::EH_LABEL: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EH_LABEL\n");
+            break;
+        }
+        case AArch64::GC_LABEL: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " GC_LABEL\n");
+            break;
+        }
+        case AArch64::KILL: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " KILL\n");
+            break;
+        }
+        case AArch64::EXTRACT_SUBREG: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EXTRACT_SUBREG\n");
+            break;
+        }
+        case AArch64::INSERT_SUBREG: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSERT_SUBREG\n");
+            break;
+        }
+        case AArch64::IMPLICIT_DEF: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " IMPLICIT_DEF\n");
+            break;
+        }
+        case AArch64::SUBREG_TO_REG: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBREG_TO_REG\n");
+            break;
+        }
+        case AArch64::COPY_TO_REGCLASS: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " COPY_TO_REGCLASS\n");
+            break;
+        }
+        case AArch64::DBG_VALUE: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DBG_VALUE\n");
+            break;
+        }
+        case AArch64::REG_SEQUENCE: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REG_SEQUENCE\n");
+            break;
+        }
+        case AArch64::COPY: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " COPY\n");
+            break;
+        }
+        case AArch64::BUNDLE: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BUNDLE\n");
+            break;
+        }
+        case AArch64::LIFETIME_START: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LIFETIME_START\n");
+            break;
+        }
+        case AArch64::LIFETIME_END: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LIFETIME_END\n");
+            break;
+        }
+        case AArch64::STACKMAP: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STACKMAP\n");
+            break;
+        }
+        case AArch64::PATCHPOINT: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PATCHPOINT\n");
+            break;
+        }
+        case AArch64::LOAD_STACK_GUARD: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LOAD_STACK_GUARD\n");
+            break;
+        }
+        case AArch64::STATEPOINT: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STATEPOINT\n");
+            break;
+        }
+        case AArch64::LOCAL_ESCAPE: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LOCAL_ESCAPE\n");
+            break;
+        }
+        case AArch64::FAULTING_LOAD_OP: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FAULTING_LOAD_OP\n");
+            break;
+        }
+        case AArch64::ABSv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv16i8\n");
+            break;
+        }
+        case AArch64::ABSv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv1i64\n");
+            break;
+        }
+        case AArch64::ABSv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv2i32\n");
+            break;
+        }
+        case AArch64::ABSv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv2i64\n");
+            break;
+        }
+        case AArch64::ABSv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv4i16\n");
+            break;
+        }
+        case AArch64::ABSv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv4i32\n");
+            break;
+        }
+        case AArch64::ABSv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv8i16\n");
+            break;
+        }
+        case AArch64::ABSv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ABSv8i8\n");
+            break;
+        }
+        case AArch64::ADCSWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADCSWr\n");
+            break;
+        }
+        case AArch64::ADCSXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADCSXr\n");
+            break;
+        }
+        case AArch64::ADCWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADCWr\n");
+            break;
+        }
+        case AArch64::ADCXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADCXr\n");
+            break;
+        }
+        case AArch64::ADDHNv2i64_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDHNv2i64_v2i32\n");
+            break;
+        }
+        case AArch64::ADDHNv2i64_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDHNv2i64_v4i32\n");
+            break;
+        }
+        case AArch64::ADDHNv4i32_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDHNv4i32_v4i16\n");
+            break;
+        }
+        case AArch64::ADDHNv4i32_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDHNv4i32_v8i16\n");
+            break;
+        }
+        case AArch64::ADDHNv8i16_v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDHNv8i16_v16i8\n");
+            break;
+        }
+        case AArch64::ADDHNv8i16_v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDHNv8i16_v8i8\n");
+            break;
+        }
+        case AArch64::ADDPv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv16i8\n");
+            break;
+        }
+        case AArch64::ADDPv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv2i32\n");
+            break;
+        }
+        case AArch64::ADDPv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv2i64\n");
+            break;
+        }
+        case AArch64::ADDPv2i64p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv2i64p\n");
+            break;
+        }
+        case AArch64::ADDPv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv4i16\n");
+            break;
+        }
+        case AArch64::ADDPv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv4i32\n");
+            break;
+        }
+        case AArch64::ADDPv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv8i16\n");
+            break;
+        }
+        case AArch64::ADDPv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDPv8i8\n");
+            break;
+        }
+        case AArch64::ADDSWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSWri\n");
+            break;
+        }
+        case AArch64::ADDSWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSWrr\n");
+            break;
+        }
+        case AArch64::ADDSWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSWrs\n");
+            break;
+        }
+        case AArch64::ADDSWrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSWrx\n");
+            break;
+        }
+        case AArch64::ADDSXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSXri\n");
+            break;
+        }
+        case AArch64::ADDSXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSXrr\n");
+            break;
+        }
+        case AArch64::ADDSXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSXrs\n");
+            break;
+        }
+        case AArch64::ADDSXrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSXrx\n");
+            break;
+        }
+        case AArch64::ADDSXrx64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDSXrx64\n");
+            break;
+        }
+        case AArch64::ADDVv16i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDVv16i8v\n");
+            break;
+        }
+        case AArch64::ADDVv4i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDVv4i16v\n");
+            break;
+        }
+        case AArch64::ADDVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDVv4i32v\n");
+            break;
+        }
+        case AArch64::ADDVv8i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDVv8i16v\n");
+            break;
+        }
+        case AArch64::ADDVv8i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDVv8i8v\n");
+            break;
+        }
+        case AArch64::ADDWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDWri\n");
+            break;
+        }
+        case AArch64::ADDWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDWrr\n");
+            break;
+        }
+        case AArch64::ADDWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDWrs\n");
+            break;
+        }
+        case AArch64::ADDWrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDWrx\n");
+            break;
+        }
+        case AArch64::ADDXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDXri\n");
+            break;
+        }
+        case AArch64::ADDXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDXrr\n");
+            break;
+        }
+        case AArch64::ADDXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDXrs\n");
+            break;
+        }
+        case AArch64::ADDXrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDXrx\n");
+            break;
+        }
+        case AArch64::ADDXrx64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDXrx64\n");
+            break;
+        }
+        case AArch64::ADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv16i8\n");
+            break;
+        }
+        case AArch64::ADDv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv1i64\n");
+            break;
+        }
+        case AArch64::ADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv2i32\n");
+            break;
+        }
+        case AArch64::ADDv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv2i64\n");
+            break;
+        }
+        case AArch64::ADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv4i16\n");
+            break;
+        }
+        case AArch64::ADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv4i32\n");
+            break;
+        }
+        case AArch64::ADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv8i16\n");
+            break;
+        }
+        case AArch64::ADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADDv8i8\n");
+            break;
+        }
+        case AArch64::ADJCALLSTACKDOWN: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADJCALLSTACKDOWN\n");
+            break;
+        }
+        case AArch64::ADJCALLSTACKUP: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADJCALLSTACKUP\n");
+            break;
+        }
+        case AArch64::ADR: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADR\n");
+            break;
+        }
+        case AArch64::ADRP: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ADRP\n");
+            break;
+        }
+        case AArch64::AESDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " AESDrr\n");
+            break;
+        }
+        case AArch64::AESErr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " AESErr\n");
+            break;
+        }
+        case AArch64::AESIMCrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " AESIMCrr\n");
+            break;
+        }
+        case AArch64::AESMCrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " AESMCrr\n");
+            break;
+        }
+        case AArch64::ANDSWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDSWri\n");
+            break;
+        }
+        case AArch64::ANDSWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDSWrr\n");
+            break;
+        }
+        case AArch64::ANDSWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDSWrs\n");
+            break;
+        }
+        case AArch64::ANDSXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDSXri\n");
+            break;
+        }
+        case AArch64::ANDSXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDSXrr\n");
+            break;
+        }
+        case AArch64::ANDSXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDSXrs\n");
+            break;
+        }
+        case AArch64::ANDWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDWri\n");
+            break;
+        }
+        case AArch64::ANDWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDWrr\n");
+            break;
+        }
+        case AArch64::ANDWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDWrs\n");
+            break;
+        }
+        case AArch64::ANDXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDXri\n");
+            break;
+        }
+        case AArch64::ANDXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDXrr\n");
+            break;
+        }
+        case AArch64::ANDXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDXrs\n");
+            break;
+        }
+        case AArch64::ANDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDv16i8\n");
+            break;
+        }
+        case AArch64::ANDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ANDv8i8\n");
+            break;
+        }
+        case AArch64::ASRVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ASRVWr\n");
+            break;
+        }
+        case AArch64::ASRVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ASRVXr\n");
+            break;
+        }
+        case AArch64::B: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " B\n");
+            break;
+        }
+        case AArch64::BFMWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BFMWri\n");
+            break;
+        }
+        case AArch64::BFMXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BFMXri\n");
+            break;
+        }
+        case AArch64::BICSWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICSWrr\n");
+            break;
+        }
+        case AArch64::BICSWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICSWrs\n");
+            break;
+        }
+        case AArch64::BICSXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICSXrr\n");
+            break;
+        }
+        case AArch64::BICSXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICSXrs\n");
+            break;
+        }
+        case AArch64::BICWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICWrr\n");
+            break;
+        }
+        case AArch64::BICWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICWrs\n");
+            break;
+        }
+        case AArch64::BICXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICXrr\n");
+            break;
+        }
+        case AArch64::BICXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICXrs\n");
+            break;
+        }
+        case AArch64::BICv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICv16i8\n");
+            break;
+        }
+        case AArch64::BICv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICv2i32\n");
+            break;
+        }
+        case AArch64::BICv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICv4i16\n");
+            break;
+        }
+        case AArch64::BICv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICv4i32\n");
+            break;
+        }
+        case AArch64::BICv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICv8i16\n");
+            break;
+        }
+        case AArch64::BICv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BICv8i8\n");
+            break;
+        }
+        case AArch64::BIFv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BIFv16i8\n");
+            break;
+        }
+        case AArch64::BIFv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BIFv8i8\n");
+            break;
+        }
+        case AArch64::BITv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BITv16i8\n");
+            break;
+        }
+        case AArch64::BITv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BITv8i8\n");
+            break;
+        }
+        case AArch64::BL: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BL\n");
+            break;
+        }
+        case AArch64::BLR: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BLR\n");
+            break;
+        }
+        case AArch64::BR: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BR\n");
+            break;
+        }
+        case AArch64::BRK: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BRK\n");
+            break;
+        }
+        case AArch64::BSLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BSLv16i8\n");
+            break;
+        }
+        case AArch64::BSLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " BSLv8i8\n");
+            break;
+        }
+        case AArch64::Bcc: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " Bcc\n");
+            break;
+        }
+        case AArch64::CASALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASALb\n");
+            break;
+        }
+        case AArch64::CASALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASALd\n");
+            break;
+        }
+        case AArch64::CASALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASALh\n");
+            break;
+        }
+        case AArch64::CASALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASALs\n");
+            break;
+        }
+        case AArch64::CASAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASAb\n");
+            break;
+        }
+        case AArch64::CASAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASAd\n");
+            break;
+        }
+        case AArch64::CASAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASAh\n");
+            break;
+        }
+        case AArch64::CASAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASAs\n");
+            break;
+        }
+        case AArch64::CASLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASLb\n");
+            break;
+        }
+        case AArch64::CASLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASLd\n");
+            break;
+        }
+        case AArch64::CASLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASLh\n");
+            break;
+        }
+        case AArch64::CASLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASLs\n");
+            break;
+        }
+//        case AArch64::CASPALd: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPALd\n");
+//            break;
+//        }
+//        case AArch64::CASPALs: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPALs\n");
+//            break;
+//        }
+//        case AArch64::CASPAd: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPAd\n");
+//            break;
+//        }
+//        case AArch64::CASPAs: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPAs\n");
+//            break;//        }
+//        case AArch64::CASPLd: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPLd\n");
+//            break;
+//        }
+//        case AArch64::CASPLs: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPLs\n");
+//            break;
+//        }
+//        case AArch64::CASPd: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPd\n");
+//            break;
+//        }
+//        case AArch64::CASPs: {
+//            DEBUG(errs() << "0x" << utohexstr(Address) << " CASPs\n");
+//            break;
+//        }
+        case AArch64::CASb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASb\n");
+            break;
+        }
+        case AArch64::CASd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASd\n");
+            break;
+        }
+        case AArch64::CASh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASh\n");
+            break;
+        }
+        case AArch64::CASs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CASs\n");
+            break;
+        }
+        case AArch64::CBNZW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CBNZW\n");
+            break;
+        }
+        case AArch64::CBNZX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CBNZX\n");
+            break;
+        }
+        case AArch64::CBZW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CBZW\n");
+            break;
+        }
+        case AArch64::CBZX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CBZX\n");
+            break;
+        }
+        case AArch64::CCMNWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMNWi\n");
+            break;
+        }
+        case AArch64::CCMNWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMNWr\n");
+            break;
+        }
+        case AArch64::CCMNXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMNXi\n");
+            break;
+        }
+        case AArch64::CCMNXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMNXr\n");
+            break;
+        }
+        case AArch64::CCMPWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMPWi\n");
+            break;
+        }
+        case AArch64::CCMPWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMPWr\n");
+            break;
+        }
+        case AArch64::CCMPXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMPXi\n");
+            break;
+        }
+        case AArch64::CCMPXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CCMPXr\n");
+            break;
+        }
+        case AArch64::CLREX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLREX\n");
+            break;
+        }
+        case AArch64::CLSWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSWr\n");
+            break;
+        }
+        case AArch64::CLSXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSXr\n");
+            break;
+        }
+        case AArch64::CLSv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSv16i8\n");
+            break;
+        }
+        case AArch64::CLSv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSv2i32\n");
+            break;
+        }
+        case AArch64::CLSv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSv4i16\n");
+            break;
+        }
+        case AArch64::CLSv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSv4i32\n");
+            break;
+        }
+        case AArch64::CLSv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSv8i16\n");
+            break;
+        }
+        case AArch64::CLSv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLSv8i8\n");
+            break;
+        }
+        case AArch64::CLZWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZWr\n");
+            break;
+        }
+        case AArch64::CLZXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZXr\n");
+            break;
+        }
+        case AArch64::CLZv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZv16i8\n");
+            break;
+        }
+        case AArch64::CLZv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZv2i32\n");
+            break;
+        }
+        case AArch64::CLZv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZv4i16\n");
+            break;
+        }
+        case AArch64::CLZv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZv4i32\n");
+            break;
+        }
+        case AArch64::CLZv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZv8i16\n");
+            break;
+        }
+        case AArch64::CLZv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CLZv8i8\n");
+            break;
+        }
+        case AArch64::CMEQv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv16i8\n");
+            break;
+        }
+        case AArch64::CMEQv16i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv16i8rz\n");
+            break;
+        }
+        case AArch64::CMEQv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv1i64\n");
+            break;
+        }
+        case AArch64::CMEQv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv1i64rz\n");
+            break;
+        }
+        case AArch64::CMEQv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv2i32\n");
+            break;
+        }
+        case AArch64::CMEQv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv2i32rz\n");
+            break;
+        }
+        case AArch64::CMEQv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv2i64\n");
+            break;
+        }
+        case AArch64::CMEQv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv2i64rz\n");
+            break;
+        }
+        case AArch64::CMEQv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv4i16\n");
+            break;
+        }
+        case AArch64::CMEQv4i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv4i16rz\n");
+            break;
+        }
+        case AArch64::CMEQv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv4i32\n");
+            break;
+        }
+        case AArch64::CMEQv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv4i32rz\n");
+            break;
+        }
+        case AArch64::CMEQv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv8i16\n");
+            break;
+        }
+        case AArch64::CMEQv8i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv8i16rz\n");
+            break;
+        }
+        case AArch64::CMEQv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv8i8\n");
+            break;
+        }
+        case AArch64::CMEQv8i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMEQv8i8rz\n");
+            break;
+        }
+        case AArch64::CMGEv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv16i8\n");
+            break;
+        }
+        case AArch64::CMGEv16i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv16i8rz\n");
+            break;
+        }
+        case AArch64::CMGEv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv1i64\n");
+            break;
+        }
+        case AArch64::CMGEv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv1i64rz\n");
+            break;
+        }
+        case AArch64::CMGEv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv2i32\n");
+            break;
+        }
+        case AArch64::CMGEv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv2i32rz\n");
+            break;
+        }
+        case AArch64::CMGEv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv2i64\n");
+            break;
+        }
+        case AArch64::CMGEv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv2i64rz\n");
+            break;
+        }
+        case AArch64::CMGEv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv4i16\n");
+            break;
+        }
+        case AArch64::CMGEv4i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv4i16rz\n");
+            break;
+        }
+        case AArch64::CMGEv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv4i32\n");
+            break;
+        }
+        case AArch64::CMGEv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv4i32rz\n");
+            break;
+        }
+        case AArch64::CMGEv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv8i16\n");
+            break;
+        }
+        case AArch64::CMGEv8i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv8i16rz\n");
+            break;
+        }
+        case AArch64::CMGEv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv8i8\n");
+            break;
+        }
+        case AArch64::CMGEv8i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGEv8i8rz\n");
+            break;
+        }
+        case AArch64::CMGTv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv16i8\n");
+            break;
+        }
+        case AArch64::CMGTv16i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv16i8rz\n");
+            break;
+        }
+        case AArch64::CMGTv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv1i64\n");
+            break;
+        }
+        case AArch64::CMGTv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv1i64rz\n");
+            break;
+        }
+        case AArch64::CMGTv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv2i32\n");
+            break;
+        }
+        case AArch64::CMGTv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv2i32rz\n");
+            break;
+        }
+        case AArch64::CMGTv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv2i64\n");
+            break;
+        }
+        case AArch64::CMGTv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv2i64rz\n");
+            break;
+        }
+        case AArch64::CMGTv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv4i16\n");
+            break;
+        }
+        case AArch64::CMGTv4i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv4i16rz\n");
+            break;
+        }
+        case AArch64::CMGTv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv4i32\n");
+            break;
+        }
+        case AArch64::CMGTv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv4i32rz\n");
+            break;
+        }
+        case AArch64::CMGTv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv8i16\n");
+            break;
+        }
+        case AArch64::CMGTv8i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv8i16rz\n");
+            break;
+        }
+        case AArch64::CMGTv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv8i8\n");
+            break;
+        }
+        case AArch64::CMGTv8i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMGTv8i8rz\n");
+            break;
+        }
+        case AArch64::CMHIv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv16i8\n");
+            break;
+        }
+        case AArch64::CMHIv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv1i64\n");
+            break;
+        }
+        case AArch64::CMHIv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv2i32\n");
+            break;
+        }
+        case AArch64::CMHIv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv2i64\n");
+            break;
+        }
+        case AArch64::CMHIv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv4i16\n");
+            break;
+        }
+        case AArch64::CMHIv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv4i32\n");
+            break;
+        }
+        case AArch64::CMHIv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv8i16\n");
+            break;
+        }
+        case AArch64::CMHIv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHIv8i8\n");
+            break;
+        }
+        case AArch64::CMHSv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv16i8\n");
+            break;
+        }
+        case AArch64::CMHSv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv1i64\n");
+            break;
+        }
+        case AArch64::CMHSv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv2i32\n");
+            break;
+        }
+        case AArch64::CMHSv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv2i64\n");
+            break;
+        }
+        case AArch64::CMHSv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv4i16\n");
+            break;
+        }
+        case AArch64::CMHSv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv4i32\n");
+            break;
+        }
+        case AArch64::CMHSv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv8i16\n");
+            break;
+        }
+        case AArch64::CMHSv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMHSv8i8\n");
+            break;
+        }
+        case AArch64::CMLEv16i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv16i8rz\n");
+            break;
+        }
+        case AArch64::CMLEv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv1i64rz\n");
+            break;
+        }
+        case AArch64::CMLEv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv2i32rz\n");
+            break;
+        }
+        case AArch64::CMLEv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv2i64rz\n");
+            break;
+        }
+        case AArch64::CMLEv4i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv4i16rz\n");
+            break;
+        }
+        case AArch64::CMLEv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv4i32rz\n");
+            break;
+        }
+        case AArch64::CMLEv8i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv8i16rz\n");
+            break;
+        }
+        case AArch64::CMLEv8i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLEv8i8rz\n");
+            break;
+        }
+        case AArch64::CMLTv16i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv16i8rz\n");
+            break;
+        }
+        case AArch64::CMLTv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv1i64rz\n");
+            break;
+        }
+        case AArch64::CMLTv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv2i32rz\n");
+            break;
+        }
+        case AArch64::CMLTv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv2i64rz\n");
+            break;
+        }
+        case AArch64::CMLTv4i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv4i16rz\n");
+            break;
+        }
+        case AArch64::CMLTv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv4i32rz\n");
+            break;
+        }
+        case AArch64::CMLTv8i16rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv8i16rz\n");
+            break;
+        }
+        case AArch64::CMLTv8i8rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMLTv8i8rz\n");
+            break;
+        }
+        case AArch64::CMTSTv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv16i8\n");
+            break;
+        }
+        case AArch64::CMTSTv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv1i64\n");
+            break;
+        }
+        case AArch64::CMTSTv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv2i32\n");
+            break;
+        }
+        case AArch64::CMTSTv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv2i64\n");
+            break;
+        }
+        case AArch64::CMTSTv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv4i16\n");
+            break;
+        }
+        case AArch64::CMTSTv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv4i32\n");
+            break;
+        }
+        case AArch64::CMTSTv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv8i16\n");
+            break;
+        }
+        case AArch64::CMTSTv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CMTSTv8i8\n");
+            break;
+        }
+        case AArch64::CNTv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CNTv16i8\n");
+            break;
+        }
+        case AArch64::CNTv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CNTv8i8\n");
+            break;
+        }
+        case AArch64::CPYi16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CPYi16\n");
+            break;
+        }
+        case AArch64::CPYi32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CPYi32\n");
+            break;
+        }
+        case AArch64::CPYi64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CPYi64\n");
+            break;
+        }
+        case AArch64::CPYi8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CPYi8\n");
+            break;
+        }
+        case AArch64::CRC32Brr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32Brr\n");
+            break;
+        }
+        case AArch64::CRC32CBrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32CBrr\n");
+            break;
+        }
+        case AArch64::CRC32CHrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32CHrr\n");
+            break;
+        }
+        case AArch64::CRC32CWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32CWrr\n");
+            break;
+        }
+        case AArch64::CRC32CXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32CXrr\n");
+            break;
+        }
+        case AArch64::CRC32Hrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32Hrr\n");
+            break;
+        }
+        case AArch64::CRC32Wrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32Wrr\n");
+            break;
+        }
+        case AArch64::CRC32Xrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CRC32Xrr\n");
+            break;
+        }
+        case AArch64::CSELWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSELWr\n");
+            break;
+        }
+        case AArch64::CSELXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSELXr\n");
+            break;
+        }
+        case AArch64::CSINCWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSINCWr\n");
+            break;
+        }
+        case AArch64::CSINCXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSINCXr\n");
+            break;
+        }
+        case AArch64::CSINVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSINVWr\n");
+            break;
+        }
+        case AArch64::CSINVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSINVXr\n");
+            break;
+        }
+        case AArch64::CSNEGWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSNEGWr\n");
+            break;
+        }
+        case AArch64::CSNEGXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " CSNEGXr\n");
+            break;
+        }
+        case AArch64::DCPS1: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DCPS1\n");
+            break;
+        }
+        case AArch64::DCPS2: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DCPS2\n");
+            break;
+        }
+        case AArch64::DCPS3: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DCPS3\n");
+            break;
+        }
+        case AArch64::DMB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DMB\n");
+            break;
+        }
+        case AArch64::DRPS: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DRPS\n");
+            break;
+        }
+        case AArch64::DSB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DSB\n");
+            break;
+        }
+        case AArch64::DUPv16i8gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv16i8gpr\n");
+            break;
+        }
+        case AArch64::DUPv16i8lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv16i8lane\n");
+            break;
+        }
+        case AArch64::DUPv2i32gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv2i32gpr\n");
+            break;
+        }
+        case AArch64::DUPv2i32lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv2i32lane\n");
+            break;
+        }
+        case AArch64::DUPv2i64gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv2i64gpr\n");
+            break;
+        }
+        case AArch64::DUPv2i64lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv2i64lane\n");
+            break;
+        }
+        case AArch64::DUPv4i16gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv4i16gpr\n");
+            break;
+        }
+        case AArch64::DUPv4i16lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv4i16lane\n");
+            break;
+        }
+        case AArch64::DUPv4i32gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv4i32gpr\n");
+            break;
+        }
+        case AArch64::DUPv4i32lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv4i32lane\n");
+            break;
+        }
+        case AArch64::DUPv8i16gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv8i16gpr\n");
+            break;
+        }
+        case AArch64::DUPv8i16lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv8i16lane\n");
+            break;
+        }
+        case AArch64::DUPv8i8gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv8i8gpr\n");
+            break;
+        }
+        case AArch64::DUPv8i8lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " DUPv8i8lane\n");
+            break;
+        }
+        case AArch64::EONWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EONWrr\n");
+            break;
+        }
+        case AArch64::EONWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EONWrs\n");
+            break;
+        }
+        case AArch64::EONXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EONXrr\n");
+            break;
+        }
+        case AArch64::EONXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EONXrs\n");
+            break;
+        }
+        case AArch64::EORWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORWri\n");
+            break;
+        }
+        case AArch64::EORWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORWrr\n");
+            break;
+        }
+        case AArch64::EORWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORWrs\n");
+            break;
+        }
+        case AArch64::EORXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORXri\n");
+            break;
+        }
+        case AArch64::EORXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORXrr\n");
+            break;
+        }
+        case AArch64::EORXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORXrs\n");
+            break;
+        }
+        case AArch64::EORv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORv16i8\n");
+            break;
+        }
+        case AArch64::EORv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EORv8i8\n");
+            break;
+        }
+        case AArch64::ERET: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ERET\n");
+            break;
+        }
+        case AArch64::EXTRWrri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EXTRWrri\n");
+            break;
+        }
+        case AArch64::EXTRXrri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EXTRXrri\n");
+            break;
+        }
+        case AArch64::EXTv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EXTv16i8\n");
+            break;
+        }
+        case AArch64::EXTv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " EXTv8i8\n");
+            break;
+        }
+        case AArch64::F128CSEL: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " F128CSEL\n");
+            break;
+        }
+        case AArch64::FABD32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABD32\n");
+            break;
+        }
+        case AArch64::FABD64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABD64\n");
+            break;
+        }
+        case AArch64::FABDv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABDv2f32\n");
+            break;
+        }
+        case AArch64::FABDv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABDv2f64\n");
+            break;
+        }
+        case AArch64::FABDv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABDv4f32\n");
+            break;
+        }
+        case AArch64::FABSDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABSDr\n");
+            break;
+        }
+        case AArch64::FABSSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABSSr\n");
+            break;
+        }
+        case AArch64::FABSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABSv2f32\n");
+            break;
+        }
+        case AArch64::FABSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABSv2f64\n");
+            break;
+        }
+        case AArch64::FABSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FABSv4f32\n");
+            break;
+        }
+        case AArch64::FACGE32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGE32\n");
+            break;
+        }
+        case AArch64::FACGE64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGE64\n");
+            break;
+        }
+        case AArch64::FACGEv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGEv2f32\n");
+            break;
+        }
+        case AArch64::FACGEv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGEv2f64\n");
+            break;
+        }
+        case AArch64::FACGEv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGEv4f32\n");
+            break;
+        }
+        case AArch64::FACGT32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGT32\n");
+            break;
+        }
+        case AArch64::FACGT64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGT64\n");
+            break;
+        }
+        case AArch64::FACGTv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGTv2f32\n");
+            break;
+        }
+        case AArch64::FACGTv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGTv2f64\n");
+            break;
+        }
+        case AArch64::FACGTv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FACGTv4f32\n");
+            break;
+        }
+        case AArch64::FADDDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDDrr\n");
+            break;
+        }
+        case AArch64::FADDPv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDPv2f32\n");
+            break;
+        }
+        case AArch64::FADDPv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDPv2f64\n");
+            break;
+        }
+        case AArch64::FADDPv2i32p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDPv2i32p\n");
+            break;
+        }
+        case AArch64::FADDPv2i64p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDPv2i64p\n");
+            break;
+        }
+        case AArch64::FADDPv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDPv4f32\n");
+            break;
+        }
+        case AArch64::FADDSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDSrr\n");
+            break;
+        }
+        case AArch64::FADDv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDv2f32\n");
+            break;
+        }
+        case AArch64::FADDv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDv2f64\n");
+            break;
+        }
+        case AArch64::FADDv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FADDv4f32\n");
+            break;
+        }
+        case AArch64::FCCMPDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCCMPDrr\n");
+            break;
+        }
+        case AArch64::FCCMPEDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCCMPEDrr\n");
+            break;
+        }
+        case AArch64::FCCMPESrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCCMPESrr\n");
+            break;
+        }
+        case AArch64::FCCMPSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCCMPSrr\n");
+            break;
+        }
+        case AArch64::FCMEQ32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQ32\n");
+            break;
+        }
+        case AArch64::FCMEQ64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQ64\n");
+            break;
+        }
+        case AArch64::FCMEQv1i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv1i32rz\n");
+            break;
+        }
+        case AArch64::FCMEQv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv1i64rz\n");
+            break;
+        }
+        case AArch64::FCMEQv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv2f32\n");
+            break;
+        }
+        case AArch64::FCMEQv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv2f64\n");
+            break;
+        }
+        case AArch64::FCMEQv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv2i32rz\n");
+            break;
+        }
+        case AArch64::FCMEQv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv2i64rz\n");
+            break;
+        }
+        case AArch64::FCMEQv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv4f32\n");
+            break;
+        }
+        case AArch64::FCMEQv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMEQv4i32rz\n");
+            break;
+        }
+        case AArch64::FCMGE32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGE32\n");
+            break;
+        }
+        case AArch64::FCMGE64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGE64\n");
+            break;
+        }
+        case AArch64::FCMGEv1i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv1i32rz\n");
+            break;
+        }
+        case AArch64::FCMGEv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv1i64rz\n");
+            break;
+        }
+        case AArch64::FCMGEv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv2f32\n");
+            break;
+        }
+        case AArch64::FCMGEv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv2f64\n");
+            break;
+        }
+        case AArch64::FCMGEv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv2i32rz\n");
+            break;
+        }
+        case AArch64::FCMGEv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv2i64rz\n");
+            break;
+        }
+        case AArch64::FCMGEv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv4f32\n");
+            break;
+        }
+        case AArch64::FCMGEv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGEv4i32rz\n");
+            break;
+        }
+        case AArch64::FCMGT32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGT32\n");
+            break;
+        }
+        case AArch64::FCMGT64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGT64\n");
+            break;
+        }
+        case AArch64::FCMGTv1i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv1i32rz\n");
+            break;
+        }
+        case AArch64::FCMGTv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv1i64rz\n");
+            break;
+        }
+        case AArch64::FCMGTv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv2f32\n");
+            break;
+        }
+        case AArch64::FCMGTv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv2f64\n");
+            break;
+        }
+        case AArch64::FCMGTv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv2i32rz\n");
+            break;
+        }
+        case AArch64::FCMGTv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv2i64rz\n");
+            break;
+        }
+        case AArch64::FCMGTv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv4f32\n");
+            break;
+        }
+        case AArch64::FCMGTv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMGTv4i32rz\n");
+            break;
+        }
+        case AArch64::FCMLEv1i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLEv1i32rz\n");
+            break;
+        }
+        case AArch64::FCMLEv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLEv1i64rz\n");
+            break;
+        }
+        case AArch64::FCMLEv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLEv2i32rz\n");
+            break;
+        }
+        case AArch64::FCMLEv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLEv2i64rz\n");
+            break;
+        }
+        case AArch64::FCMLEv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLEv4i32rz\n");
+            break;
+        }
+        case AArch64::FCMLTv1i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLTv1i32rz\n");
+            break;
+        }
+        case AArch64::FCMLTv1i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLTv1i64rz\n");
+            break;
+        }
+        case AArch64::FCMLTv2i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLTv2i32rz\n");
+            break;
+        }
+        case AArch64::FCMLTv2i64rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLTv2i64rz\n");
+            break;
+        }
+        case AArch64::FCMLTv4i32rz: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMLTv4i32rz\n");
+            break;
+        }
+        case AArch64::FCMPDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPDri\n");
+            break;
+        }
+        case AArch64::FCMPDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPDrr\n");
+            break;
+        }
+        case AArch64::FCMPEDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPEDri\n");
+            break;
+        }
+        case AArch64::FCMPEDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPEDrr\n");
+            break;
+        }
+        case AArch64::FCMPESri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPESri\n");
+            break;
+        }
+        case AArch64::FCMPESrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPESrr\n");
+            break;
+        }
+        case AArch64::FCMPSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPSri\n");
+            break;
+        }
+        case AArch64::FCMPSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCMPSrr\n");
+            break;
+        }
+        case AArch64::FCSELDrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCSELDrrr\n");
+            break;
+        }
+        case AArch64::FCSELSrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCSELSrrr\n");
+            break;
+        }
+        case AArch64::FCVTASUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASUWDr\n");
+            break;
+        }
+        case AArch64::FCVTASUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASUWSr\n");
+            break;
+        }
+        case AArch64::FCVTASUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASUXDr\n");
+            break;
+        }
+        case AArch64::FCVTASUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASUXSr\n");
+            break;
+        }
+        case AArch64::FCVTASv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASv1i32\n");
+            break;
+        }
+        case AArch64::FCVTASv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASv1i64\n");
+            break;
+        }
+        case AArch64::FCVTASv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASv2f32\n");
+            break;
+        }
+        case AArch64::FCVTASv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASv2f64\n");
+            break;
+        }
+        case AArch64::FCVTASv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTASv4f32\n");
+            break;
+        }
+        case AArch64::FCVTAUUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUUWDr\n");
+            break;
+        }
+        case AArch64::FCVTAUUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUUWSr\n");
+            break;
+        }
+        case AArch64::FCVTAUUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUUXDr\n");
+            break;
+        }
+        case AArch64::FCVTAUUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUUXSr\n");
+            break;
+        }
+        case AArch64::FCVTAUv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUv1i32\n");
+            break;
+        }
+        case AArch64::FCVTAUv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUv1i64\n");
+            break;
+        }
+        case AArch64::FCVTAUv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUv2f32\n");
+            break;
+        }
+        case AArch64::FCVTAUv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUv2f64\n");
+            break;
+        }
+        case AArch64::FCVTAUv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTAUv4f32\n");
+            break;
+        }
+        case AArch64::FCVTDHr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTDHr\n");
+            break;
+        }
+        case AArch64::FCVTDSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTDSr\n");
+            break;
+        }
+        case AArch64::FCVTHDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTHDr\n");
+            break;
+        }
+        case AArch64::FCVTHSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTHSr\n");
+            break;
+        }
+        case AArch64::FCVTLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTLv2i32\n");
+            break;
+        }
+        case AArch64::FCVTLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTLv4i16\n");
+            break;
+        }
+        case AArch64::FCVTLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTLv4i32\n");
+            break;
+        }
+        case AArch64::FCVTLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTLv8i16\n");
+            break;
+        }
+        case AArch64::FCVTMSUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSUWDr\n");
+            break;
+        }
+        case AArch64::FCVTMSUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSUWSr\n");
+            break;
+        }
+        case AArch64::FCVTMSUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSUXDr\n");
+            break;
+        }
+        case AArch64::FCVTMSUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSUXSr\n");
+            break;
+        }
+        case AArch64::FCVTMSv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSv1i32\n");
+            break;
+        }
+        case AArch64::FCVTMSv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSv1i64\n");
+            break;
+        }
+        case AArch64::FCVTMSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSv2f32\n");
+            break;
+        }
+        case AArch64::FCVTMSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSv2f64\n");
+            break;
+        }
+        case AArch64::FCVTMSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMSv4f32\n");
+            break;
+        }
+        case AArch64::FCVTMUUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUUWDr\n");
+            break;
+        }
+        case AArch64::FCVTMUUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUUWSr\n");
+            break;
+        }
+        case AArch64::FCVTMUUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUUXDr\n");
+            break;
+        }
+        case AArch64::FCVTMUUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUUXSr\n");
+            break;
+        }
+        case AArch64::FCVTMUv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUv1i32\n");
+            break;
+        }
+        case AArch64::FCVTMUv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUv1i64\n");
+            break;
+        }
+        case AArch64::FCVTMUv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUv2f32\n");
+            break;
+        }
+        case AArch64::FCVTMUv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUv2f64\n");
+            break;
+        }
+        case AArch64::FCVTMUv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTMUv4f32\n");
+            break;
+        }
+        case AArch64::FCVTNSUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSUWDr\n");
+            break;
+        }
+        case AArch64::FCVTNSUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSUWSr\n");
+            break;
+        }
+        case AArch64::FCVTNSUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSUXDr\n");
+            break;
+        }
+        case AArch64::FCVTNSUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSUXSr\n");
+            break;
+        }
+        case AArch64::FCVTNSv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSv1i32\n");
+            break;
+        }
+        case AArch64::FCVTNSv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSv1i64\n");
+            break;
+        }
+        case AArch64::FCVTNSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSv2f32\n");
+            break;
+        }
+        case AArch64::FCVTNSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSv2f64\n");
+            break;
+        }
+        case AArch64::FCVTNSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNSv4f32\n");
+            break;
+        }
+        case AArch64::FCVTNUUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUUWDr\n");
+            break;
+        }
+        case AArch64::FCVTNUUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUUWSr\n");
+            break;
+        }
+        case AArch64::FCVTNUUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUUXDr\n");
+            break;
+        }
+        case AArch64::FCVTNUUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUUXSr\n");
+            break;
+        }
+        case AArch64::FCVTNUv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUv1i32\n");
+            break;
+        }
+        case AArch64::FCVTNUv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUv1i64\n");
+            break;
+        }
+        case AArch64::FCVTNUv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUv2f32\n");
+            break;
+        }
+        case AArch64::FCVTNUv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUv2f64\n");
+            break;
+        }
+        case AArch64::FCVTNUv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNUv4f32\n");
+            break;
+        }
+        case AArch64::FCVTNv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNv2i32\n");
+            break;
+        }
+        case AArch64::FCVTNv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNv4i16\n");
+            break;
+        }
+        case AArch64::FCVTNv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNv4i32\n");
+            break;
+        }
+        case AArch64::FCVTNv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTNv8i16\n");
+            break;
+        }
+        case AArch64::FCVTPSUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSUWDr\n");
+            break;
+        }
+        case AArch64::FCVTPSUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSUWSr\n");
+            break;
+        }
+        case AArch64::FCVTPSUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSUXDr\n");
+            break;
+        }
+        case AArch64::FCVTPSUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSUXSr\n");
+            break;
+        }
+        case AArch64::FCVTPSv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSv1i32\n");
+            break;
+        }
+        case AArch64::FCVTPSv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSv1i64\n");
+            break;
+        }
+        case AArch64::FCVTPSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSv2f32\n");
+            break;
+        }
+        case AArch64::FCVTPSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSv2f64\n");
+            break;
+        }
+        case AArch64::FCVTPSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPSv4f32\n");
+            break;
+        }
+        case AArch64::FCVTPUUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUUWDr\n");
+            break;
+        }
+        case AArch64::FCVTPUUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUUWSr\n");
+            break;
+        }
+        case AArch64::FCVTPUUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUUXDr\n");
+            break;
+        }
+        case AArch64::FCVTPUUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUUXSr\n");
+            break;
+        }
+        case AArch64::FCVTPUv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUv1i32\n");
+            break;
+        }
+        case AArch64::FCVTPUv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUv1i64\n");
+            break;
+        }
+        case AArch64::FCVTPUv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUv2f32\n");
+            break;
+        }
+        case AArch64::FCVTPUv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUv2f64\n");
+            break;
+        }
+        case AArch64::FCVTPUv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTPUv4f32\n");
+            break;
+        }
+        case AArch64::FCVTSDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTSDr\n");
+            break;
+        }
+        case AArch64::FCVTSHr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTSHr\n");
+            break;
+        }
+        case AArch64::FCVTXNv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTXNv1i64\n");
+            break;
+        }
+        case AArch64::FCVTXNv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTXNv2f32\n");
+            break;
+        }
+        case AArch64::FCVTXNv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTXNv4f32\n");
+            break;
+        }
+        case AArch64::FCVTZSSWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSSWDri\n");
+            break;
+        }
+        case AArch64::FCVTZSSWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSSWSri\n");
+            break;
+        }
+        case AArch64::FCVTZSSXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSSXDri\n");
+            break;
+        }
+        case AArch64::FCVTZSSXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSSXSri\n");
+            break;
+        }
+        case AArch64::FCVTZSUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSUWDr\n");
+            break;
+        }
+        case AArch64::FCVTZSUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSUWSr\n");
+            break;
+        }
+        case AArch64::FCVTZSUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSUXDr\n");
+            break;
+        }
+        case AArch64::FCVTZSUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSUXSr\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntSWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntSWDri\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntSWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntSWSri\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntSXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntSXDri\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntSXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntSXSri\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntUWDr\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntUWSr\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntUXDr\n");
+            break;
+        }
+        case AArch64::FCVTZS_IntUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_IntUXSr\n");
+            break;
+        }
+        case AArch64::FCVTZS_Intv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_Intv2f32\n");
+            break;
+        }
+        case AArch64::FCVTZS_Intv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_Intv2f64\n");
+            break;
+        }
+        case AArch64::FCVTZS_Intv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZS_Intv4f32\n");
+            break;
+        }
+        case AArch64::FCVTZSd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSd\n");
+            break;
+        }
+        case AArch64::FCVTZSs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSs\n");
+            break;
+        }
+        case AArch64::FCVTZSv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv1i32\n");
+            break;
+        }
+        case AArch64::FCVTZSv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv1i64\n");
+            break;
+        }
+        case AArch64::FCVTZSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv2f32\n");
+            break;
+        }
+        case AArch64::FCVTZSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv2f64\n");
+            break;
+        }
+        case AArch64::FCVTZSv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv2i32_shift\n");
+            break;
+        }
+        case AArch64::FCVTZSv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv2i64_shift\n");
+            break;
+        }
+        case AArch64::FCVTZSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv4f32\n");
+            break;
+        }
+        case AArch64::FCVTZSv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZSv4i32_shift\n");
+            break;
+        }
+        case AArch64::FCVTZUSWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUSWDri\n");
+            break;
+        }
+        case AArch64::FCVTZUSWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUSWSri\n");
+            break;
+        }
+        case AArch64::FCVTZUSXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUSXDri\n");
+            break;
+        }
+        case AArch64::FCVTZUSXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUSXSri\n");
+            break;
+        }
+        case AArch64::FCVTZUUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUUWDr\n");
+            break;
+        }
+        case AArch64::FCVTZUUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUUWSr\n");
+            break;
+        }
+        case AArch64::FCVTZUUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUUXDr\n");
+            break;
+        }
+        case AArch64::FCVTZUUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUUXSr\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntSWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntSWDri\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntSWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntSWSri\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntSXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntSXDri\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntSXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntSXSri\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntUWDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntUWDr\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntUWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntUWSr\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntUXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntUXDr\n");
+            break;
+        }
+        case AArch64::FCVTZU_IntUXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_IntUXSr\n");
+            break;
+        }
+        case AArch64::FCVTZU_Intv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_Intv2f32\n");
+            break;
+        }
+        case AArch64::FCVTZU_Intv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_Intv2f64\n");
+            break;
+        }
+        case AArch64::FCVTZU_Intv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZU_Intv4f32\n");
+            break;
+        }
+        case AArch64::FCVTZUd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUd\n");
+            break;
+        }
+        case AArch64::FCVTZUs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUs\n");
+            break;
+        }
+        case AArch64::FCVTZUv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv1i32\n");
+            break;
+        }
+        case AArch64::FCVTZUv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv1i64\n");
+            break;
+        }
+        case AArch64::FCVTZUv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv2f32\n");
+            break;
+        }
+        case AArch64::FCVTZUv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv2f64\n");
+            break;
+        }
+        case AArch64::FCVTZUv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv2i32_shift\n");
+            break;
+        }
+        case AArch64::FCVTZUv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv2i64_shift\n");
+            break;
+        }
+        case AArch64::FCVTZUv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv4f32\n");
+            break;
+        }
+        case AArch64::FCVTZUv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FCVTZUv4i32_shift\n");
+            break;
+        }
+        case AArch64::FDIVDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FDIVDrr\n");
+            break;
+        }
+        case AArch64::FDIVSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FDIVSrr\n");
+            break;
+        }
+        case AArch64::FDIVv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FDIVv2f32\n");
+            break;
+        }
+        case AArch64::FDIVv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FDIVv2f64\n");
+            break;
+        }
+        case AArch64::FDIVv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FDIVv4f32\n");
+            break;
+        }
+        case AArch64::FMADDDrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMADDDrrr\n");
+            break;
+        }
+        case AArch64::FMADDSrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMADDSrrr\n");
+            break;
+        }
+        case AArch64::FMAXDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXDrr\n");
+            break;
+        }
+        case AArch64::FMAXNMDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMDrr\n");
+            break;
+        }
+        case AArch64::FMAXNMPv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMPv2f32\n");
+            break;
+        }
+        case AArch64::FMAXNMPv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMPv2f64\n");
+            break;
+        }
+        case AArch64::FMAXNMPv2i32p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMPv2i32p\n");
+            break;
+        }
+        case AArch64::FMAXNMPv2i64p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMPv2i64p\n");
+            break;
+        }
+        case AArch64::FMAXNMPv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMPv4f32\n");
+            break;
+        }
+        case AArch64::FMAXNMSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMSrr\n");
+            break;
+        }
+        case AArch64::FMAXNMVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMVv4i32v\n");
+            break;
+        }
+        case AArch64::FMAXNMv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMv2f32\n");
+            break;
+        }
+        case AArch64::FMAXNMv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMv2f64\n");
+            break;
+        }
+        case AArch64::FMAXNMv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXNMv4f32\n");
+            break;
+        }
+        case AArch64::FMAXPv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXPv2f32\n");
+            break;
+        }
+        case AArch64::FMAXPv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXPv2f64\n");
+            break;
+        }
+        case AArch64::FMAXPv2i32p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXPv2i32p\n");
+            break;
+        }
+        case AArch64::FMAXPv2i64p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXPv2i64p\n");
+            break;
+        }
+        case AArch64::FMAXPv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXPv4f32\n");
+            break;
+        }
+        case AArch64::FMAXSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXSrr\n");
+            break;
+        }
+        case AArch64::FMAXVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXVv4i32v\n");
+            break;
+        }
+        case AArch64::FMAXv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXv2f32\n");
+            break;
+        }
+        case AArch64::FMAXv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXv2f64\n");
+            break;
+        }
+        case AArch64::FMAXv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMAXv4f32\n");
+            break;
+        }
+        case AArch64::FMINDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINDrr\n");
+            break;
+        }
+        case AArch64::FMINNMDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMDrr\n");
+            break;
+        }
+        case AArch64::FMINNMPv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMPv2f32\n");
+            break;
+        }
+        case AArch64::FMINNMPv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMPv2f64\n");
+            break;
+        }
+        case AArch64::FMINNMPv2i32p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMPv2i32p\n");
+            break;
+        }
+        case AArch64::FMINNMPv2i64p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMPv2i64p\n");
+            break;
+        }
+        case AArch64::FMINNMPv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMPv4f32\n");
+            break;
+        }
+        case AArch64::FMINNMSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMSrr\n");
+            break;
+        }
+        case AArch64::FMINNMVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMVv4i32v\n");
+            break;
+        }
+        case AArch64::FMINNMv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMv2f32\n");
+            break;
+        }
+        case AArch64::FMINNMv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMv2f64\n");
+            break;
+        }
+        case AArch64::FMINNMv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINNMv4f32\n");
+            break;
+        }
+        case AArch64::FMINPv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINPv2f32\n");
+            break;
+        }
+        case AArch64::FMINPv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINPv2f64\n");
+            break;
+        }
+        case AArch64::FMINPv2i32p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINPv2i32p\n");
+            break;
+        }
+        case AArch64::FMINPv2i64p: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINPv2i64p\n");
+            break;
+        }
+        case AArch64::FMINPv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINPv4f32\n");
+            break;
+        }
+        case AArch64::FMINSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINSrr\n");
+            break;
+        }
+        case AArch64::FMINVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINVv4i32v\n");
+            break;
+        }
+        case AArch64::FMINv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINv2f32\n");
+            break;
+        }
+        case AArch64::FMINv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINv2f64\n");
+            break;
+        }
+        case AArch64::FMINv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMINv4f32\n");
+            break;
+        }
+        case AArch64::FMLAv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv1i32_indexed\n");
+            break;
+        }
+        case AArch64::FMLAv1i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv1i64_indexed\n");
+            break;
+        }
+        case AArch64::FMLAv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv2f32\n");
+            break;
+        }
+        case AArch64::FMLAv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv2f64\n");
+            break;
+        }
+        case AArch64::FMLAv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv2i32_indexed\n");
+            break;
+        }
+        case AArch64::FMLAv2i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv2i64_indexed\n");
+            break;
+        }
+        case AArch64::FMLAv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv4f32\n");
+            break;
+        }
+        case AArch64::FMLAv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLAv4i32_indexed\n");
+            break;
+        }
+        case AArch64::FMLSv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv1i32_indexed\n");
+            break;
+        }
+        case AArch64::FMLSv1i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv1i64_indexed\n");
+            break;
+        }
+        case AArch64::FMLSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv2f32\n");
+            break;
+        }
+        case AArch64::FMLSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv2f64\n");
+            break;
+        }
+        case AArch64::FMLSv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv2i32_indexed\n");
+            break;
+        }
+        case AArch64::FMLSv2i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv2i64_indexed\n");
+            break;
+        }
+        case AArch64::FMLSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv4f32\n");
+            break;
+        }
+        case AArch64::FMLSv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMLSv4i32_indexed\n");
+            break;
+        }
+        case AArch64::FMOVD0: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVD0\n");
+            break;
+        }
+        case AArch64::FMOVDXHighr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVDXHighr\n");
+            break;
+        }
+        case AArch64::FMOVDXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVDXr\n");
+            break;
+        }
+        case AArch64::FMOVDi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVDi\n");
+            break;
+        }
+        case AArch64::FMOVDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVDr\n");
+            break;
+        }
+        case AArch64::FMOVS0: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVS0\n");
+            break;
+        }
+        case AArch64::FMOVSWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVSWr\n");
+            break;
+        }
+        case AArch64::FMOVSi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVSi\n");
+            break;
+        }
+        case AArch64::FMOVSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVSr\n");
+            break;
+        }
+        case AArch64::FMOVWSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVWSr\n");
+            break;
+        }
+        case AArch64::FMOVXDHighr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVXDHighr\n");
+            break;
+        }
+        case AArch64::FMOVXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVXDr\n");
+            break;
+        }
+        case AArch64::FMOVv2f32_ns: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVv2f32_ns\n");
+            break;
+        }
+        case AArch64::FMOVv2f64_ns: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVv2f64_ns\n");
+            break;
+        }
+        case AArch64::FMOVv4f32_ns: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMOVv4f32_ns\n");
+            break;
+        }
+        case AArch64::FMSUBDrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMSUBDrrr\n");
+            break;
+        }
+        case AArch64::FMSUBSrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMSUBSrrr\n");
+            break;
+        }
+        case AArch64::FMULDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULDrr\n");
+            break;
+        }
+        case AArch64::FMULSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULSrr\n");
+            break;
+        }
+        case AArch64::FMULX32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULX32\n");
+            break;
+        }
+        case AArch64::FMULX64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULX64\n");
+            break;
+        }
+        case AArch64::FMULXv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv1i32_indexed\n");
+            break;
+        }
+        case AArch64::FMULXv1i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv1i64_indexed\n");
+            break;
+        }
+        case AArch64::FMULXv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv2f32\n");
+            break;
+        }
+        case AArch64::FMULXv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv2f64\n");
+            break;
+        }
+        case AArch64::FMULXv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv2i32_indexed\n");
+            break;
+        }
+        case AArch64::FMULXv2i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv2i64_indexed\n");
+            break;
+        }
+        case AArch64::FMULXv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv4f32\n");
+            break;
+        }
+        case AArch64::FMULXv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULXv4i32_indexed\n");
+            break;
+        }
+        case AArch64::FMULv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv1i32_indexed\n");
+            break;
+        }
+        case AArch64::FMULv1i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv1i64_indexed\n");
+            break;
+        }
+        case AArch64::FMULv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv2f32\n");
+            break;
+        }
+        case AArch64::FMULv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv2f64\n");
+            break;
+        }
+        case AArch64::FMULv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv2i32_indexed\n");
+            break;
+        }
+        case AArch64::FMULv2i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv2i64_indexed\n");
+            break;
+        }
+        case AArch64::FMULv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv4f32\n");
+            break;
+        }
+        case AArch64::FMULv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FMULv4i32_indexed\n");
+            break;
+        }
+        case AArch64::FNEGDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNEGDr\n");
+            break;
+        }
+        case AArch64::FNEGSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNEGSr\n");
+            break;
+        }
+        case AArch64::FNEGv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNEGv2f32\n");
+            break;
+        }
+        case AArch64::FNEGv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNEGv2f64\n");
+            break;
+        }
+        case AArch64::FNEGv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNEGv4f32\n");
+            break;
+        }
+        case AArch64::FNMADDDrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNMADDDrrr\n");
+            break;
+        }
+        case AArch64::FNMADDSrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNMADDSrrr\n");
+            break;
+        }
+        case AArch64::FNMSUBDrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNMSUBDrrr\n");
+            break;
+        }
+        case AArch64::FNMSUBSrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNMSUBSrrr\n");
+            break;
+        }
+        case AArch64::FNMULDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNMULDrr\n");
+            break;
+        }
+        case AArch64::FNMULSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FNMULSrr\n");
+            break;
+        }
+        case AArch64::FRECPEv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPEv1i32\n");
+            break;
+        }
+        case AArch64::FRECPEv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPEv1i64\n");
+            break;
+        }
+        case AArch64::FRECPEv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPEv2f32\n");
+            break;
+        }
+        case AArch64::FRECPEv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPEv2f64\n");
+            break;
+        }
+        case AArch64::FRECPEv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPEv4f32\n");
+            break;
+        }
+        case AArch64::FRECPS32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPS32\n");
+            break;
+        }
+        case AArch64::FRECPS64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPS64\n");
+            break;
+        }
+        case AArch64::FRECPSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPSv2f32\n");
+            break;
+        }
+        case AArch64::FRECPSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPSv2f64\n");
+            break;
+        }
+        case AArch64::FRECPSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPSv4f32\n");
+            break;
+        }
+        case AArch64::FRECPXv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPXv1i32\n");
+            break;
+        }
+        case AArch64::FRECPXv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRECPXv1i64\n");
+            break;
+        }
+        case AArch64::FRINTADr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTADr\n");
+            break;
+        }
+        case AArch64::FRINTASr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTASr\n");
+            break;
+        }
+        case AArch64::FRINTAv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTAv2f32\n");
+            break;
+        }
+        case AArch64::FRINTAv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTAv2f64\n");
+            break;
+        }
+        case AArch64::FRINTAv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTAv4f32\n");
+            break;
+        }
+        case AArch64::FRINTIDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTIDr\n");
+            break;
+        }
+        case AArch64::FRINTISr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTISr\n");
+            break;
+        }
+        case AArch64::FRINTIv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTIv2f32\n");
+            break;
+        }
+        case AArch64::FRINTIv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTIv2f64\n");
+            break;
+        }
+        case AArch64::FRINTIv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTIv4f32\n");
+            break;
+        }
+        case AArch64::FRINTMDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTMDr\n");
+            break;
+        }
+        case AArch64::FRINTMSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTMSr\n");
+            break;
+        }
+        case AArch64::FRINTMv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTMv2f32\n");
+            break;
+        }
+        case AArch64::FRINTMv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTMv2f64\n");
+            break;
+        }
+        case AArch64::FRINTMv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTMv4f32\n");
+            break;
+        }
+        case AArch64::FRINTNDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTNDr\n");
+            break;
+        }
+        case AArch64::FRINTNSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTNSr\n");
+            break;
+        }
+        case AArch64::FRINTNv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTNv2f32\n");
+            break;
+        }
+        case AArch64::FRINTNv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTNv2f64\n");
+            break;
+        }
+        case AArch64::FRINTNv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTNv4f32\n");
+            break;
+        }
+        case AArch64::FRINTPDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTPDr\n");
+            break;
+        }
+        case AArch64::FRINTPSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTPSr\n");
+            break;
+        }
+        case AArch64::FRINTPv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTPv2f32\n");
+            break;
+        }
+        case AArch64::FRINTPv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTPv2f64\n");
+            break;
+        }
+        case AArch64::FRINTPv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTPv4f32\n");
+            break;
+        }
+        case AArch64::FRINTXDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTXDr\n");
+            break;
+        }
+        case AArch64::FRINTXSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTXSr\n");
+            break;
+        }
+        case AArch64::FRINTXv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTXv2f32\n");
+            break;
+        }
+        case AArch64::FRINTXv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTXv2f64\n");
+            break;
+        }
+        case AArch64::FRINTXv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTXv4f32\n");
+            break;
+        }
+        case AArch64::FRINTZDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTZDr\n");
+            break;
+        }
+        case AArch64::FRINTZSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTZSr\n");
+            break;
+        }
+        case AArch64::FRINTZv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTZv2f32\n");
+            break;
+        }
+        case AArch64::FRINTZv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTZv2f64\n");
+            break;
+        }
+        case AArch64::FRINTZv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRINTZv4f32\n");
+            break;
+        }
+        case AArch64::FRSQRTEv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTEv1i32\n");
+            break;
+        }
+        case AArch64::FRSQRTEv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTEv1i64\n");
+            break;
+        }
+        case AArch64::FRSQRTEv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTEv2f32\n");
+            break;
+        }
+        case AArch64::FRSQRTEv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTEv2f64\n");
+            break;
+        }
+        case AArch64::FRSQRTEv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTEv4f32\n");
+            break;
+        }
+        case AArch64::FRSQRTS32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTS32\n");
+            break;
+        }
+        case AArch64::FRSQRTS64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTS64\n");
+            break;
+        }
+        case AArch64::FRSQRTSv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTSv2f32\n");
+            break;
+        }
+        case AArch64::FRSQRTSv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTSv2f64\n");
+            break;
+        }
+        case AArch64::FRSQRTSv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FRSQRTSv4f32\n");
+            break;
+        }
+        case AArch64::FSQRTDr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSQRTDr\n");
+            break;
+        }
+        case AArch64::FSQRTSr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSQRTSr\n");
+            break;
+        }
+        case AArch64::FSQRTv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSQRTv2f32\n");
+            break;
+        }
+        case AArch64::FSQRTv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSQRTv2f64\n");
+            break;
+        }
+        case AArch64::FSQRTv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSQRTv4f32\n");
+            break;
+        }
+        case AArch64::FSUBDrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSUBDrr\n");
+            break;
+        }
+        case AArch64::FSUBSrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSUBSrr\n");
+            break;
+        }
+        case AArch64::FSUBv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSUBv2f32\n");
+            break;
+        }
+        case AArch64::FSUBv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSUBv2f64\n");
+            break;
+        }
+        case AArch64::FSUBv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " FSUBv4f32\n");
+            break;
+        }
+        case AArch64::HINT: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " HINT\n");
+            break;
+        }
+        case AArch64::HLT: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " HLT\n");
+            break;
+        }
+        case AArch64::HVC: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " HVC\n");
+            break;
+        }
+        case AArch64::INSvi16gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi16gpr\n");
+            break;
+        }
+        case AArch64::INSvi16lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi16lane\n");
+            break;
+        }
+        case AArch64::INSvi32gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi32gpr\n");
+            break;
+        }
+        case AArch64::INSvi32lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi32lane\n");
+            break;
+        }
+        case AArch64::INSvi64gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi64gpr\n");
+            break;
+        }
+        case AArch64::INSvi64lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi64lane\n");
+            break;
+        }
+        case AArch64::INSvi8gpr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi8gpr\n");
+            break;
+        }
+        case AArch64::INSvi8lane: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " INSvi8lane\n");
+            break;
+        }
+        case AArch64::ISB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ISB\n");
+            break;
+        }
+        case AArch64::LD1Fourv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv16b\n");
+            break;
+        }
+        case AArch64::LD1Fourv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv16b_POST\n");
+            break;
+        }
+        case AArch64::LD1Fourv1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv1d\n");
+            break;
+        }
+        case AArch64::LD1Fourv1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv1d_POST\n");
+            break;
+        }
+        case AArch64::LD1Fourv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv2d\n");
+            break;
+        }
+        case AArch64::LD1Fourv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv2d_POST\n");
+            break;
+        }
+        case AArch64::LD1Fourv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv2s\n");
+            break;
+        }
+        case AArch64::LD1Fourv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv2s_POST\n");
+            break;
+        }
+        case AArch64::LD1Fourv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv4h\n");
+            break;
+        }
+        case AArch64::LD1Fourv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv4h_POST\n");
+            break;
+        }
+        case AArch64::LD1Fourv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv4s\n");
+            break;
+        }
+        case AArch64::LD1Fourv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv4s_POST\n");
+            break;
+        }
+        case AArch64::LD1Fourv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv8b\n");
+            break;
+        }
+        case AArch64::LD1Fourv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv8b_POST\n");
+            break;
+        }
+        case AArch64::LD1Fourv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv8h\n");
+            break;
+        }
+        case AArch64::LD1Fourv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Fourv8h_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev16b\n");
+            break;
+        }
+        case AArch64::LD1Onev16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev16b_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev1d\n");
+            break;
+        }
+        case AArch64::LD1Onev1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev1d_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev2d\n");
+            break;
+        }
+        case AArch64::LD1Onev2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev2d_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev2s\n");
+            break;
+        }
+        case AArch64::LD1Onev2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev2s_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev4h\n");
+            break;
+        }
+        case AArch64::LD1Onev4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev4h_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev4s\n");
+            break;
+        }
+        case AArch64::LD1Onev4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev4s_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev8b\n");
+            break;
+        }
+        case AArch64::LD1Onev8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev8b_POST\n");
+            break;
+        }
+        case AArch64::LD1Onev8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev8h\n");
+            break;
+        }
+        case AArch64::LD1Onev8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Onev8h_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv16b\n");
+            break;
+        }
+        case AArch64::LD1Rv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv16b_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv1d\n");
+            break;
+        }
+        case AArch64::LD1Rv1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv1d_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv2d\n");
+            break;
+        }
+        case AArch64::LD1Rv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv2d_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv2s\n");
+            break;
+        }
+        case AArch64::LD1Rv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv2s_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv4h\n");
+            break;
+        }
+        case AArch64::LD1Rv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv4h_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv4s\n");
+            break;
+        }
+        case AArch64::LD1Rv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv4s_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv8b\n");
+            break;
+        }
+        case AArch64::LD1Rv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv8b_POST\n");
+            break;
+        }
+        case AArch64::LD1Rv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv8h\n");
+            break;
+        }
+        case AArch64::LD1Rv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Rv8h_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev16b\n");
+            break;
+        }
+        case AArch64::LD1Threev16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev16b_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev1d\n");
+            break;
+        }
+        case AArch64::LD1Threev1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev1d_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev2d\n");
+            break;
+        }
+        case AArch64::LD1Threev2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev2d_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev2s\n");
+            break;
+        }
+        case AArch64::LD1Threev2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev2s_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev4h\n");
+            break;
+        }
+        case AArch64::LD1Threev4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev4h_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev4s\n");
+            break;
+        }
+        case AArch64::LD1Threev4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev4s_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev8b\n");
+            break;
+        }
+        case AArch64::LD1Threev8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev8b_POST\n");
+            break;
+        }
+        case AArch64::LD1Threev8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev8h\n");
+            break;
+        }
+        case AArch64::LD1Threev8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Threev8h_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov16b\n");
+            break;
+        }
+        case AArch64::LD1Twov16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov16b_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov1d\n");
+            break;
+        }
+        case AArch64::LD1Twov1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov1d_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov2d\n");
+            break;
+        }
+        case AArch64::LD1Twov2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov2d_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov2s\n");
+            break;
+        }
+        case AArch64::LD1Twov2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov2s_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov4h\n");
+            break;
+        }
+        case AArch64::LD1Twov4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov4h_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov4s\n");
+            break;
+        }
+        case AArch64::LD1Twov4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov4s_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov8b\n");
+            break;
+        }
+        case AArch64::LD1Twov8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov8b_POST\n");
+            break;
+        }
+        case AArch64::LD1Twov8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov8h\n");
+            break;
+        }
+        case AArch64::LD1Twov8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1Twov8h_POST\n");
+            break;
+        }
+        case AArch64::LD1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i16\n");
+            break;
+        }
+        case AArch64::LD1i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i16_POST\n");
+            break;
+        }
+        case AArch64::LD1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i32\n");
+            break;
+        }
+        case AArch64::LD1i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i32_POST\n");
+            break;
+        }
+        case AArch64::LD1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i64\n");
+            break;
+        }
+        case AArch64::LD1i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i64_POST\n");
+            break;
+        }
+        case AArch64::LD1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i8\n");
+            break;
+        }
+        case AArch64::LD1i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD1i8_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv16b\n");
+            break;
+        }
+        case AArch64::LD2Rv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv16b_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv1d\n");
+            break;
+        }
+        case AArch64::LD2Rv1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv1d_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv2d\n");
+            break;
+        }
+        case AArch64::LD2Rv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv2d_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv2s\n");
+            break;
+        }
+        case AArch64::LD2Rv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv2s_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv4h\n");
+            break;
+        }
+        case AArch64::LD2Rv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv4h_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv4s\n");
+            break;
+        }
+        case AArch64::LD2Rv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv4s_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv8b\n");
+            break;
+        }
+        case AArch64::LD2Rv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv8b_POST\n");
+            break;
+        }
+        case AArch64::LD2Rv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv8h\n");
+            break;
+        }
+        case AArch64::LD2Rv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Rv8h_POST\n");
+            break;
+        }
+        case AArch64::LD2Twov16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov16b\n");
+            break;
+        }
+        case AArch64::LD2Twov16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov16b_POST\n");
+            break;
+        }
+        case AArch64::LD2Twov2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov2d\n");
+            break;
+        }
+        case AArch64::LD2Twov2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov2d_POST\n");
+            break;
+        }
+        case AArch64::LD2Twov2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov2s\n");
+            break;
+        }
+        case AArch64::LD2Twov2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov2s_POST\n");
+            break;
+        }
+        case AArch64::LD2Twov4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov4h\n");
+            break;
+        }
+        case AArch64::LD2Twov4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov4h_POST\n");
+            break;
+        }
+        case AArch64::LD2Twov4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov4s\n");
+            break;
+        }
+        case AArch64::LD2Twov4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov4s_POST\n");
+            break;
+        }
+        case AArch64::LD2Twov8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov8b\n");
+            break;
+        }
+        case AArch64::LD2Twov8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov8b_POST\n");
+            break;
+        }
+        case AArch64::LD2Twov8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov8h\n");
+            break;
+        }
+        case AArch64::LD2Twov8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2Twov8h_POST\n");
+            break;
+        }
+        case AArch64::LD2i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i16\n");
+            break;
+        }
+        case AArch64::LD2i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i16_POST\n");
+            break;
+        }
+        case AArch64::LD2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i32\n");
+            break;
+        }
+        case AArch64::LD2i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i32_POST\n");
+            break;
+        }
+        case AArch64::LD2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i64\n");
+            break;
+        }
+        case AArch64::LD2i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i64_POST\n");
+            break;
+        }
+        case AArch64::LD2i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i8\n");
+            break;
+        }
+        case AArch64::LD2i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD2i8_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv16b\n");
+            break;
+        }
+        case AArch64::LD3Rv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv16b_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv1d\n");
+            break;
+        }
+        case AArch64::LD3Rv1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv1d_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv2d\n");
+            break;
+        }
+        case AArch64::LD3Rv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv2d_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv2s\n");
+            break;
+        }
+        case AArch64::LD3Rv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv2s_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv4h\n");
+            break;
+        }
+        case AArch64::LD3Rv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv4h_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv4s\n");
+            break;
+        }
+        case AArch64::LD3Rv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv4s_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv8b\n");
+            break;
+        }
+        case AArch64::LD3Rv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv8b_POST\n");
+            break;
+        }
+        case AArch64::LD3Rv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv8h\n");
+            break;
+        }
+        case AArch64::LD3Rv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Rv8h_POST\n");
+            break;
+        }
+        case AArch64::LD3Threev16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev16b\n");
+            break;
+        }
+        case AArch64::LD3Threev16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev16b_POST\n");
+            break;
+        }
+        case AArch64::LD3Threev2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev2d\n");
+            break;
+        }
+        case AArch64::LD3Threev2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev2d_POST\n");
+            break;
+        }
+        case AArch64::LD3Threev2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev2s\n");
+            break;
+        }
+        case AArch64::LD3Threev2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev2s_POST\n");
+            break;
+        }
+        case AArch64::LD3Threev4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev4h\n");
+            break;
+        }
+        case AArch64::LD3Threev4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev4h_POST\n");
+            break;
+        }
+        case AArch64::LD3Threev4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev4s\n");
+            break;
+        }
+        case AArch64::LD3Threev4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev4s_POST\n");
+            break;
+        }
+        case AArch64::LD3Threev8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev8b\n");
+            break;
+        }
+        case AArch64::LD3Threev8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev8b_POST\n");
+            break;
+        }
+        case AArch64::LD3Threev8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev8h\n");
+            break;
+        }
+        case AArch64::LD3Threev8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3Threev8h_POST\n");
+            break;
+        }
+        case AArch64::LD3i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i16\n");
+            break;
+        }
+        case AArch64::LD3i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i16_POST\n");
+            break;
+        }
+        case AArch64::LD3i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i32\n");
+            break;
+        }
+        case AArch64::LD3i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i32_POST\n");
+            break;
+        }
+        case AArch64::LD3i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i64\n");
+            break;
+        }
+        case AArch64::LD3i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i64_POST\n");
+            break;
+        }
+        case AArch64::LD3i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i8\n");
+            break;
+        }
+        case AArch64::LD3i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD3i8_POST\n");
+            break;
+        }
+        case AArch64::LD4Fourv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv16b\n");
+            break;
+        }
+        case AArch64::LD4Fourv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv16b_POST\n");
+            break;
+        }
+        case AArch64::LD4Fourv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv2d\n");
+            break;
+        }
+        case AArch64::LD4Fourv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv2d_POST\n");
+            break;
+        }
+        case AArch64::LD4Fourv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv2s\n");
+            break;
+        }
+        case AArch64::LD4Fourv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv2s_POST\n");
+            break;
+        }
+        case AArch64::LD4Fourv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv4h\n");
+            break;
+        }
+        case AArch64::LD4Fourv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv4h_POST\n");
+            break;
+        }
+        case AArch64::LD4Fourv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv4s\n");
+            break;
+        }
+        case AArch64::LD4Fourv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv4s_POST\n");
+            break;
+        }
+        case AArch64::LD4Fourv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv8b\n");
+            break;
+        }
+        case AArch64::LD4Fourv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv8b_POST\n");
+            break;
+        }
+        case AArch64::LD4Fourv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv8h\n");
+            break;
+        }
+        case AArch64::LD4Fourv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Fourv8h_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv16b\n");
+            break;
+        }
+        case AArch64::LD4Rv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv16b_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv1d\n");
+            break;
+        }
+        case AArch64::LD4Rv1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv1d_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv2d\n");
+            break;
+        }
+        case AArch64::LD4Rv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv2d_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv2s\n");
+            break;
+        }
+        case AArch64::LD4Rv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv2s_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv4h\n");
+            break;
+        }
+        case AArch64::LD4Rv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv4h_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv4s\n");
+            break;
+        }
+        case AArch64::LD4Rv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv4s_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv8b\n");
+            break;
+        }
+        case AArch64::LD4Rv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv8b_POST\n");
+            break;
+        }
+        case AArch64::LD4Rv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv8h\n");
+            break;
+        }
+        case AArch64::LD4Rv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4Rv8h_POST\n");
+            break;
+        }
+        case AArch64::LD4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i16\n");
+            break;
+        }
+        case AArch64::LD4i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i16_POST\n");
+            break;
+        }
+        case AArch64::LD4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i32\n");
+            break;
+        }
+        case AArch64::LD4i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i32_POST\n");
+            break;
+        }
+        case AArch64::LD4i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i64\n");
+            break;
+        }
+        case AArch64::LD4i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i64_POST\n");
+            break;
+        }
+        case AArch64::LD4i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i8\n");
+            break;
+        }
+        case AArch64::LD4i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LD4i8_POST\n");
+            break;
+        }
+        case AArch64::LDADDALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDALb\n");
+            break;
+        }
+        case AArch64::LDADDALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDALd\n");
+            break;
+        }
+        case AArch64::LDADDALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDALh\n");
+            break;
+        }
+        case AArch64::LDADDALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDALs\n");
+            break;
+        }
+        case AArch64::LDADDAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDAb\n");
+            break;
+        }
+        case AArch64::LDADDAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDAd\n");
+            break;
+        }
+        case AArch64::LDADDAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDAh\n");
+            break;
+        }
+        case AArch64::LDADDAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDAs\n");
+            break;
+        }
+        case AArch64::LDADDLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDLb\n");
+            break;
+        }
+        case AArch64::LDADDLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDLd\n");
+            break;
+        }
+        case AArch64::LDADDLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDLh\n");
+            break;
+        }
+        case AArch64::LDADDLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDLs\n");
+            break;
+        }
+        case AArch64::LDADDb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDb\n");
+            break;
+        }
+        case AArch64::LDADDd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDd\n");
+            break;
+        }
+        case AArch64::LDADDh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDh\n");
+            break;
+        }
+        case AArch64::LDADDs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDADDs\n");
+            break;
+        }
+        case AArch64::LDARB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDARB\n");
+            break;
+        }
+        case AArch64::LDARH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDARH\n");
+            break;
+        }
+        case AArch64::LDARW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDARW\n");
+            break;
+        }
+        case AArch64::LDARX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDARX\n");
+            break;
+        }
+        case AArch64::LDAXPW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDAXPW\n");
+            break;
+        }
+        case AArch64::LDAXPX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDAXPX\n");
+            break;
+        }
+        case AArch64::LDAXRB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDAXRB\n");
+            break;
+        }
+        case AArch64::LDAXRH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDAXRH\n");
+            break;
+        }
+        case AArch64::LDAXRW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDAXRW\n");
+            break;
+        }
+        case AArch64::LDAXRX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDAXRX\n");
+            break;
+        }
+        case AArch64::LDCLRALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRALb\n");
+            break;
+        }
+        case AArch64::LDCLRALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRALd\n");
+            break;
+        }
+        case AArch64::LDCLRALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRALh\n");
+            break;
+        }
+        case AArch64::LDCLRALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRALs\n");
+            break;
+        }
+        case AArch64::LDCLRAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRAb\n");
+            break;
+        }
+        case AArch64::LDCLRAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRAd\n");
+            break;
+        }
+        case AArch64::LDCLRAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRAh\n");
+            break;
+        }
+        case AArch64::LDCLRAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRAs\n");
+            break;
+        }
+        case AArch64::LDCLRLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRLb\n");
+            break;
+        }
+        case AArch64::LDCLRLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRLd\n");
+            break;
+        }
+        case AArch64::LDCLRLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRLh\n");
+            break;
+        }
+        case AArch64::LDCLRLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRLs\n");
+            break;
+        }
+        case AArch64::LDCLRb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRb\n");
+            break;
+        }
+        case AArch64::LDCLRd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRd\n");
+            break;
+        }
+        case AArch64::LDCLRh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRh\n");
+            break;
+        }
+        case AArch64::LDCLRs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDCLRs\n");
+            break;
+        }
+        case AArch64::LDEORALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORALb\n");
+            break;
+        }
+        case AArch64::LDEORALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORALd\n");
+            break;
+        }
+        case AArch64::LDEORALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORALh\n");
+            break;
+        }
+        case AArch64::LDEORALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORALs\n");
+            break;
+        }
+        case AArch64::LDEORAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORAb\n");
+            break;
+        }
+        case AArch64::LDEORAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORAd\n");
+            break;
+        }
+        case AArch64::LDEORAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORAh\n");
+            break;
+        }
+        case AArch64::LDEORAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORAs\n");
+            break;
+        }
+        case AArch64::LDEORLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORLb\n");
+            break;
+        }
+        case AArch64::LDEORLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORLd\n");
+            break;
+        }
+        case AArch64::LDEORLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORLh\n");
+            break;
+        }
+        case AArch64::LDEORLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORLs\n");
+            break;
+        }
+        case AArch64::LDEORb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORb\n");
+            break;
+        }
+        case AArch64::LDEORd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORd\n");
+            break;
+        }
+        case AArch64::LDEORh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORh\n");
+            break;
+        }
+        case AArch64::LDEORs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDEORs\n");
+            break;
+        }
+        case AArch64::LDLARB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDLARB\n");
+            break;
+        }
+        case AArch64::LDLARH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDLARH\n");
+            break;
+        }
+        case AArch64::LDLARW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDLARW\n");
+            break;
+        }
+        case AArch64::LDLARX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDLARX\n");
+            break;
+        }
+        case AArch64::LDNPDi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDNPDi\n");
+            break;
+        }
+        case AArch64::LDNPQi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDNPQi\n");
+            break;
+        }
+        case AArch64::LDNPSi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDNPSi\n");
+            break;
+        }
+        case AArch64::LDNPWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDNPWi\n");
+            break;
+        }
+        case AArch64::LDNPXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDNPXi\n");
+            break;
+        }
+        case AArch64::LDPDi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPDi\n");
+            break;
+        }
+        case AArch64::LDPDpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPDpost\n");
+            break;
+        }
+        case AArch64::LDPDpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPDpre\n");
+            break;
+        }
+        case AArch64::LDPQi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPQi\n");
+            break;
+        }
+        case AArch64::LDPQpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPQpost\n");
+            break;
+        }
+        case AArch64::LDPQpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPQpre\n");
+            break;
+        }
+        case AArch64::LDPSWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPSWi\n");
+            break;
+        }
+        case AArch64::LDPSWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPSWpost\n");
+            break;
+        }
+        case AArch64::LDPSWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPSWpre\n");
+            break;
+        }
+        case AArch64::LDPSi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPSi\n");
+            break;
+        }
+        case AArch64::LDPSpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPSpost\n");
+            break;
+        }
+        case AArch64::LDPSpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPSpre\n");
+            break;
+        }
+        case AArch64::LDPWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPWi\n");
+            break;
+        }
+        case AArch64::LDPWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPWpost\n");
+            break;
+        }
+        case AArch64::LDPWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPWpre\n");
+            break;
+        }
+        case AArch64::LDPXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPXi\n");
+            break;
+        }
+        case AArch64::LDPXpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPXpost\n");
+            break;
+        }
+        case AArch64::LDPXpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDPXpre\n");
+            break;
+        }
+        case AArch64::LDRBBpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBBpost\n");
+            break;
+        }
+        case AArch64::LDRBBpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBBpre\n");
+            break;
+        }
+        case AArch64::LDRBBroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBBroW\n");
+            break;
+        }
+        case AArch64::LDRBBroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBBroX\n");
+            break;
+        }
+        case AArch64::LDRBBui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBBui\n");
+            break;
+        }
+        case AArch64::LDRBpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBpost\n");
+            break;
+        }
+        case AArch64::LDRBpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBpre\n");
+            break;
+        }
+        case AArch64::LDRBroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBroW\n");
+            break;
+        }
+        case AArch64::LDRBroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBroX\n");
+            break;
+        }
+        case AArch64::LDRBui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRBui\n");
+            break;
+        }
+        case AArch64::LDRDl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRDl\n");
+            break;
+        }
+        case AArch64::LDRDpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRDpost\n");
+            break;
+        }
+        case AArch64::LDRDpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRDpre\n");
+            break;
+        }
+        case AArch64::LDRDroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRDroW\n");
+            break;
+        }
+        case AArch64::LDRDroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRDroX\n");
+            break;
+        }
+        case AArch64::LDRDui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRDui\n");
+            break;
+        }
+        case AArch64::LDRHHpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHHpost\n");
+            break;
+        }
+        case AArch64::LDRHHpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHHpre\n");
+            break;
+        }
+        case AArch64::LDRHHroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHHroW\n");
+            break;
+        }
+        case AArch64::LDRHHroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHHroX\n");
+            break;
+        }
+        case AArch64::LDRHHui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHHui\n");
+            break;
+        }
+        case AArch64::LDRHpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHpost\n");
+            break;
+        }
+        case AArch64::LDRHpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHpre\n");
+            break;
+        }
+        case AArch64::LDRHroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHroW\n");
+            break;
+        }
+        case AArch64::LDRHroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHroX\n");
+            break;
+        }
+        case AArch64::LDRHui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRHui\n");
+            break;
+        }
+        case AArch64::LDRQl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRQl\n");
+            break;
+        }
+        case AArch64::LDRQpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRQpost\n");
+            break;
+        }
+        case AArch64::LDRQpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRQpre\n");
+            break;
+        }
+        case AArch64::LDRQroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRQroW\n");
+            break;
+        }
+        case AArch64::LDRQroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRQroX\n");
+            break;
+        }
+        case AArch64::LDRQui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRQui\n");
+            break;
+        }
+        case AArch64::LDRSBWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBWpost\n");
+            break;
+        }
+        case AArch64::LDRSBWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBWpre\n");
+            break;
+        }
+        case AArch64::LDRSBWroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBWroW\n");
+            break;
+        }
+        case AArch64::LDRSBWroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBWroX\n");
+            break;
+        }
+        case AArch64::LDRSBWui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBWui\n");
+            break;
+        }
+        case AArch64::LDRSBXpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBXpost\n");
+            break;
+        }
+        case AArch64::LDRSBXpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBXpre\n");
+            break;
+        }
+        case AArch64::LDRSBXroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBXroW\n");
+            break;
+        }
+        case AArch64::LDRSBXroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBXroX\n");
+            break;
+        }
+        case AArch64::LDRSBXui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSBXui\n");
+            break;
+        }
+        case AArch64::LDRSHWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHWpost\n");
+            break;
+        }
+        case AArch64::LDRSHWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHWpre\n");
+            break;
+        }
+        case AArch64::LDRSHWroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHWroW\n");
+            break;
+        }
+        case AArch64::LDRSHWroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHWroX\n");
+            break;
+        }
+        case AArch64::LDRSHWui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHWui\n");
+            break;
+        }
+        case AArch64::LDRSHXpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHXpost\n");
+            break;
+        }
+        case AArch64::LDRSHXpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHXpre\n");
+            break;
+        }
+        case AArch64::LDRSHXroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHXroW\n");
+            break;
+        }
+        case AArch64::LDRSHXroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHXroX\n");
+            break;
+        }
+        case AArch64::LDRSHXui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSHXui\n");
+            break;
+        }
+        case AArch64::LDRSWl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSWl\n");
+            break;
+        }
+        case AArch64::LDRSWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSWpost\n");
+            break;
+        }
+        case AArch64::LDRSWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSWpre\n");
+            break;
+        }
+        case AArch64::LDRSWroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSWroW\n");
+            break;
+        }
+        case AArch64::LDRSWroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSWroX\n");
+            break;
+        }
+        case AArch64::LDRSWui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSWui\n");
+            break;
+        }
+        case AArch64::LDRSl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSl\n");
+            break;
+        }
+        case AArch64::LDRSpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSpost\n");
+            break;
+        }
+        case AArch64::LDRSpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSpre\n");
+            break;
+        }
+        case AArch64::LDRSroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSroW\n");
+            break;
+        }
+        case AArch64::LDRSroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSroX\n");
+            break;
+        }
+        case AArch64::LDRSui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRSui\n");
+            break;
+        }
+        case AArch64::LDRWl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRWl\n");
+            break;
+        }
+        case AArch64::LDRWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRWpost\n");
+            break;
+        }
+        case AArch64::LDRWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRWpre\n");
+            break;
+        }
+        case AArch64::LDRWroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRWroW\n");
+            break;
+        }
+        case AArch64::LDRWroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRWroX\n");
+            break;
+        }
+        case AArch64::LDRWui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRWui\n");
+            break;
+        }
+        case AArch64::LDRXl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRXl\n");
+            break;
+        }
+        case AArch64::LDRXpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRXpost\n");
+            break;
+        }
+        case AArch64::LDRXpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRXpre\n");
+            break;
+        }
+        case AArch64::LDRXroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRXroW\n");
+            break;
+        }
+        case AArch64::LDRXroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRXroX\n");
+            break;
+        }
+        case AArch64::LDRXui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDRXui\n");
+            break;
+        }
+        case AArch64::LDSETALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETALb\n");
+            break;
+        }
+        case AArch64::LDSETALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETALd\n");
+            break;
+        }
+        case AArch64::LDSETALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETALh\n");
+            break;
+        }
+        case AArch64::LDSETALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETALs\n");
+            break;
+        }
+        case AArch64::LDSETAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETAb\n");
+            break;
+        }
+        case AArch64::LDSETAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETAd\n");
+            break;
+        }
+        case AArch64::LDSETAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETAh\n");
+            break;
+        }
+        case AArch64::LDSETAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETAs\n");
+            break;
+        }
+        case AArch64::LDSETLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETLb\n");
+            break;
+        }
+        case AArch64::LDSETLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETLd\n");
+            break;
+        }
+        case AArch64::LDSETLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETLh\n");
+            break;
+        }
+        case AArch64::LDSETLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETLs\n");
+            break;
+        }
+        case AArch64::LDSETb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETb\n");
+            break;
+        }
+        case AArch64::LDSETd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETd\n");
+            break;
+        }
+        case AArch64::LDSETh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETh\n");
+            break;
+        }
+        case AArch64::LDSETs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSETs\n");
+            break;
+        }
+        case AArch64::LDSMAXALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXALb\n");
+            break;
+        }
+        case AArch64::LDSMAXALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXALd\n");
+            break;
+        }
+        case AArch64::LDSMAXALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXALh\n");
+            break;
+        }
+        case AArch64::LDSMAXALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXALs\n");
+            break;
+        }
+        case AArch64::LDSMAXAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXAb\n");
+            break;
+        }
+        case AArch64::LDSMAXAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXAd\n");
+            break;
+        }
+        case AArch64::LDSMAXAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXAh\n");
+            break;
+        }
+        case AArch64::LDSMAXAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXAs\n");
+            break;
+        }
+        case AArch64::LDSMAXLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXLb\n");
+            break;
+        }
+        case AArch64::LDSMAXLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXLd\n");
+            break;
+        }
+        case AArch64::LDSMAXLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXLh\n");
+            break;
+        }
+        case AArch64::LDSMAXLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXLs\n");
+            break;
+        }
+        case AArch64::LDSMAXb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXb\n");
+            break;
+        }
+        case AArch64::LDSMAXd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXd\n");
+            break;
+        }
+        case AArch64::LDSMAXh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXh\n");
+            break;
+        }
+        case AArch64::LDSMAXs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMAXs\n");
+            break;
+        }
+        case AArch64::LDSMINALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINALb\n");
+            break;
+        }
+        case AArch64::LDSMINALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINALd\n");
+            break;
+        }
+        case AArch64::LDSMINALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINALh\n");
+            break;
+        }
+        case AArch64::LDSMINALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINALs\n");
+            break;
+        }
+        case AArch64::LDSMINAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINAb\n");
+            break;
+        }
+        case AArch64::LDSMINAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINAd\n");
+            break;
+        }
+        case AArch64::LDSMINAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINAh\n");
+            break;
+        }
+        case AArch64::LDSMINAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINAs\n");
+            break;
+        }
+        case AArch64::LDSMINLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINLb\n");
+            break;
+        }
+        case AArch64::LDSMINLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINLd\n");
+            break;
+        }
+        case AArch64::LDSMINLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINLh\n");
+            break;
+        }
+        case AArch64::LDSMINLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINLs\n");
+            break;
+        }
+        case AArch64::LDSMINb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINb\n");
+            break;
+        }
+        case AArch64::LDSMINd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINd\n");
+            break;
+        }
+        case AArch64::LDSMINh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINh\n");
+            break;
+        }
+        case AArch64::LDSMINs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDSMINs\n");
+            break;
+        }
+        case AArch64::LDTRBi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRBi\n");
+            break;
+        }
+        case AArch64::LDTRHi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRHi\n");
+            break;
+        }
+        case AArch64::LDTRSBWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRSBWi\n");
+            break;
+        }
+        case AArch64::LDTRSBXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRSBXi\n");
+            break;
+        }
+        case AArch64::LDTRSHWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRSHWi\n");
+            break;
+        }
+        case AArch64::LDTRSHXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRSHXi\n");
+            break;
+        }
+        case AArch64::LDTRSWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRSWi\n");
+            break;
+        }
+        case AArch64::LDTRWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRWi\n");
+            break;
+        }
+        case AArch64::LDTRXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDTRXi\n");
+            break;
+        }
+        case AArch64::LDUMAXALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXALb\n");
+            break;
+        }
+        case AArch64::LDUMAXALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXALd\n");
+            break;
+        }
+        case AArch64::LDUMAXALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXALh\n");
+            break;
+        }
+        case AArch64::LDUMAXALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXALs\n");
+            break;
+        }
+        case AArch64::LDUMAXAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXAb\n");
+            break;
+        }
+        case AArch64::LDUMAXAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXAd\n");
+            break;
+        }
+        case AArch64::LDUMAXAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXAh\n");
+            break;
+        }
+        case AArch64::LDUMAXAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXAs\n");
+            break;
+        }
+        case AArch64::LDUMAXLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXLb\n");
+            break;
+        }
+        case AArch64::LDUMAXLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXLd\n");
+            break;
+        }
+        case AArch64::LDUMAXLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXLh\n");
+            break;
+        }
+        case AArch64::LDUMAXLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXLs\n");
+            break;
+        }
+        case AArch64::LDUMAXb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXb\n");
+            break;
+        }
+        case AArch64::LDUMAXd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXd\n");
+            break;
+        }
+        case AArch64::LDUMAXh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXh\n");
+            break;
+        }
+        case AArch64::LDUMAXs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMAXs\n");
+            break;
+        }
+        case AArch64::LDUMINALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINALb\n");
+            break;
+        }
+        case AArch64::LDUMINALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINALd\n");
+            break;
+        }
+        case AArch64::LDUMINALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINALh\n");
+            break;
+        }
+        case AArch64::LDUMINALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINALs\n");
+            break;
+        }
+        case AArch64::LDUMINAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINAb\n");
+            break;
+        }
+        case AArch64::LDUMINAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINAd\n");
+            break;
+        }
+        case AArch64::LDUMINAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINAh\n");
+            break;
+        }
+        case AArch64::LDUMINAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINAs\n");
+            break;
+        }
+        case AArch64::LDUMINLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINLb\n");
+            break;
+        }
+        case AArch64::LDUMINLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINLd\n");
+            break;
+        }
+        case AArch64::LDUMINLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINLh\n");
+            break;
+        }
+        case AArch64::LDUMINLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINLs\n");
+            break;
+        }
+        case AArch64::LDUMINb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINb\n");
+            break;
+        }
+        case AArch64::LDUMINd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINd\n");
+            break;
+        }
+        case AArch64::LDUMINh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINh\n");
+            break;
+        }
+        case AArch64::LDUMINs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDUMINs\n");
+            break;
+        }
+        case AArch64::LDURBBi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURBBi\n");
+            break;
+        }
+        case AArch64::LDURBi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURBi\n");
+            break;
+        }
+        case AArch64::LDURDi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURDi\n");
+            break;
+        }
+        case AArch64::LDURHHi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURHHi\n");
+            break;
+        }
+        case AArch64::LDURHi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURHi\n");
+            break;
+        }
+        case AArch64::LDURQi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURQi\n");
+            break;
+        }
+        case AArch64::LDURSBWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURSBWi\n");
+            break;
+        }
+        case AArch64::LDURSBXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURSBXi\n");
+            break;
+        }
+        case AArch64::LDURSHWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURSHWi\n");
+            break;
+        }
+        case AArch64::LDURSHXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURSHXi\n");
+            break;
+        }
+        case AArch64::LDURSWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURSWi\n");
+            break;
+        }
+        case AArch64::LDURSi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURSi\n");
+            break;
+        }
+        case AArch64::LDURWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURWi\n");
+            break;
+        }
+        case AArch64::LDURXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDURXi\n");
+            break;
+        }
+        case AArch64::LDXPW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDXPW\n");
+            break;
+        }
+        case AArch64::LDXPX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDXPX\n");
+            break;
+        }
+        case AArch64::LDXRB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDXRB\n");
+            break;
+        }
+        case AArch64::LDXRH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDXRH\n");
+            break;
+        }
+        case AArch64::LDXRW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDXRW\n");
+            break;
+        }
+        case AArch64::LDXRX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LDXRX\n");
+            break;
+        }
+        case AArch64::LOADgot: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LOADgot\n");
+            break;
+        }
+        case AArch64::LSLVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LSLVWr\n");
+            break;
+        }
+        case AArch64::LSLVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LSLVXr\n");
+            break;
+        }
+        case AArch64::LSRVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LSRVWr\n");
+            break;
+        }
+        case AArch64::LSRVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " LSRVXr\n");
+            break;
+        }
+        case AArch64::MADDWrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MADDWrrr\n");
+            break;
+        }
+        case AArch64::MADDXrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MADDXrrr\n");
+            break;
+        }
+        case AArch64::MLAv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv16i8\n");
+            break;
+        }
+        case AArch64::MLAv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv2i32\n");
+            break;
+        }
+        case AArch64::MLAv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv2i32_indexed\n");
+            break;
+        }
+        case AArch64::MLAv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv4i16\n");
+            break;
+        }
+        case AArch64::MLAv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv4i16_indexed\n");
+            break;
+        }
+        case AArch64::MLAv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv4i32\n");
+            break;
+        }
+        case AArch64::MLAv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv4i32_indexed\n");
+            break;
+        }
+        case AArch64::MLAv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv8i16\n");
+            break;
+        }
+        case AArch64::MLAv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv8i16_indexed\n");
+            break;
+        }
+        case AArch64::MLAv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLAv8i8\n");
+            break;
+        }
+        case AArch64::MLSv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv16i8\n");
+            break;
+        }
+        case AArch64::MLSv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv2i32\n");
+            break;
+        }
+        case AArch64::MLSv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv2i32_indexed\n");
+            break;
+        }
+        case AArch64::MLSv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv4i16\n");
+            break;
+        }
+        case AArch64::MLSv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv4i16_indexed\n");
+            break;
+        }
+        case AArch64::MLSv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv4i32\n");
+            break;
+        }
+        case AArch64::MLSv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv4i32_indexed\n");
+            break;
+        }
+        case AArch64::MLSv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv8i16\n");
+            break;
+        }
+        case AArch64::MLSv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv8i16_indexed\n");
+            break;
+        }
+        case AArch64::MLSv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MLSv8i8\n");
+            break;
+        }
+        case AArch64::MOVID: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVID\n");
+            break;
+        }
+        case AArch64::MOVIv16b_ns: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv16b_ns\n");
+            break;
+        }
+        case AArch64::MOVIv2d_ns: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv2d_ns\n");
+            break;
+        }
+        case AArch64::MOVIv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv2i32\n");
+            break;
+        }
+        case AArch64::MOVIv2s_msl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv2s_msl\n");
+            break;
+        }
+        case AArch64::MOVIv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv4i16\n");
+            break;
+        }
+        case AArch64::MOVIv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv4i32\n");
+            break;
+        }
+        case AArch64::MOVIv4s_msl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv4s_msl\n");
+            break;
+        }
+        case AArch64::MOVIv8b_ns: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv8b_ns\n");
+            break;
+        }
+        case AArch64::MOVIv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVIv8i16\n");
+            break;
+        }
+        case AArch64::MOVKWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVKWi\n");
+            break;
+        }
+        case AArch64::MOVKXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVKXi\n");
+            break;
+        }
+        case AArch64::MOVNWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVNWi\n");
+            break;
+        }
+        case AArch64::MOVNXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVNXi\n");
+            break;
+        }
+        case AArch64::MOVZWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVZWi\n");
+            break;
+        }
+        case AArch64::MOVZXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVZXi\n");
+            break;
+        }
+        case AArch64::MOVaddr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVaddr\n");
+            break;
+        }
+        case AArch64::MOVaddrBA: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVaddrBA\n");
+            break;
+        }
+        case AArch64::MOVaddrCP: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVaddrCP\n");
+            break;
+        }
+        case AArch64::MOVaddrEXT: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVaddrEXT\n");
+            break;
+        }
+        case AArch64::MOVaddrJT: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVaddrJT\n");
+            break;
+        }
+        case AArch64::MOVaddrTLS: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVaddrTLS\n");
+            break;
+        }
+        case AArch64::MOVi32imm: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVi32imm\n");
+            break;
+        }
+        case AArch64::MOVi64imm: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MOVi64imm\n");
+            break;
+        }
+        case AArch64::MRS: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MRS\n");
+            break;
+        }
+        case AArch64::MSR: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MSR\n");
+            break;
+        }
+        case AArch64::MSRpstate: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MSRpstate\n");
+            break;
+        }
+        case AArch64::MSUBWrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MSUBWrrr\n");
+            break;
+        }
+        case AArch64::MSUBXrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MSUBXrrr\n");
+            break;
+        }
+        case AArch64::MULv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv16i8\n");
+            break;
+        }
+        case AArch64::MULv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv2i32\n");
+            break;
+        }
+        case AArch64::MULv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv2i32_indexed\n");
+            break;
+        }
+        case AArch64::MULv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv4i16\n");
+            break;
+        }
+        case AArch64::MULv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv4i16_indexed\n");
+            break;
+        }
+        case AArch64::MULv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv4i32\n");
+            break;
+        }
+        case AArch64::MULv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv4i32_indexed\n");
+            break;
+        }
+        case AArch64::MULv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv8i16\n");
+            break;
+        }
+        case AArch64::MULv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv8i16_indexed\n");
+            break;
+        }
+        case AArch64::MULv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MULv8i8\n");
+            break;
+        }
+        case AArch64::MVNIv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MVNIv2i32\n");
+            break;
+        }
+        case AArch64::MVNIv2s_msl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MVNIv2s_msl\n");
+            break;
+        }
+        case AArch64::MVNIv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MVNIv4i16\n");
+            break;
+        }
+        case AArch64::MVNIv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MVNIv4i32\n");
+            break;
+        }
+        case AArch64::MVNIv4s_msl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MVNIv4s_msl\n");
+            break;
+        }
+        case AArch64::MVNIv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " MVNIv8i16\n");
+            break;
+        }
+        case AArch64::NEGv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv16i8\n");
+            break;
+        }
+        case AArch64::NEGv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv1i64\n");
+            break;
+        }
+        case AArch64::NEGv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv2i32\n");
+            break;
+        }
+        case AArch64::NEGv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv2i64\n");
+            break;
+        }
+        case AArch64::NEGv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv4i16\n");
+            break;
+        }
+        case AArch64::NEGv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv4i32\n");
+            break;
+        }
+        case AArch64::NEGv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv8i16\n");
+            break;
+        }
+        case AArch64::NEGv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NEGv8i8\n");
+            break;
+        }
+        case AArch64::NOTv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NOTv16i8\n");
+            break;
+        }
+        case AArch64::NOTv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " NOTv8i8\n");
+            break;
+        }
+        case AArch64::ORNWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORNWrr\n");
+            break;
+        }
+        case AArch64::ORNWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORNWrs\n");
+            break;
+        }
+        case AArch64::ORNXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORNXrr\n");
+            break;
+        }
+        case AArch64::ORNXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORNXrs\n");
+            break;
+        }
+        case AArch64::ORNv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORNv16i8\n");
+            break;
+        }
+        case AArch64::ORNv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORNv8i8\n");
+            break;
+        }
+        case AArch64::ORRWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRWri\n");
+            break;
+        }
+        case AArch64::ORRWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRWrr\n");
+            break;
+        }
+        case AArch64::ORRWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRWrs\n");
+            break;
+        }
+        case AArch64::ORRXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRXri\n");
+            break;
+        }
+        case AArch64::ORRXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRXrr\n");
+            break;
+        }
+        case AArch64::ORRXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRXrs\n");
+            break;
+        }
+        case AArch64::ORRv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRv16i8\n");
+            break;
+        }
+        case AArch64::ORRv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRv2i32\n");
+            break;
+        }
+        case AArch64::ORRv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRv4i16\n");
+            break;
+        }
+        case AArch64::ORRv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRv4i32\n");
+            break;
+        }
+        case AArch64::ORRv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRv8i16\n");
+            break;
+        }
+        case AArch64::ORRv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ORRv8i8\n");
+            break;
+        }
+        case AArch64::PMULLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PMULLv16i8\n");
+            break;
+        }
+        case AArch64::PMULLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PMULLv1i64\n");
+            break;
+        }
+        case AArch64::PMULLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PMULLv2i64\n");
+            break;
+        }
+        case AArch64::PMULLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PMULLv8i8\n");
+            break;
+        }
+        case AArch64::PMULv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PMULv16i8\n");
+            break;
+        }
+        case AArch64::PMULv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PMULv8i8\n");
+            break;
+        }
+        case AArch64::PRFMl: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PRFMl\n");
+            break;
+        }
+        case AArch64::PRFMroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PRFMroW\n");
+            break;
+        }
+        case AArch64::PRFMroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PRFMroX\n");
+            break;
+        }
+        case AArch64::PRFMui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PRFMui\n");
+            break;
+        }
+        case AArch64::PRFUMi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " PRFUMi\n");
+            break;
+        }
+        case AArch64::RADDHNv2i64_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RADDHNv2i64_v2i32\n");
+            break;
+        }
+        case AArch64::RADDHNv2i64_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RADDHNv2i64_v4i32\n");
+            break;
+        }
+        case AArch64::RADDHNv4i32_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RADDHNv4i32_v4i16\n");
+            break;
+        }
+        case AArch64::RADDHNv4i32_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RADDHNv4i32_v8i16\n");
+            break;
+        }
+        case AArch64::RADDHNv8i16_v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RADDHNv8i16_v16i8\n");
+            break;
+        }
+        case AArch64::RADDHNv8i16_v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RADDHNv8i16_v8i8\n");
+            break;
+        }
+        case AArch64::RBITWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RBITWr\n");
+            break;
+        }
+        case AArch64::RBITXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RBITXr\n");
+            break;
+        }
+        case AArch64::RBITv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RBITv16i8\n");
+            break;
+        }
+        case AArch64::RBITv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RBITv8i8\n");
+            break;
+        }
+        case AArch64::RET: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RET\n");
+            break;
+        }
+        case AArch64::RET_ReallyLR: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RET_ReallyLR\n");
+            break;
+        }
+        case AArch64::REV16Wr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV16Wr\n");
+            break;
+        }
+        case AArch64::REV16Xr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV16Xr\n");
+            break;
+        }
+        case AArch64::REV16v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV16v16i8\n");
+            break;
+        }
+        case AArch64::REV16v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV16v8i8\n");
+            break;
+        }
+        case AArch64::REV32Xr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV32Xr\n");
+            break;
+        }
+        case AArch64::REV32v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV32v16i8\n");
+            break;
+        }
+        case AArch64::REV32v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV32v4i16\n");
+            break;
+        }
+        case AArch64::REV32v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV32v8i16\n");
+            break;
+        }
+        case AArch64::REV32v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV32v8i8\n");
+            break;
+        }
+        case AArch64::REV64v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV64v16i8\n");
+            break;
+        }
+        case AArch64::REV64v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV64v2i32\n");
+            break;
+        }
+        case AArch64::REV64v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV64v4i16\n");
+            break;
+        }
+        case AArch64::REV64v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV64v4i32\n");
+            break;
+        }
+        case AArch64::REV64v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV64v8i16\n");
+            break;
+        }
+        case AArch64::REV64v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REV64v8i8\n");
+            break;
+        }
+        case AArch64::REVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REVWr\n");
+            break;
+        }
+        case AArch64::REVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " REVXr\n");
+            break;
+        }
+        case AArch64::RORVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RORVWr\n");
+            break;
+        }
+        case AArch64::RORVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RORVXr\n");
+            break;
+        }
+        case AArch64::RSHRNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSHRNv16i8_shift\n");
+            break;
+        }
+        case AArch64::RSHRNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSHRNv2i32_shift\n");
+            break;
+        }
+        case AArch64::RSHRNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSHRNv4i16_shift\n");
+            break;
+        }
+        case AArch64::RSHRNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSHRNv4i32_shift\n");
+            break;
+        }
+        case AArch64::RSHRNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSHRNv8i16_shift\n");
+            break;
+        }
+        case AArch64::RSHRNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSHRNv8i8_shift\n");
+            break;
+        }
+        case AArch64::RSUBHNv2i64_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSUBHNv2i64_v2i32\n");
+            break;
+        }
+        case AArch64::RSUBHNv2i64_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSUBHNv2i64_v4i32\n");
+            break;
+        }
+        case AArch64::RSUBHNv4i32_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSUBHNv4i32_v4i16\n");
+            break;
+        }
+        case AArch64::RSUBHNv4i32_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSUBHNv4i32_v8i16\n");
+            break;
+        }
+        case AArch64::RSUBHNv8i16_v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSUBHNv8i16_v16i8\n");
+            break;
+        }
+        case AArch64::RSUBHNv8i16_v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " RSUBHNv8i16_v8i8\n");
+            break;
+        }
+        case AArch64::SABALv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABALv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SABALv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABALv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SABALv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABALv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SABALv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABALv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SABALv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABALv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SABALv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABALv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SABAv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABAv16i8\n");
+            break;
+        }
+        case AArch64::SABAv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABAv2i32\n");
+            break;
+        }
+        case AArch64::SABAv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABAv4i16\n");
+            break;
+        }
+        case AArch64::SABAv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABAv4i32\n");
+            break;
+        }
+        case AArch64::SABAv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABAv8i16\n");
+            break;
+        }
+        case AArch64::SABAv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABAv8i8\n");
+            break;
+        }
+        case AArch64::SABDLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SABDLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SABDLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SABDLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SABDLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SABDLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SABDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDv16i8\n");
+            break;
+        }
+        case AArch64::SABDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDv2i32\n");
+            break;
+        }
+        case AArch64::SABDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDv4i16\n");
+            break;
+        }
+        case AArch64::SABDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDv4i32\n");
+            break;
+        }
+        case AArch64::SABDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDv8i16\n");
+            break;
+        }
+        case AArch64::SABDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SABDv8i8\n");
+            break;
+        }
+        case AArch64::SADALPv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADALPv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SADALPv2i32_v1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADALPv2i32_v1i64\n");
+            break;
+        }
+        case AArch64::SADALPv4i16_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADALPv4i16_v2i32\n");
+            break;
+        }
+        case AArch64::SADALPv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADALPv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SADALPv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADALPv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SADALPv8i8_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADALPv8i8_v4i16\n");
+            break;
+        }
+        case AArch64::SADDLPv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLPv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SADDLPv2i32_v1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLPv2i32_v1i64\n");
+            break;
+        }
+        case AArch64::SADDLPv4i16_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLPv4i16_v2i32\n");
+            break;
+        }
+        case AArch64::SADDLPv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLPv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SADDLPv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLPv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SADDLPv8i8_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLPv8i8_v4i16\n");
+            break;
+        }
+        case AArch64::SADDLVv16i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLVv16i8v\n");
+            break;
+        }
+        case AArch64::SADDLVv4i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLVv4i16v\n");
+            break;
+        }
+        case AArch64::SADDLVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLVv4i32v\n");
+            break;
+        }
+        case AArch64::SADDLVv8i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLVv8i16v\n");
+            break;
+        }
+        case AArch64::SADDLVv8i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLVv8i8v\n");
+            break;
+        }
+        case AArch64::SADDLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SADDLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SADDLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SADDLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SADDLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SADDLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SADDWv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDWv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SADDWv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDWv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SADDWv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDWv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SADDWv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDWv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SADDWv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDWv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SADDWv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SADDWv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SBCSWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SBCSWr\n");
+            break;
+        }
+        case AArch64::SBCSXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SBCSXr\n");
+            break;
+        }
+        case AArch64::SBCWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SBCWr\n");
+            break;
+        }
+        case AArch64::SBCXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SBCXr\n");
+            break;
+        }
+        case AArch64::SBFMWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SBFMWri\n");
+            break;
+        }
+        case AArch64::SBFMXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SBFMXri\n");
+            break;
+        }
+        case AArch64::SCVTFSWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFSWDri\n");
+            break;
+        }
+        case AArch64::SCVTFSWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFSWSri\n");
+            break;
+        }
+        case AArch64::SCVTFSXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFSXDri\n");
+            break;
+        }
+        case AArch64::SCVTFSXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFSXSri\n");
+            break;
+        }
+        case AArch64::SCVTFUWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFUWDri\n");
+            break;
+        }
+        case AArch64::SCVTFUWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFUWSri\n");
+            break;
+        }
+        case AArch64::SCVTFUXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFUXDri\n");
+            break;
+        }
+        case AArch64::SCVTFUXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFUXSri\n");
+            break;
+        }
+        case AArch64::SCVTFd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFd\n");
+            break;
+        }
+        case AArch64::SCVTFs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFs\n");
+            break;
+        }
+        case AArch64::SCVTFv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv1i32\n");
+            break;
+        }
+        case AArch64::SCVTFv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv1i64\n");
+            break;
+        }
+        case AArch64::SCVTFv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv2f32\n");
+            break;
+        }
+        case AArch64::SCVTFv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv2f64\n");
+            break;
+        }
+        case AArch64::SCVTFv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv2i32_shift\n");
+            break;
+        }
+        case AArch64::SCVTFv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv2i64_shift\n");
+            break;
+        }
+        case AArch64::SCVTFv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv4f32\n");
+            break;
+        }
+        case AArch64::SCVTFv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SCVTFv4i32_shift\n");
+            break;
+        }
+        case AArch64::SDIVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SDIVWr\n");
+            break;
+        }
+        case AArch64::SDIVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SDIVXr\n");
+            break;
+        }
+        case AArch64::SDIV_IntWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SDIV_IntWr\n");
+            break;
+        }
+        case AArch64::SDIV_IntXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SDIV_IntXr\n");
+            break;
+        }
+        case AArch64::SHA1Crrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA1Crrr\n");
+            break;
+        }
+        case AArch64::SHA1Hrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA1Hrr\n");
+            break;
+        }
+        case AArch64::SHA1Mrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA1Mrrr\n");
+            break;
+        }
+        case AArch64::SHA1Prrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA1Prrr\n");
+            break;
+        }
+        case AArch64::SHA1SU0rrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA1SU0rrr\n");
+            break;
+        }
+        case AArch64::SHA1SU1rr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA1SU1rr\n");
+            break;
+        }
+        case AArch64::SHA256H2rrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA256H2rrr\n");
+            break;
+        }
+        case AArch64::SHA256Hrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA256Hrrr\n");
+            break;
+        }
+        case AArch64::SHA256SU0rr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA256SU0rr\n");
+            break;
+        }
+        case AArch64::SHA256SU1rrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHA256SU1rrr\n");
+            break;
+        }
+        case AArch64::SHADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHADDv16i8\n");
+            break;
+        }
+        case AArch64::SHADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHADDv2i32\n");
+            break;
+        }
+        case AArch64::SHADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHADDv4i16\n");
+            break;
+        }
+        case AArch64::SHADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHADDv4i32\n");
+            break;
+        }
+        case AArch64::SHADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHADDv8i16\n");
+            break;
+        }
+        case AArch64::SHADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHADDv8i8\n");
+            break;
+        }
+        case AArch64::SHLLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLLv16i8\n");
+            break;
+        }
+        case AArch64::SHLLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLLv2i32\n");
+            break;
+        }
+        case AArch64::SHLLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLLv4i16\n");
+            break;
+        }
+        case AArch64::SHLLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLLv4i32\n");
+            break;
+        }
+        case AArch64::SHLLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLLv8i16\n");
+            break;
+        }
+        case AArch64::SHLLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLLv8i8\n");
+            break;
+        }
+        case AArch64::SHLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLd\n");
+            break;
+        }
+        case AArch64::SHLv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLv16i8_shift\n");
+            break;
+        }
+        case AArch64::SHLv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLv2i32_shift\n");
+            break;
+        }
+        case AArch64::SHLv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLv2i64_shift\n");
+            break;
+        }
+        case AArch64::SHLv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLv4i16_shift\n");
+            break;
+        }
+        case AArch64::SHLv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLv4i32_shift\n");
+            break;
+        }
+        case AArch64::SHLv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLv8i16_shift\n");
+            break;
+        }
+        case AArch64::SHLv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHLv8i8_shift\n");
+            break;
+        }
+        case AArch64::SHRNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHRNv16i8_shift\n");
+            break;
+        }
+        case AArch64::SHRNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHRNv2i32_shift\n");
+            break;
+        }
+        case AArch64::SHRNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHRNv4i16_shift\n");
+            break;
+        }
+        case AArch64::SHRNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHRNv4i32_shift\n");
+            break;
+        }
+        case AArch64::SHRNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHRNv8i16_shift\n");
+            break;
+        }
+        case AArch64::SHRNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHRNv8i8_shift\n");
+            break;
+        }
+        case AArch64::SHSUBv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHSUBv16i8\n");
+            break;
+        }
+        case AArch64::SHSUBv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHSUBv2i32\n");
+            break;
+        }
+        case AArch64::SHSUBv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHSUBv4i16\n");
+            break;
+        }
+        case AArch64::SHSUBv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHSUBv4i32\n");
+            break;
+        }
+        case AArch64::SHSUBv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHSUBv8i16\n");
+            break;
+        }
+        case AArch64::SHSUBv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SHSUBv8i8\n");
+            break;
+        }
+        case AArch64::SLId: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLId\n");
+            break;
+        }
+        case AArch64::SLIv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLIv16i8_shift\n");
+            break;
+        }
+        case AArch64::SLIv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLIv2i32_shift\n");
+            break;
+        }
+        case AArch64::SLIv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLIv2i64_shift\n");
+            break;
+        }
+        case AArch64::SLIv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLIv4i16_shift\n");
+            break;
+        }
+        case AArch64::SLIv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLIv4i32_shift\n");
+            break;
+        }
+        case AArch64::SLIv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLIv8i16_shift\n");
+            break;
+        }
+        case AArch64::SLIv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SLIv8i8_shift\n");
+            break;
+        }
+        case AArch64::SMADDLrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMADDLrrr\n");
+            break;
+        }
+        case AArch64::SMAXPv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXPv16i8\n");
+            break;
+        }
+        case AArch64::SMAXPv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXPv2i32\n");
+            break;
+        }
+        case AArch64::SMAXPv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXPv4i16\n");
+            break;
+        }
+        case AArch64::SMAXPv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXPv4i32\n");
+            break;
+        }
+        case AArch64::SMAXPv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXPv8i16\n");
+            break;
+        }
+        case AArch64::SMAXPv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXPv8i8\n");
+            break;
+        }
+        case AArch64::SMAXVv16i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXVv16i8v\n");
+            break;
+        }
+        case AArch64::SMAXVv4i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXVv4i16v\n");
+            break;
+        }
+        case AArch64::SMAXVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXVv4i32v\n");
+            break;
+        }
+        case AArch64::SMAXVv8i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXVv8i16v\n");
+            break;
+        }
+        case AArch64::SMAXVv8i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXVv8i8v\n");
+            break;
+        }
+        case AArch64::SMAXv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXv16i8\n");
+            break;
+        }
+        case AArch64::SMAXv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXv2i32\n");
+            break;
+        }
+        case AArch64::SMAXv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXv4i16\n");
+            break;
+        }
+        case AArch64::SMAXv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXv4i32\n");
+            break;
+        }
+        case AArch64::SMAXv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXv8i16\n");
+            break;
+        }
+        case AArch64::SMAXv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMAXv8i8\n");
+            break;
+        }
+        case AArch64::SMC: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMC\n");
+            break;
+        }
+        case AArch64::SMINPv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINPv16i8\n");
+            break;
+        }
+        case AArch64::SMINPv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINPv2i32\n");
+            break;
+        }
+        case AArch64::SMINPv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINPv4i16\n");
+            break;
+        }
+        case AArch64::SMINPv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINPv4i32\n");
+            break;
+        }
+        case AArch64::SMINPv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINPv8i16\n");
+            break;
+        }
+        case AArch64::SMINPv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINPv8i8\n");
+            break;
+        }
+        case AArch64::SMINVv16i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINVv16i8v\n");
+            break;
+        }
+        case AArch64::SMINVv4i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINVv4i16v\n");
+            break;
+        }
+        case AArch64::SMINVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINVv4i32v\n");
+            break;
+        }
+        case AArch64::SMINVv8i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINVv8i16v\n");
+            break;
+        }
+        case AArch64::SMINVv8i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINVv8i8v\n");
+            break;
+        }
+        case AArch64::SMINv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINv16i8\n");
+            break;
+        }
+        case AArch64::SMINv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINv2i32\n");
+            break;
+        }
+        case AArch64::SMINv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINv4i16\n");
+            break;
+        }
+        case AArch64::SMINv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINv4i32\n");
+            break;
+        }
+        case AArch64::SMINv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINv8i16\n");
+            break;
+        }
+        case AArch64::SMINv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMINv8i8\n");
+            break;
+        }
+        case AArch64::SMLALv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SMLALv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SMLALv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SMLALv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SMLALv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SMLALv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SMLALv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SMLALv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SMLALv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SMLALv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLALv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SMLSLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SMLSLv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SMLSLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SMLSLv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SMLSLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SMLSLv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SMLSLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SMLSLv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SMLSLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SMLSLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMLSLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SMOVvi16to32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMOVvi16to32\n");
+            break;
+        }
+        case AArch64::SMOVvi16to64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMOVvi16to64\n");
+            break;
+        }
+        case AArch64::SMOVvi32to64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMOVvi32to64\n");
+            break;
+        }
+        case AArch64::SMOVvi8to32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMOVvi8to32\n");
+            break;
+        }
+        case AArch64::SMOVvi8to64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMOVvi8to64\n");
+            break;
+        }
+        case AArch64::SMSUBLrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMSUBLrrr\n");
+            break;
+        }
+        case AArch64::SMULHrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULHrr\n");
+            break;
+        }
+        case AArch64::SMULLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SMULLv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SMULLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SMULLv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SMULLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SMULLv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SMULLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SMULLv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SMULLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SMULLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SMULLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SQABSv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv16i8\n");
+            break;
+        }
+        case AArch64::SQABSv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv1i16\n");
+            break;
+        }
+        case AArch64::SQABSv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv1i32\n");
+            break;
+        }
+        case AArch64::SQABSv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv1i64\n");
+            break;
+        }
+        case AArch64::SQABSv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv1i8\n");
+            break;
+        }
+        case AArch64::SQABSv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv2i32\n");
+            break;
+        }
+        case AArch64::SQABSv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv2i64\n");
+            break;
+        }
+        case AArch64::SQABSv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv4i16\n");
+            break;
+        }
+        case AArch64::SQABSv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv4i32\n");
+            break;
+        }
+        case AArch64::SQABSv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv8i16\n");
+            break;
+        }
+        case AArch64::SQABSv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQABSv8i8\n");
+            break;
+        }
+        case AArch64::SQADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv16i8\n");
+            break;
+        }
+        case AArch64::SQADDv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv1i16\n");
+            break;
+        }
+        case AArch64::SQADDv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv1i32\n");
+            break;
+        }
+        case AArch64::SQADDv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv1i64\n");
+            break;
+        }
+        case AArch64::SQADDv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv1i8\n");
+            break;
+        }
+        case AArch64::SQADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv2i32\n");
+            break;
+        }
+        case AArch64::SQADDv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv2i64\n");
+            break;
+        }
+        case AArch64::SQADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv4i16\n");
+            break;
+        }
+        case AArch64::SQADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv4i32\n");
+            break;
+        }
+        case AArch64::SQADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv8i16\n");
+            break;
+        }
+        case AArch64::SQADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQADDv8i8\n");
+            break;
+        }
+        case AArch64::SQDMLALi16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALi16\n");
+            break;
+        }
+        case AArch64::SQDMLALi32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALi32\n");
+            break;
+        }
+        case AArch64::SQDMLALv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv1i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLALv1i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv1i64_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLALv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLALv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SQDMLALv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLALv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SQDMLALv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLALv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SQDMLALv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLALv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLALv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SQDMLSLi16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLi16\n");
+            break;
+        }
+        case AArch64::SQDMLSLi32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLi32\n");
+            break;
+        }
+        case AArch64::SQDMLSLv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv1i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLSLv1i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv1i64_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLSLv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLSLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SQDMLSLv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLSLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SQDMLSLv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLSLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SQDMLSLv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMLSLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMLSLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SQDMULHv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv1i16\n");
+            break;
+        }
+        case AArch64::SQDMULHv1i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv1i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULHv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv1i32\n");
+            break;
+        }
+        case AArch64::SQDMULHv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv1i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULHv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv2i32\n");
+            break;
+        }
+        case AArch64::SQDMULHv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULHv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv4i16\n");
+            break;
+        }
+        case AArch64::SQDMULHv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULHv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv4i32\n");
+            break;
+        }
+        case AArch64::SQDMULHv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULHv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv8i16\n");
+            break;
+        }
+        case AArch64::SQDMULHv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULHv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULLi16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLi16\n");
+            break;
+        }
+        case AArch64::SQDMULLi32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLi32\n");
+            break;
+        }
+        case AArch64::SQDMULLv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv1i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULLv1i64_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv1i64_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULLv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SQDMULLv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SQDMULLv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SQDMULLv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SQDMULLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQDMULLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SQNEGv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv16i8\n");
+            break;
+        }
+        case AArch64::SQNEGv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv1i16\n");
+            break;
+        }
+        case AArch64::SQNEGv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv1i32\n");
+            break;
+        }
+        case AArch64::SQNEGv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv1i64\n");
+            break;
+        }
+        case AArch64::SQNEGv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv1i8\n");
+            break;
+        }
+        case AArch64::SQNEGv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv2i32\n");
+            break;
+        }
+        case AArch64::SQNEGv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv2i64\n");
+            break;
+        }
+        case AArch64::SQNEGv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv4i16\n");
+            break;
+        }
+        case AArch64::SQNEGv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv4i32\n");
+            break;
+        }
+        case AArch64::SQNEGv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv8i16\n");
+            break;
+        }
+        case AArch64::SQNEGv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQNEGv8i8\n");
+            break;
+        }
+        case AArch64::SQRDMLAHi16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHi16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLAHi32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHi32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv1i16\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv1i32\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv2i32\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv4i16\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv4i32\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv8i16\n");
+            break;
+        }
+        case AArch64::SQRDMLAHv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLAHv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLSHi16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHi16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLSHi32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHi32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv1i16\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv1i32\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv2i32\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv4i16\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv4i32\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv8i16\n");
+            break;
+        }
+        case AArch64::SQRDMLSHv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMLSHv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMULHv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv1i16\n");
+            break;
+        }
+        case AArch64::SQRDMULHv1i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv1i16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMULHv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv1i32\n");
+            break;
+        }
+        case AArch64::SQRDMULHv1i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv1i32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMULHv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv2i32\n");
+            break;
+        }
+        case AArch64::SQRDMULHv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv2i32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMULHv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv4i16\n");
+            break;
+        }
+        case AArch64::SQRDMULHv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv4i16_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMULHv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv4i32\n");
+            break;
+        }
+        case AArch64::SQRDMULHv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv4i32_indexed\n");
+            break;
+        }
+        case AArch64::SQRDMULHv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv8i16\n");
+            break;
+        }
+        case AArch64::SQRDMULHv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRDMULHv8i16_indexed\n");
+            break;
+        }
+        case AArch64::SQRSHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv16i8\n");
+            break;
+        }
+        case AArch64::SQRSHLv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv1i16\n");
+            break;
+        }
+        case AArch64::SQRSHLv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv1i32\n");
+            break;
+        }
+        case AArch64::SQRSHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv1i64\n");
+            break;
+        }
+        case AArch64::SQRSHLv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv1i8\n");
+            break;
+        }
+        case AArch64::SQRSHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv2i32\n");
+            break;
+        }
+        case AArch64::SQRSHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv2i64\n");
+            break;
+        }
+        case AArch64::SQRSHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv4i16\n");
+            break;
+        }
+        case AArch64::SQRSHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv4i32\n");
+            break;
+        }
+        case AArch64::SQRSHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv8i16\n");
+            break;
+        }
+        case AArch64::SQRSHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHLv8i8\n");
+            break;
+        }
+        case AArch64::SQRSHRNb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNb\n");
+            break;
+        }
+        case AArch64::SQRSHRNh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNh\n");
+            break;
+        }
+        case AArch64::SQRSHRNs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNs\n");
+            break;
+        }
+        case AArch64::SQRSHRNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNv16i8_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNv2i32_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNv4i16_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNv4i32_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNv8i16_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRNv8i8_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRUNb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNb\n");
+            break;
+        }
+        case AArch64::SQRSHRUNh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNh\n");
+            break;
+        }
+        case AArch64::SQRSHRUNs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNs\n");
+            break;
+        }
+        case AArch64::SQRSHRUNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNv16i8_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRUNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNv2i32_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRUNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNv4i16_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRUNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNv4i32_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRUNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNv8i16_shift\n");
+            break;
+        }
+        case AArch64::SQRSHRUNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQRSHRUNv8i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHLUb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUb\n");
+            break;
+        }
+        case AArch64::SQSHLUd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUd\n");
+            break;
+        }
+        case AArch64::SQSHLUh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUh\n");
+            break;
+        }
+        case AArch64::SQSHLUs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUs\n");
+            break;
+        }
+        case AArch64::SQSHLUv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUv16i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHLUv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUv2i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHLUv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUv2i64_shift\n");
+            break;
+        }
+        case AArch64::SQSHLUv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUv4i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHLUv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUv4i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHLUv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUv8i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHLUv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLUv8i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLb\n");
+            break;
+        }
+        case AArch64::SQSHLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLd\n");
+            break;
+        }
+        case AArch64::SQSHLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLh\n");
+            break;
+        }
+        case AArch64::SQSHLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLs\n");
+            break;
+        }
+        case AArch64::SQSHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv16i8\n");
+            break;
+        }
+        case AArch64::SQSHLv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv16i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHLv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv1i16\n");
+            break;
+        }
+        case AArch64::SQSHLv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv1i32\n");
+            break;
+        }
+        case AArch64::SQSHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv1i64\n");
+            break;
+        }
+        case AArch64::SQSHLv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv1i8\n");
+            break;
+        }
+        case AArch64::SQSHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv2i32\n");
+            break;
+        }
+        case AArch64::SQSHLv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv2i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv2i64\n");
+            break;
+        }
+        case AArch64::SQSHLv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv2i64_shift\n");
+            break;
+        }
+        case AArch64::SQSHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv4i16\n");
+            break;
+        }
+        case AArch64::SQSHLv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv4i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv4i32\n");
+            break;
+        }
+        case AArch64::SQSHLv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv4i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv8i16\n");
+            break;
+        }
+        case AArch64::SQSHLv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv8i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv8i8\n");
+            break;
+        }
+        case AArch64::SQSHLv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHLv8i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHRNb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNb\n");
+            break;
+        }
+        case AArch64::SQSHRNh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNh\n");
+            break;
+        }
+        case AArch64::SQSHRNs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNs\n");
+            break;
+        }
+        case AArch64::SQSHRNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNv16i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHRNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNv2i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHRNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNv4i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHRNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNv4i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHRNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNv8i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHRNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRNv8i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHRUNb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNb\n");
+            break;
+        }
+        case AArch64::SQSHRUNh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNh\n");
+            break;
+        }
+        case AArch64::SQSHRUNs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNs\n");
+            break;
+        }
+        case AArch64::SQSHRUNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNv16i8_shift\n");
+            break;
+        }
+        case AArch64::SQSHRUNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNv2i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHRUNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNv4i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHRUNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNv4i32_shift\n");
+            break;
+        }
+        case AArch64::SQSHRUNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNv8i16_shift\n");
+            break;
+        }
+        case AArch64::SQSHRUNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSHRUNv8i8_shift\n");
+            break;
+        }
+        case AArch64::SQSUBv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv16i8\n");
+            break;
+        }
+        case AArch64::SQSUBv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv1i16\n");
+            break;
+        }
+        case AArch64::SQSUBv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv1i32\n");
+            break;
+        }
+        case AArch64::SQSUBv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv1i64\n");
+            break;
+        }
+        case AArch64::SQSUBv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv1i8\n");
+            break;
+        }
+        case AArch64::SQSUBv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv2i32\n");
+            break;
+        }
+        case AArch64::SQSUBv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv2i64\n");
+            break;
+        }
+        case AArch64::SQSUBv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv4i16\n");
+            break;
+        }
+        case AArch64::SQSUBv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv4i32\n");
+            break;
+        }
+        case AArch64::SQSUBv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv8i16\n");
+            break;
+        }
+        case AArch64::SQSUBv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQSUBv8i8\n");
+            break;
+        }
+        case AArch64::SQXTNv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv16i8\n");
+            break;
+        }
+        case AArch64::SQXTNv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv1i16\n");
+            break;
+        }
+        case AArch64::SQXTNv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv1i32\n");
+            break;
+        }
+        case AArch64::SQXTNv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv1i8\n");
+            break;
+        }
+        case AArch64::SQXTNv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv2i32\n");
+            break;
+        }
+        case AArch64::SQXTNv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv4i16\n");
+            break;
+        }
+        case AArch64::SQXTNv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv4i32\n");
+            break;
+        }
+        case AArch64::SQXTNv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv8i16\n");
+            break;
+        }
+        case AArch64::SQXTNv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTNv8i8\n");
+            break;
+        }
+        case AArch64::SQXTUNv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv16i8\n");
+            break;
+        }
+        case AArch64::SQXTUNv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv1i16\n");
+            break;
+        }
+        case AArch64::SQXTUNv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv1i32\n");
+            break;
+        }
+        case AArch64::SQXTUNv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv1i8\n");
+            break;
+        }
+        case AArch64::SQXTUNv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv2i32\n");
+            break;
+        }
+        case AArch64::SQXTUNv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv4i16\n");
+            break;
+        }
+        case AArch64::SQXTUNv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv4i32\n");
+            break;
+        }
+        case AArch64::SQXTUNv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv8i16\n");
+            break;
+        }
+        case AArch64::SQXTUNv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SQXTUNv8i8\n");
+            break;
+        }
+        case AArch64::SRHADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRHADDv16i8\n");
+            break;
+        }
+        case AArch64::SRHADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRHADDv2i32\n");
+            break;
+        }
+        case AArch64::SRHADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRHADDv4i16\n");
+            break;
+        }
+        case AArch64::SRHADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRHADDv4i32\n");
+            break;
+        }
+        case AArch64::SRHADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRHADDv8i16\n");
+            break;
+        }
+        case AArch64::SRHADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRHADDv8i8\n");
+            break;
+        }
+        case AArch64::SRId: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRId\n");
+            break;
+        }
+        case AArch64::SRIv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRIv16i8_shift\n");
+            break;
+        }
+        case AArch64::SRIv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRIv2i32_shift\n");
+            break;
+        }
+        case AArch64::SRIv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRIv2i64_shift\n");
+            break;
+        }
+        case AArch64::SRIv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRIv4i16_shift\n");
+            break;
+        }
+        case AArch64::SRIv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRIv4i32_shift\n");
+            break;
+        }
+        case AArch64::SRIv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRIv8i16_shift\n");
+            break;
+        }
+        case AArch64::SRIv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRIv8i8_shift\n");
+            break;
+        }
+        case AArch64::SRSHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv16i8\n");
+            break;
+        }
+        case AArch64::SRSHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv1i64\n");
+            break;
+        }
+        case AArch64::SRSHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv2i32\n");
+            break;
+        }
+        case AArch64::SRSHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv2i64\n");
+            break;
+        }
+        case AArch64::SRSHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv4i16\n");
+            break;
+        }
+        case AArch64::SRSHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv4i32\n");
+            break;
+        }
+        case AArch64::SRSHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv8i16\n");
+            break;
+        }
+        case AArch64::SRSHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHLv8i8\n");
+            break;
+        }
+        case AArch64::SRSHRd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRd\n");
+            break;
+        }
+        case AArch64::SRSHRv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRv16i8_shift\n");
+            break;
+        }
+        case AArch64::SRSHRv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRv2i32_shift\n");
+            break;
+        }
+        case AArch64::SRSHRv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRv2i64_shift\n");
+            break;
+        }
+        case AArch64::SRSHRv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRv4i16_shift\n");
+            break;
+        }
+        case AArch64::SRSHRv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRv4i32_shift\n");
+            break;
+        }
+        case AArch64::SRSHRv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRv8i16_shift\n");
+            break;
+        }
+        case AArch64::SRSHRv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSHRv8i8_shift\n");
+            break;
+        }
+        case AArch64::SRSRAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAd\n");
+            break;
+        }
+        case AArch64::SRSRAv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAv16i8_shift\n");
+            break;
+        }
+        case AArch64::SRSRAv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAv2i32_shift\n");
+            break;
+        }
+        case AArch64::SRSRAv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAv2i64_shift\n");
+            break;
+        }
+        case AArch64::SRSRAv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAv4i16_shift\n");
+            break;
+        }
+        case AArch64::SRSRAv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAv4i32_shift\n");
+            break;
+        }
+        case AArch64::SRSRAv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAv8i16_shift\n");
+            break;
+        }
+        case AArch64::SRSRAv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SRSRAv8i8_shift\n");
+            break;
+        }
+        case AArch64::SSHLLv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLLv16i8_shift\n");
+            break;
+        }
+        case AArch64::SSHLLv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLLv2i32_shift\n");
+            break;
+        }
+        case AArch64::SSHLLv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLLv4i16_shift\n");
+            break;
+        }
+        case AArch64::SSHLLv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLLv4i32_shift\n");
+            break;
+        }
+        case AArch64::SSHLLv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLLv8i16_shift\n");
+            break;
+        }
+        case AArch64::SSHLLv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLLv8i8_shift\n");
+            break;
+        }
+        case AArch64::SSHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv16i8\n");
+            break;
+        }
+        case AArch64::SSHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv1i64\n");
+            break;
+        }
+        case AArch64::SSHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv2i32\n");
+            break;
+        }
+        case AArch64::SSHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv2i64\n");
+            break;
+        }
+        case AArch64::SSHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv4i16\n");
+            break;
+        }
+        case AArch64::SSHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv4i32\n");
+            break;
+        }
+        case AArch64::SSHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv8i16\n");
+            break;
+        }
+        case AArch64::SSHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHLv8i8\n");
+            break;
+        }
+        case AArch64::SSHRd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRd\n");
+            break;
+        }
+        case AArch64::SSHRv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRv16i8_shift\n");
+            break;
+        }
+        case AArch64::SSHRv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRv2i32_shift\n");
+            break;
+        }
+        case AArch64::SSHRv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRv2i64_shift\n");
+            break;
+        }
+        case AArch64::SSHRv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRv4i16_shift\n");
+            break;
+        }
+        case AArch64::SSHRv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRv4i32_shift\n");
+            break;
+        }
+        case AArch64::SSHRv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRv8i16_shift\n");
+            break;
+        }
+        case AArch64::SSHRv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSHRv8i8_shift\n");
+            break;
+        }
+        case AArch64::SSRAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAd\n");
+            break;
+        }
+        case AArch64::SSRAv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAv16i8_shift\n");
+            break;
+        }
+        case AArch64::SSRAv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAv2i32_shift\n");
+            break;
+        }
+        case AArch64::SSRAv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAv2i64_shift\n");
+            break;
+        }
+        case AArch64::SSRAv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAv4i16_shift\n");
+            break;
+        }
+        case AArch64::SSRAv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAv4i32_shift\n");
+            break;
+        }
+        case AArch64::SSRAv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAv8i16_shift\n");
+            break;
+        }
+        case AArch64::SSRAv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSRAv8i8_shift\n");
+            break;
+        }
+        case AArch64::SSUBLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SSUBLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SSUBLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SSUBLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SSUBLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SSUBLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::SSUBWv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBWv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::SSUBWv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBWv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::SSUBWv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBWv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::SSUBWv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBWv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::SSUBWv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBWv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::SSUBWv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SSUBWv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::ST1Fourv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv16b\n");
+            break;
+        }
+        case AArch64::ST1Fourv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv16b_POST\n");
+            break;
+        }
+        case AArch64::ST1Fourv1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv1d\n");
+            break;
+        }
+        case AArch64::ST1Fourv1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv1d_POST\n");
+            break;
+        }
+        case AArch64::ST1Fourv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv2d\n");
+            break;
+        }
+        case AArch64::ST1Fourv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv2d_POST\n");
+            break;
+        }
+        case AArch64::ST1Fourv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv2s\n");
+            break;
+        }
+        case AArch64::ST1Fourv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv2s_POST\n");
+            break;
+        }
+        case AArch64::ST1Fourv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv4h\n");
+            break;
+        }
+        case AArch64::ST1Fourv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv4h_POST\n");
+            break;
+        }
+        case AArch64::ST1Fourv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv4s\n");
+            break;
+        }
+        case AArch64::ST1Fourv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv4s_POST\n");
+            break;
+        }
+        case AArch64::ST1Fourv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv8b\n");
+            break;
+        }
+        case AArch64::ST1Fourv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv8b_POST\n");
+            break;
+        }
+        case AArch64::ST1Fourv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv8h\n");
+            break;
+        }
+        case AArch64::ST1Fourv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Fourv8h_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev16b\n");
+            break;
+        }
+        case AArch64::ST1Onev16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev16b_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev1d\n");
+            break;
+        }
+        case AArch64::ST1Onev1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev1d_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev2d\n");
+            break;
+        }
+        case AArch64::ST1Onev2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev2d_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev2s\n");
+            break;
+        }
+        case AArch64::ST1Onev2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev2s_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev4h\n");
+            break;
+        }
+        case AArch64::ST1Onev4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev4h_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev4s\n");
+            break;
+        }
+        case AArch64::ST1Onev4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev4s_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev8b\n");
+            break;
+        }
+        case AArch64::ST1Onev8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev8b_POST\n");
+            break;
+        }
+        case AArch64::ST1Onev8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev8h\n");
+            break;
+        }
+        case AArch64::ST1Onev8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Onev8h_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev16b\n");
+            break;
+        }
+        case AArch64::ST1Threev16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev16b_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev1d\n");
+            break;
+        }
+        case AArch64::ST1Threev1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev1d_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev2d\n");
+            break;
+        }
+        case AArch64::ST1Threev2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev2d_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev2s\n");
+            break;
+        }
+        case AArch64::ST1Threev2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev2s_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev4h\n");
+            break;
+        }
+        case AArch64::ST1Threev4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev4h_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev4s\n");
+            break;
+        }
+        case AArch64::ST1Threev4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev4s_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev8b\n");
+            break;
+        }
+        case AArch64::ST1Threev8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev8b_POST\n");
+            break;
+        }
+        case AArch64::ST1Threev8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev8h\n");
+            break;
+        }
+        case AArch64::ST1Threev8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Threev8h_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov16b\n");
+            break;
+        }
+        case AArch64::ST1Twov16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov16b_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov1d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov1d\n");
+            break;
+        }
+        case AArch64::ST1Twov1d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov1d_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov2d\n");
+            break;
+        }
+        case AArch64::ST1Twov2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov2d_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov2s\n");
+            break;
+        }
+        case AArch64::ST1Twov2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov2s_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov4h\n");
+            break;
+        }
+        case AArch64::ST1Twov4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov4h_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov4s\n");
+            break;
+        }
+        case AArch64::ST1Twov4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov4s_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov8b\n");
+            break;
+        }
+        case AArch64::ST1Twov8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov8b_POST\n");
+            break;
+        }
+        case AArch64::ST1Twov8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov8h\n");
+            break;
+        }
+        case AArch64::ST1Twov8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1Twov8h_POST\n");
+            break;
+        }
+        case AArch64::ST1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i16\n");
+            break;
+        }
+        case AArch64::ST1i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i16_POST\n");
+            break;
+        }
+        case AArch64::ST1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i32\n");
+            break;
+        }
+        case AArch64::ST1i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i32_POST\n");
+            break;
+        }
+        case AArch64::ST1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i64\n");
+            break;
+        }
+        case AArch64::ST1i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i64_POST\n");
+            break;
+        }
+        case AArch64::ST1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i8\n");
+            break;
+        }
+        case AArch64::ST1i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST1i8_POST\n");
+            break;
+        }
+        case AArch64::ST2Twov16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov16b\n");
+            break;
+        }
+        case AArch64::ST2Twov16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov16b_POST\n");
+            break;
+        }
+        case AArch64::ST2Twov2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov2d\n");
+            break;
+        }
+        case AArch64::ST2Twov2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov2d_POST\n");
+            break;
+        }
+        case AArch64::ST2Twov2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov2s\n");
+            break;
+        }
+        case AArch64::ST2Twov2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov2s_POST\n");
+            break;
+        }
+        case AArch64::ST2Twov4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov4h\n");
+            break;
+        }
+        case AArch64::ST2Twov4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov4h_POST\n");
+            break;
+        }
+        case AArch64::ST2Twov4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov4s\n");
+            break;
+        }
+        case AArch64::ST2Twov4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov4s_POST\n");
+            break;
+        }
+        case AArch64::ST2Twov8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov8b\n");
+            break;
+        }
+        case AArch64::ST2Twov8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov8b_POST\n");
+            break;
+        }
+        case AArch64::ST2Twov8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov8h\n");
+            break;
+        }
+        case AArch64::ST2Twov8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2Twov8h_POST\n");
+            break;
+        }
+        case AArch64::ST2i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i16\n");
+            break;
+        }
+        case AArch64::ST2i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i16_POST\n");
+            break;
+        }
+        case AArch64::ST2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i32\n");
+            break;
+        }
+        case AArch64::ST2i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i32_POST\n");
+            break;
+        }
+        case AArch64::ST2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i64\n");
+            break;
+        }
+        case AArch64::ST2i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i64_POST\n");
+            break;
+        }
+        case AArch64::ST2i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i8\n");
+            break;
+        }
+        case AArch64::ST2i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST2i8_POST\n");
+            break;
+        }
+        case AArch64::ST3Threev16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev16b\n");
+            break;
+        }
+        case AArch64::ST3Threev16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev16b_POST\n");
+            break;
+        }
+        case AArch64::ST3Threev2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev2d\n");
+            break;
+        }
+        case AArch64::ST3Threev2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev2d_POST\n");
+            break;
+        }
+        case AArch64::ST3Threev2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev2s\n");
+            break;
+        }
+        case AArch64::ST3Threev2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev2s_POST\n");
+            break;
+        }
+        case AArch64::ST3Threev4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev4h\n");
+            break;
+        }
+        case AArch64::ST3Threev4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev4h_POST\n");
+            break;
+        }
+        case AArch64::ST3Threev4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev4s\n");
+            break;
+        }
+        case AArch64::ST3Threev4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev4s_POST\n");
+            break;
+        }
+        case AArch64::ST3Threev8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev8b\n");
+            break;
+        }
+        case AArch64::ST3Threev8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev8b_POST\n");
+            break;
+        }
+        case AArch64::ST3Threev8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev8h\n");
+            break;
+        }
+        case AArch64::ST3Threev8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3Threev8h_POST\n");
+            break;
+        }
+        case AArch64::ST3i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i16\n");
+            break;
+        }
+        case AArch64::ST3i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i16_POST\n");
+            break;
+        }
+        case AArch64::ST3i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i32\n");
+            break;
+        }
+        case AArch64::ST3i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i32_POST\n");
+            break;
+        }
+        case AArch64::ST3i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i64\n");
+            break;
+        }
+        case AArch64::ST3i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i64_POST\n");
+            break;
+        }
+        case AArch64::ST3i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i8\n");
+            break;
+        }
+        case AArch64::ST3i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST3i8_POST\n");
+            break;
+        }
+        case AArch64::ST4Fourv16b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv16b\n");
+            break;
+        }
+        case AArch64::ST4Fourv16b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv16b_POST\n");
+            break;
+        }
+        case AArch64::ST4Fourv2d: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv2d\n");
+            break;
+        }
+        case AArch64::ST4Fourv2d_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv2d_POST\n");
+            break;
+        }
+        case AArch64::ST4Fourv2s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv2s\n");
+            break;
+        }
+        case AArch64::ST4Fourv2s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv2s_POST\n");
+            break;
+        }
+        case AArch64::ST4Fourv4h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv4h\n");
+            break;
+        }
+        case AArch64::ST4Fourv4h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv4h_POST\n");
+            break;
+        }
+        case AArch64::ST4Fourv4s: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv4s\n");
+            break;
+        }
+        case AArch64::ST4Fourv4s_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv4s_POST\n");
+            break;
+        }
+        case AArch64::ST4Fourv8b: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv8b\n");
+            break;
+        }
+        case AArch64::ST4Fourv8b_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv8b_POST\n");
+            break;
+        }
+        case AArch64::ST4Fourv8h: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv8h\n");
+            break;
+        }
+        case AArch64::ST4Fourv8h_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4Fourv8h_POST\n");
+            break;
+        }
+        case AArch64::ST4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i16\n");
+            break;
+        }
+        case AArch64::ST4i16_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i16_POST\n");
+            break;
+        }
+        case AArch64::ST4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i32\n");
+            break;
+        }
+        case AArch64::ST4i32_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i32_POST\n");
+            break;
+        }
+        case AArch64::ST4i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i64\n");
+            break;
+        }
+        case AArch64::ST4i64_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i64_POST\n");
+            break;
+        }
+        case AArch64::ST4i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i8\n");
+            break;
+        }
+        case AArch64::ST4i8_POST: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ST4i8_POST\n");
+            break;
+        }
+        case AArch64::STLLRB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLLRB\n");
+            break;
+        }
+        case AArch64::STLLRH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLLRH\n");
+            break;
+        }
+        case AArch64::STLLRW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLLRW\n");
+            break;
+        }
+        case AArch64::STLLRX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLLRX\n");
+            break;
+        }
+        case AArch64::STLRB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLRB\n");
+            break;
+        }
+        case AArch64::STLRH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLRH\n");
+            break;
+        }
+        case AArch64::STLRW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLRW\n");
+            break;
+        }
+        case AArch64::STLRX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLRX\n");
+            break;
+        }
+        case AArch64::STLXPW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLXPW\n");
+            break;
+        }
+        case AArch64::STLXPX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLXPX\n");
+            break;
+        }
+        case AArch64::STLXRB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLXRB\n");
+            break;
+        }
+        case AArch64::STLXRH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLXRH\n");
+            break;
+        }
+        case AArch64::STLXRW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLXRW\n");
+            break;
+        }
+        case AArch64::STLXRX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STLXRX\n");
+            break;
+        }
+        case AArch64::STNPDi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STNPDi\n");
+            break;
+        }
+        case AArch64::STNPQi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STNPQi\n");
+            break;
+        }
+        case AArch64::STNPSi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STNPSi\n");
+            break;
+        }
+        case AArch64::STNPWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STNPWi\n");
+            break;
+        }
+        case AArch64::STNPXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STNPXi\n");
+            break;
+        }
+        case AArch64::STPDi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPDi\n");
+            break;
+        }
+        case AArch64::STPDpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPDpost\n");
+            break;
+        }
+        case AArch64::STPDpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPDpre\n");
+            break;
+        }
+        case AArch64::STPQi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPQi\n");
+            break;
+        }
+        case AArch64::STPQpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPQpost\n");
+            break;
+        }
+        case AArch64::STPQpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPQpre\n");
+            break;
+        }
+        case AArch64::STPSi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPSi\n");
+            break;
+        }
+        case AArch64::STPSpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPSpost\n");
+            break;
+        }
+        case AArch64::STPSpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPSpre\n");
+            break;
+        }
+        case AArch64::STPWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPWi\n");
+            break;
+        }
+        case AArch64::STPWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPWpost\n");
+            break;
+        }
+        case AArch64::STPWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPWpre\n");
+            break;
+        }
+        case AArch64::STPXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPXi\n");
+            break;
+        }
+        case AArch64::STPXpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPXpost\n");
+            break;
+        }
+        case AArch64::STPXpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STPXpre\n");
+            break;
+        }
+        case AArch64::STRBBpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBBpost\n");
+            break;
+        }
+        case AArch64::STRBBpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBBpre\n");
+            break;
+        }
+        case AArch64::STRBBroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBBroW\n");
+            break;
+        }
+        case AArch64::STRBBroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBBroX\n");
+            break;
+        }
+        case AArch64::STRBBui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBBui\n");
+            break;
+        }
+        case AArch64::STRBpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBpost\n");
+            break;
+        }
+        case AArch64::STRBpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBpre\n");
+            break;
+        }
+        case AArch64::STRBroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBroW\n");
+            break;
+        }
+        case AArch64::STRBroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBroX\n");
+            break;
+        }
+        case AArch64::STRBui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRBui\n");
+            break;
+        }
+        case AArch64::STRDpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRDpost\n");
+            break;
+        }
+        case AArch64::STRDpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRDpre\n");
+            break;
+        }
+        case AArch64::STRDroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRDroW\n");
+            break;
+        }
+        case AArch64::STRDroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRDroX\n");
+            break;
+        }
+        case AArch64::STRDui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRDui\n");
+            break;
+        }
+        case AArch64::STRHHpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHHpost\n");
+            break;
+        }
+        case AArch64::STRHHpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHHpre\n");
+            break;
+        }
+        case AArch64::STRHHroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHHroW\n");
+            break;
+        }
+        case AArch64::STRHHroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHHroX\n");
+            break;
+        }
+        case AArch64::STRHHui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHHui\n");
+            break;
+        }
+        case AArch64::STRHpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHpost\n");
+            break;
+        }
+        case AArch64::STRHpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHpre\n");
+            break;
+        }
+        case AArch64::STRHroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHroW\n");
+            break;
+        }
+        case AArch64::STRHroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHroX\n");
+            break;
+        }
+        case AArch64::STRHui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRHui\n");
+            break;
+        }
+        case AArch64::STRQpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRQpost\n");
+            break;
+        }
+        case AArch64::STRQpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRQpre\n");
+            break;
+        }
+        case AArch64::STRQroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRQroW\n");
+            break;
+        }
+        case AArch64::STRQroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRQroX\n");
+            break;
+        }
+        case AArch64::STRQui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRQui\n");
+            break;
+        }
+        case AArch64::STRSpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRSpost\n");
+            break;
+        }
+        case AArch64::STRSpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRSpre\n");
+            break;
+        }
+        case AArch64::STRSroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRSroW\n");
+            break;
+        }
+        case AArch64::STRSroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRSroX\n");
+            break;
+        }
+        case AArch64::STRSui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRSui\n");
+            break;
+        }
+        case AArch64::STRWpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRWpost\n");
+            break;
+        }
+        case AArch64::STRWpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRWpre\n");
+            break;
+        }
+        case AArch64::STRWroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRWroW\n");
+            break;
+        }
+        case AArch64::STRWroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRWroX\n");
+            break;
+        }
+        case AArch64::STRWui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRWui\n");
+            break;
+        }
+        case AArch64::STRXpost: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRXpost\n");
+            break;
+        }
+        case AArch64::STRXpre: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRXpre\n");
+            break;
+        }
+        case AArch64::STRXroW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRXroW\n");
+            break;
+        }
+        case AArch64::STRXroX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRXroX\n");
+            break;
+        }
+        case AArch64::STRXui: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STRXui\n");
+            break;
+        }
+        case AArch64::STTRBi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STTRBi\n");
+            break;
+        }
+        case AArch64::STTRHi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STTRHi\n");
+            break;
+        }
+        case AArch64::STTRWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STTRWi\n");
+            break;
+        }
+        case AArch64::STTRXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STTRXi\n");
+            break;
+        }
+        case AArch64::STURBBi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURBBi\n");
+            break;
+        }
+        case AArch64::STURBi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURBi\n");
+            break;
+        }
+        case AArch64::STURDi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURDi\n");
+            break;
+        }
+        case AArch64::STURHHi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURHHi\n");
+            break;
+        }
+        case AArch64::STURHi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURHi\n");
+            break;
+        }
+        case AArch64::STURQi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURQi\n");
+            break;
+        }
+        case AArch64::STURSi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURSi\n");
+            break;
+        }
+        case AArch64::STURWi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURWi\n");
+            break;
+        }
+        case AArch64::STURXi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STURXi\n");
+            break;
+        }
+        case AArch64::STXPW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STXPW\n");
+            break;
+        }
+        case AArch64::STXPX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STXPX\n");
+            break;
+        }
+        case AArch64::STXRB: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STXRB\n");
+            break;
+        }
+        case AArch64::STXRH: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STXRH\n");
+            break;
+        }
+        case AArch64::STXRW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STXRW\n");
+            break;
+        }
+        case AArch64::STXRX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " STXRX\n");
+            break;
+        }
+        case AArch64::SUBHNv2i64_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBHNv2i64_v2i32\n");
+            break;
+        }
+        case AArch64::SUBHNv2i64_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBHNv2i64_v4i32\n");
+            break;
+        }
+        case AArch64::SUBHNv4i32_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBHNv4i32_v4i16\n");
+            break;
+        }
+        case AArch64::SUBHNv4i32_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBHNv4i32_v8i16\n");
+            break;
+        }
+        case AArch64::SUBHNv8i16_v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBHNv8i16_v16i8\n");
+            break;
+        }
+        case AArch64::SUBHNv8i16_v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBHNv8i16_v8i8\n");
+            break;
+        }
+        case AArch64::SUBSWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSWri\n");
+            break;
+        }
+        case AArch64::SUBSWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSWrr\n");
+            break;
+        }
+        case AArch64::SUBSWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSWrs\n");
+            break;
+        }
+        case AArch64::SUBSWrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSWrx\n");
+            break;
+        }
+        case AArch64::SUBSXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSXri\n");
+            break;
+        }
+        case AArch64::SUBSXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSXrr\n");
+            break;
+        }
+        case AArch64::SUBSXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSXrs\n");
+            break;
+        }
+        case AArch64::SUBSXrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSXrx\n");
+            break;
+        }
+        case AArch64::SUBSXrx64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBSXrx64\n");
+            break;
+        }
+        case AArch64::SUBWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBWri\n");
+            break;
+        }
+        case AArch64::SUBWrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBWrr\n");
+            break;
+        }
+        case AArch64::SUBWrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBWrs\n");
+            break;
+        }
+        case AArch64::SUBWrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBWrx\n");
+            break;
+        }
+        case AArch64::SUBXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBXri\n");
+            break;
+        }
+        case AArch64::SUBXrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBXrr\n");
+            break;
+        }
+        case AArch64::SUBXrs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBXrs\n");
+            break;
+        }
+        case AArch64::SUBXrx: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBXrx\n");
+            break;
+        }
+        case AArch64::SUBXrx64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBXrx64\n");
+            break;
+        }
+        case AArch64::SUBv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv16i8\n");
+            break;
+        }
+        case AArch64::SUBv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv1i64\n");
+            break;
+        }
+        case AArch64::SUBv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv2i32\n");
+            break;
+        }
+        case AArch64::SUBv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv2i64\n");
+            break;
+        }
+        case AArch64::SUBv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv4i16\n");
+            break;
+        }
+        case AArch64::SUBv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv4i32\n");
+            break;
+        }
+        case AArch64::SUBv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv8i16\n");
+            break;
+        }
+        case AArch64::SUBv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUBv8i8\n");
+            break;
+        }
+        case AArch64::SUQADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv16i8\n");
+            break;
+        }
+        case AArch64::SUQADDv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv1i16\n");
+            break;
+        }
+        case AArch64::SUQADDv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv1i32\n");
+            break;
+        }
+        case AArch64::SUQADDv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv1i64\n");
+            break;
+        }
+        case AArch64::SUQADDv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv1i8\n");
+            break;
+        }
+        case AArch64::SUQADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv2i32\n");
+            break;
+        }
+        case AArch64::SUQADDv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv2i64\n");
+            break;
+        }
+        case AArch64::SUQADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv4i16\n");
+            break;
+        }
+        case AArch64::SUQADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv4i32\n");
+            break;
+        }
+        case AArch64::SUQADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv8i16\n");
+            break;
+        }
+        case AArch64::SUQADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SUQADDv8i8\n");
+            break;
+        }
+        case AArch64::SVC: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SVC\n");
+            break;
+        }
+        case AArch64::SWPALb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPALb\n");
+            break;
+        }
+        case AArch64::SWPALd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPALd\n");
+            break;
+        }
+        case AArch64::SWPALh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPALh\n");
+            break;
+        }
+        case AArch64::SWPALs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPALs\n");
+            break;
+        }
+        case AArch64::SWPAb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPAb\n");
+            break;
+        }
+        case AArch64::SWPAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPAd\n");
+            break;
+        }
+        case AArch64::SWPAh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPAh\n");
+            break;
+        }
+        case AArch64::SWPAs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPAs\n");
+            break;
+        }
+        case AArch64::SWPLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPLb\n");
+            break;
+        }
+        case AArch64::SWPLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPLd\n");
+            break;
+        }
+        case AArch64::SWPLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPLh\n");
+            break;
+        }
+        case AArch64::SWPLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPLs\n");
+            break;
+        }
+        case AArch64::SWPb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPb\n");
+            break;
+        }
+        case AArch64::SWPd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPd\n");
+            break;
+        }
+        case AArch64::SWPh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPh\n");
+            break;
+        }
+        case AArch64::SWPs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SWPs\n");
+            break;
+        }
+        case AArch64::SYSLxt: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SYSLxt\n");
+            break;
+        }
+        case AArch64::SYSxt: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " SYSxt\n");
+            break;
+        }
+        case AArch64::TBLv16i8Four: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv16i8Four\n");
+            break;
+        }
+        case AArch64::TBLv16i8One: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv16i8One\n");
+            break;
+        }
+        case AArch64::TBLv16i8Three: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv16i8Three\n");
+            break;
+        }
+        case AArch64::TBLv16i8Two: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv16i8Two\n");
+            break;
+        }
+        case AArch64::TBLv8i8Four: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv8i8Four\n");
+            break;
+        }
+        case AArch64::TBLv8i8One: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv8i8One\n");
+            break;
+        }
+        case AArch64::TBLv8i8Three: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv8i8Three\n");
+            break;
+        }
+        case AArch64::TBLv8i8Two: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBLv8i8Two\n");
+            break;
+        }
+        case AArch64::TBNZW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBNZW\n");
+            break;
+        }
+        case AArch64::TBNZX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBNZX\n");
+            break;
+        }
+        case AArch64::TBXv16i8Four: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv16i8Four\n");
+            break;
+        }
+        case AArch64::TBXv16i8One: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv16i8One\n");
+            break;
+        }
+        case AArch64::TBXv16i8Three: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv16i8Three\n");
+            break;
+        }
+        case AArch64::TBXv16i8Two: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv16i8Two\n");
+            break;
+        }
+        case AArch64::TBXv8i8Four: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv8i8Four\n");
+            break;
+        }
+        case AArch64::TBXv8i8One: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv8i8One\n");
+            break;
+        }
+        case AArch64::TBXv8i8Three: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv8i8Three\n");
+            break;
+        }
+        case AArch64::TBXv8i8Two: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBXv8i8Two\n");
+            break;
+        }
+        case AArch64::TBZW: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBZW\n");
+            break;
+        }
+        case AArch64::TBZX: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TBZX\n");
+            break;
+        }
+        case AArch64::TCRETURNdi: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TCRETURNdi\n");
+            break;
+        }
+        case AArch64::TCRETURNri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TCRETURNri\n");
+            break;
+        }
+        case AArch64::TLSDESCCALL: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TLSDESCCALL\n");
+            break;
+        }
+        case AArch64::TLSDESC_CALLSEQ: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TLSDESC_CALLSEQ\n");
+            break;
+        }
+        case AArch64::TRN1v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN1v16i8\n");
+            break;
+        }
+        case AArch64::TRN1v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN1v2i32\n");
+            break;
+        }
+        case AArch64::TRN1v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN1v2i64\n");
+            break;
+        }
+        case AArch64::TRN1v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN1v4i16\n");
+            break;
+        }
+        case AArch64::TRN1v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN1v4i32\n");
+            break;
+        }
+        case AArch64::TRN1v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN1v8i16\n");
+            break;
+        }
+        case AArch64::TRN1v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN1v8i8\n");
+            break;
+        }
+        case AArch64::TRN2v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN2v16i8\n");
+            break;
+        }
+        case AArch64::TRN2v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN2v2i32\n");
+            break;
+        }
+        case AArch64::TRN2v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN2v2i64\n");
+            break;
+        }
+        case AArch64::TRN2v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN2v4i16\n");
+            break;
+        }
+        case AArch64::TRN2v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN2v4i32\n");
+            break;
+        }
+        case AArch64::TRN2v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN2v8i16\n");
+            break;
+        }
+        case AArch64::TRN2v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " TRN2v8i8\n");
+            break;
+        }
+        case AArch64::UABALv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABALv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UABALv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABALv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::UABALv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABALv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::UABALv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABALv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UABALv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABALv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UABALv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABALv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UABAv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABAv16i8\n");
+            break;
+        }
+        case AArch64::UABAv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABAv2i32\n");
+            break;
+        }
+        case AArch64::UABAv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABAv4i16\n");
+            break;
+        }
+        case AArch64::UABAv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABAv4i32\n");
+            break;
+        }
+        case AArch64::UABAv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABAv8i16\n");
+            break;
+        }
+        case AArch64::UABAv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABAv8i8\n");
+            break;
+        }
+        case AArch64::UABDLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UABDLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::UABDLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::UABDLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UABDLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UABDLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UABDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDv16i8\n");
+            break;
+        }
+        case AArch64::UABDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDv2i32\n");
+            break;
+        }
+        case AArch64::UABDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDv4i16\n");
+            break;
+        }
+        case AArch64::UABDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDv4i32\n");
+            break;
+        }
+        case AArch64::UABDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDv8i16\n");
+            break;
+        }
+        case AArch64::UABDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UABDv8i8\n");
+            break;
+        }
+        case AArch64::UADALPv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADALPv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UADALPv2i32_v1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADALPv2i32_v1i64\n");
+            break;
+        }
+        case AArch64::UADALPv4i16_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADALPv4i16_v2i32\n");
+            break;
+        }
+        case AArch64::UADALPv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADALPv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UADALPv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADALPv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UADALPv8i8_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADALPv8i8_v4i16\n");
+            break;
+        }
+        case AArch64::UADDLPv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLPv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UADDLPv2i32_v1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLPv2i32_v1i64\n");
+            break;
+        }
+        case AArch64::UADDLPv4i16_v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLPv4i16_v2i32\n");
+            break;
+        }
+        case AArch64::UADDLPv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLPv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UADDLPv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLPv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UADDLPv8i8_v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLPv8i8_v4i16\n");
+            break;
+        }
+        case AArch64::UADDLVv16i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLVv16i8v\n");
+            break;
+        }
+        case AArch64::UADDLVv4i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLVv4i16v\n");
+            break;
+        }
+        case AArch64::UADDLVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLVv4i32v\n");
+            break;
+        }
+        case AArch64::UADDLVv8i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLVv8i16v\n");
+            break;
+        }
+        case AArch64::UADDLVv8i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLVv8i8v\n");
+            break;
+        }
+        case AArch64::UADDLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UADDLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::UADDLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::UADDLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UADDLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UADDLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UADDWv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDWv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UADDWv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDWv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::UADDWv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDWv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::UADDWv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDWv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UADDWv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDWv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UADDWv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UADDWv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UBFMWri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UBFMWri\n");
+            break;
+        }
+        case AArch64::UBFMXri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UBFMXri\n");
+            break;
+        }
+        case AArch64::UCVTFSWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFSWDri\n");
+            break;
+        }
+        case AArch64::UCVTFSWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFSWSri\n");
+            break;
+        }
+        case AArch64::UCVTFSXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFSXDri\n");
+            break;
+        }
+        case AArch64::UCVTFSXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFSXSri\n");
+            break;
+        }
+        case AArch64::UCVTFUWDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFUWDri\n");
+            break;
+        }
+        case AArch64::UCVTFUWSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFUWSri\n");
+            break;
+        }
+        case AArch64::UCVTFUXDri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFUXDri\n");
+            break;
+        }
+        case AArch64::UCVTFUXSri: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFUXSri\n");
+            break;
+        }
+        case AArch64::UCVTFd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFd\n");
+            break;
+        }
+        case AArch64::UCVTFs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFs\n");
+            break;
+        }
+        case AArch64::UCVTFv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv1i32\n");
+            break;
+        }
+        case AArch64::UCVTFv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv1i64\n");
+            break;
+        }
+        case AArch64::UCVTFv2f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv2f32\n");
+            break;
+        }
+        case AArch64::UCVTFv2f64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv2f64\n");
+            break;
+        }
+        case AArch64::UCVTFv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv2i32_shift\n");
+            break;
+        }
+        case AArch64::UCVTFv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv2i64_shift\n");
+            break;
+        }
+        case AArch64::UCVTFv4f32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv4f32\n");
+            break;
+        }
+        case AArch64::UCVTFv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UCVTFv4i32_shift\n");
+            break;
+        }
+        case AArch64::UDIVWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UDIVWr\n");
+            break;
+        }
+        case AArch64::UDIVXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UDIVXr\n");
+            break;
+        }
+        case AArch64::UDIV_IntWr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UDIV_IntWr\n");
+            break;
+        }
+        case AArch64::UDIV_IntXr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UDIV_IntXr\n");
+            break;
+        }
+        case AArch64::UHADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHADDv16i8\n");
+            break;
+        }
+        case AArch64::UHADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHADDv2i32\n");
+            break;
+        }
+        case AArch64::UHADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHADDv4i16\n");
+            break;
+        }
+        case AArch64::UHADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHADDv4i32\n");
+            break;
+        }
+        case AArch64::UHADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHADDv8i16\n");
+            break;
+        }
+        case AArch64::UHADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHADDv8i8\n");
+            break;
+        }
+        case AArch64::UHSUBv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHSUBv16i8\n");
+            break;
+        }
+        case AArch64::UHSUBv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHSUBv2i32\n");
+            break;
+        }
+        case AArch64::UHSUBv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHSUBv4i16\n");
+            break;
+        }
+        case AArch64::UHSUBv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHSUBv4i32\n");
+            break;
+        }
+        case AArch64::UHSUBv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHSUBv8i16\n");
+            break;
+        }
+        case AArch64::UHSUBv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UHSUBv8i8\n");
+            break;
+        }
+        case AArch64::UMADDLrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMADDLrrr\n");
+            break;
+        }
+        case AArch64::UMAXPv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXPv16i8\n");
+            break;
+        }
+        case AArch64::UMAXPv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXPv2i32\n");
+            break;
+        }
+        case AArch64::UMAXPv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXPv4i16\n");
+            break;
+        }
+        case AArch64::UMAXPv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXPv4i32\n");
+            break;
+        }
+        case AArch64::UMAXPv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXPv8i16\n");
+            break;
+        }
+        case AArch64::UMAXPv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXPv8i8\n");
+            break;
+        }
+        case AArch64::UMAXVv16i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXVv16i8v\n");
+            break;
+        }
+        case AArch64::UMAXVv4i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXVv4i16v\n");
+            break;
+        }
+        case AArch64::UMAXVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXVv4i32v\n");
+            break;
+        }
+        case AArch64::UMAXVv8i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXVv8i16v\n");
+            break;
+        }
+        case AArch64::UMAXVv8i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXVv8i8v\n");
+            break;
+        }
+        case AArch64::UMAXv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXv16i8\n");
+            break;
+        }
+        case AArch64::UMAXv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXv2i32\n");
+            break;
+        }
+        case AArch64::UMAXv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXv4i16\n");
+            break;
+        }
+        case AArch64::UMAXv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXv4i32\n");
+            break;
+        }
+        case AArch64::UMAXv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXv8i16\n");
+            break;
+        }
+        case AArch64::UMAXv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMAXv8i8\n");
+            break;
+        }
+        case AArch64::UMINPv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINPv16i8\n");
+            break;
+        }
+        case AArch64::UMINPv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINPv2i32\n");
+            break;
+        }
+        case AArch64::UMINPv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINPv4i16\n");
+            break;
+        }
+        case AArch64::UMINPv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINPv4i32\n");
+            break;
+        }
+        case AArch64::UMINPv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINPv8i16\n");
+            break;
+        }
+        case AArch64::UMINPv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINPv8i8\n");
+            break;
+        }
+        case AArch64::UMINVv16i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINVv16i8v\n");
+            break;
+        }
+        case AArch64::UMINVv4i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINVv4i16v\n");
+            break;
+        }
+        case AArch64::UMINVv4i32v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINVv4i32v\n");
+            break;
+        }
+        case AArch64::UMINVv8i16v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINVv8i16v\n");
+            break;
+        }
+        case AArch64::UMINVv8i8v: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINVv8i8v\n");
+            break;
+        }
+        case AArch64::UMINv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINv16i8\n");
+            break;
+        }
+        case AArch64::UMINv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINv2i32\n");
+            break;
+        }
+        case AArch64::UMINv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINv4i16\n");
+            break;
+        }
+        case AArch64::UMINv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINv4i32\n");
+            break;
+        }
+        case AArch64::UMINv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINv8i16\n");
+            break;
+        }
+        case AArch64::UMINv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMINv8i8\n");
+            break;
+        }
+        case AArch64::UMLALv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UMLALv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv2i32_indexed\n");
+            break;
+        }
+        case AArch64::UMLALv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::UMLALv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv4i16_indexed\n");
+            break;
+        }
+        case AArch64::UMLALv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::UMLALv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv4i32_indexed\n");
+            break;
+        }
+        case AArch64::UMLALv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UMLALv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv8i16_indexed\n");
+            break;
+        }
+        case AArch64::UMLALv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UMLALv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLALv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UMLSLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UMLSLv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv2i32_indexed\n");
+            break;
+        }
+        case AArch64::UMLSLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::UMLSLv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv4i16_indexed\n");
+            break;
+        }
+        case AArch64::UMLSLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::UMLSLv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv4i32_indexed\n");
+            break;
+        }
+        case AArch64::UMLSLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UMLSLv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv8i16_indexed\n");
+            break;
+        }
+        case AArch64::UMLSLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UMLSLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMLSLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UMOVvi16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMOVvi16\n");
+            break;
+        }
+        case AArch64::UMOVvi32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMOVvi32\n");
+            break;
+        }
+        case AArch64::UMOVvi64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMOVvi64\n");
+            break;
+        }
+        case AArch64::UMOVvi8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMOVvi8\n");
+            break;
+        }
+        case AArch64::UMSUBLrrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMSUBLrrr\n");
+            break;
+        }
+        case AArch64::UMULHrr: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULHrr\n");
+            break;
+        }
+        case AArch64::UMULLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::UMULLv2i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv2i32_indexed\n");
+            break;
+        }
+        case AArch64::UMULLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::UMULLv4i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv4i16_indexed\n");
+            break;
+        }
+        case AArch64::UMULLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::UMULLv4i32_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv4i32_indexed\n");
+            break;
+        }
+        case AArch64::UMULLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::UMULLv8i16_indexed: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv8i16_indexed\n");
+            break;
+        }
+        case AArch64::UMULLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::UMULLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UMULLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UQADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv16i8\n");
+            break;
+        }
+        case AArch64::UQADDv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv1i16\n");
+            break;
+        }
+        case AArch64::UQADDv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv1i32\n");
+            break;
+        }
+        case AArch64::UQADDv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv1i64\n");
+            break;
+        }
+        case AArch64::UQADDv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv1i8\n");
+            break;
+        }
+        case AArch64::UQADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv2i32\n");
+            break;
+        }
+        case AArch64::UQADDv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv2i64\n");
+            break;
+        }
+        case AArch64::UQADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv4i16\n");
+            break;
+        }
+        case AArch64::UQADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv4i32\n");
+            break;
+        }
+        case AArch64::UQADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv8i16\n");
+            break;
+        }
+        case AArch64::UQADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQADDv8i8\n");
+            break;
+        }
+        case AArch64::UQRSHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv16i8\n");
+            break;
+        }
+        case AArch64::UQRSHLv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv1i16\n");
+            break;
+        }
+        case AArch64::UQRSHLv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv1i32\n");
+            break;
+        }
+        case AArch64::UQRSHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv1i64\n");
+            break;
+        }
+        case AArch64::UQRSHLv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv1i8\n");
+            break;
+        }
+        case AArch64::UQRSHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv2i32\n");
+            break;
+        }
+        case AArch64::UQRSHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv2i64\n");
+            break;
+        }
+        case AArch64::UQRSHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv4i16\n");
+            break;
+        }
+        case AArch64::UQRSHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv4i32\n");
+            break;
+        }
+        case AArch64::UQRSHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv8i16\n");
+            break;
+        }
+        case AArch64::UQRSHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHLv8i8\n");
+            break;
+        }
+        case AArch64::UQRSHRNb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNb\n");
+            break;
+        }
+        case AArch64::UQRSHRNh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNh\n");
+            break;
+        }
+        case AArch64::UQRSHRNs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNs\n");
+            break;
+        }
+        case AArch64::UQRSHRNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNv16i8_shift\n");
+            break;
+        }
+        case AArch64::UQRSHRNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNv2i32_shift\n");
+            break;
+        }
+        case AArch64::UQRSHRNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNv4i16_shift\n");
+            break;
+        }
+        case AArch64::UQRSHRNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNv4i32_shift\n");
+            break;
+        }
+        case AArch64::UQRSHRNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNv8i16_shift\n");
+            break;
+        }
+        case AArch64::UQRSHRNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQRSHRNv8i8_shift\n");
+            break;
+        }
+        case AArch64::UQSHLb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLb\n");
+            break;
+        }
+        case AArch64::UQSHLd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLd\n");
+            break;
+        }
+        case AArch64::UQSHLh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLh\n");
+            break;
+        }
+        case AArch64::UQSHLs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLs\n");
+            break;
+        }
+        case AArch64::UQSHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv16i8\n");
+            break;
+        }
+        case AArch64::UQSHLv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv16i8_shift\n");
+            break;
+        }
+        case AArch64::UQSHLv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv1i16\n");
+            break;
+        }
+        case AArch64::UQSHLv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv1i32\n");
+            break;
+        }
+        case AArch64::UQSHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv1i64\n");
+            break;
+        }
+        case AArch64::UQSHLv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv1i8\n");
+            break;
+        }
+        case AArch64::UQSHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv2i32\n");
+            break;
+        }
+        case AArch64::UQSHLv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv2i32_shift\n");
+            break;
+        }
+        case AArch64::UQSHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv2i64\n");
+            break;
+        }
+        case AArch64::UQSHLv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv2i64_shift\n");
+            break;
+        }
+        case AArch64::UQSHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv4i16\n");
+            break;
+        }
+        case AArch64::UQSHLv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv4i16_shift\n");
+            break;
+        }
+        case AArch64::UQSHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv4i32\n");
+            break;
+        }
+        case AArch64::UQSHLv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv4i32_shift\n");
+            break;
+        }
+        case AArch64::UQSHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv8i16\n");
+            break;
+        }
+        case AArch64::UQSHLv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv8i16_shift\n");
+            break;
+        }
+        case AArch64::UQSHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv8i8\n");
+            break;
+        }
+        case AArch64::UQSHLv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHLv8i8_shift\n");
+            break;
+        }
+        case AArch64::UQSHRNb: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNb\n");
+            break;
+        }
+        case AArch64::UQSHRNh: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNh\n");
+            break;
+        }
+        case AArch64::UQSHRNs: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNs\n");
+            break;
+        }
+        case AArch64::UQSHRNv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNv16i8_shift\n");
+            break;
+        }
+        case AArch64::UQSHRNv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNv2i32_shift\n");
+            break;
+        }
+        case AArch64::UQSHRNv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNv4i16_shift\n");
+            break;
+        }
+        case AArch64::UQSHRNv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNv4i32_shift\n");
+            break;
+        }
+        case AArch64::UQSHRNv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNv8i16_shift\n");
+            break;
+        }
+        case AArch64::UQSHRNv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSHRNv8i8_shift\n");
+            break;
+        }
+        case AArch64::UQSUBv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv16i8\n");
+            break;
+        }
+        case AArch64::UQSUBv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv1i16\n");
+            break;
+        }
+        case AArch64::UQSUBv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv1i32\n");
+            break;
+        }
+        case AArch64::UQSUBv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv1i64\n");
+            break;
+        }
+        case AArch64::UQSUBv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv1i8\n");
+            break;
+        }
+        case AArch64::UQSUBv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv2i32\n");
+            break;
+        }
+        case AArch64::UQSUBv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv2i64\n");
+            break;
+        }
+        case AArch64::UQSUBv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv4i16\n");
+            break;
+        }
+        case AArch64::UQSUBv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv4i32\n");
+            break;
+        }
+        case AArch64::UQSUBv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv8i16\n");
+            break;
+        }
+        case AArch64::UQSUBv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQSUBv8i8\n");
+            break;
+        }
+        case AArch64::UQXTNv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv16i8\n");
+            break;
+        }
+        case AArch64::UQXTNv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv1i16\n");
+            break;
+        }
+        case AArch64::UQXTNv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv1i32\n");
+            break;
+        }
+        case AArch64::UQXTNv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv1i8\n");
+            break;
+        }
+        case AArch64::UQXTNv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv2i32\n");
+            break;
+        }
+        case AArch64::UQXTNv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv4i16\n");
+            break;
+        }
+        case AArch64::UQXTNv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv4i32\n");
+            break;
+        }
+        case AArch64::UQXTNv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv8i16\n");
+            break;
+        }
+        case AArch64::UQXTNv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UQXTNv8i8\n");
+            break;
+        }
+        case AArch64::URECPEv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URECPEv2i32\n");
+            break;
+        }
+        case AArch64::URECPEv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URECPEv4i32\n");
+            break;
+        }
+        case AArch64::URHADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URHADDv16i8\n");
+            break;
+        }
+        case AArch64::URHADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URHADDv2i32\n");
+            break;
+        }
+        case AArch64::URHADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URHADDv4i16\n");
+            break;
+        }
+        case AArch64::URHADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URHADDv4i32\n");
+            break;
+        }
+        case AArch64::URHADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URHADDv8i16\n");
+            break;
+        }
+        case AArch64::URHADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URHADDv8i8\n");
+            break;
+        }
+        case AArch64::URSHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv16i8\n");
+            break;
+        }
+        case AArch64::URSHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv1i64\n");
+            break;
+        }
+        case AArch64::URSHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv2i32\n");
+            break;
+        }
+        case AArch64::URSHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv2i64\n");
+            break;
+        }
+        case AArch64::URSHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv4i16\n");
+            break;
+        }
+        case AArch64::URSHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv4i32\n");
+            break;
+        }
+        case AArch64::URSHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv8i16\n");
+            break;
+        }
+        case AArch64::URSHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHLv8i8\n");
+            break;
+        }
+        case AArch64::URSHRd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRd\n");
+            break;
+        }
+        case AArch64::URSHRv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRv16i8_shift\n");
+            break;
+        }
+        case AArch64::URSHRv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRv2i32_shift\n");
+            break;
+        }
+        case AArch64::URSHRv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRv2i64_shift\n");
+            break;
+        }
+        case AArch64::URSHRv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRv4i16_shift\n");
+            break;
+        }
+        case AArch64::URSHRv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRv4i32_shift\n");
+            break;
+        }
+        case AArch64::URSHRv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRv8i16_shift\n");
+            break;
+        }
+        case AArch64::URSHRv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSHRv8i8_shift\n");
+            break;
+        }
+        case AArch64::URSQRTEv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSQRTEv2i32\n");
+            break;
+        }
+        case AArch64::URSQRTEv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSQRTEv4i32\n");
+            break;
+        }
+        case AArch64::URSRAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAd\n");
+            break;
+        }
+        case AArch64::URSRAv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAv16i8_shift\n");
+            break;
+        }
+        case AArch64::URSRAv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAv2i32_shift\n");
+            break;
+        }
+        case AArch64::URSRAv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAv2i64_shift\n");
+            break;
+        }
+        case AArch64::URSRAv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAv4i16_shift\n");
+            break;
+        }
+        case AArch64::URSRAv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAv4i32_shift\n");
+            break;
+        }
+        case AArch64::URSRAv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAv8i16_shift\n");
+            break;
+        }
+        case AArch64::URSRAv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " URSRAv8i8_shift\n");
+            break;
+        }
+        case AArch64::USHLLv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLLv16i8_shift\n");
+            break;
+        }
+        case AArch64::USHLLv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLLv2i32_shift\n");
+            break;
+        }
+        case AArch64::USHLLv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLLv4i16_shift\n");
+            break;
+        }
+        case AArch64::USHLLv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLLv4i32_shift\n");
+            break;
+        }
+        case AArch64::USHLLv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLLv8i16_shift\n");
+            break;
+        }
+        case AArch64::USHLLv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLLv8i8_shift\n");
+            break;
+        }
+        case AArch64::USHLv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv16i8\n");
+            break;
+        }
+        case AArch64::USHLv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv1i64\n");
+            break;
+        }
+        case AArch64::USHLv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv2i32\n");
+            break;
+        }
+        case AArch64::USHLv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv2i64\n");
+            break;
+        }
+        case AArch64::USHLv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv4i16\n");
+            break;
+        }
+        case AArch64::USHLv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv4i32\n");
+            break;
+        }
+        case AArch64::USHLv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv8i16\n");
+            break;
+        }
+        case AArch64::USHLv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHLv8i8\n");
+            break;
+        }
+        case AArch64::USHRd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRd\n");
+            break;
+        }
+        case AArch64::USHRv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRv16i8_shift\n");
+            break;
+        }
+        case AArch64::USHRv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRv2i32_shift\n");
+            break;
+        }
+        case AArch64::USHRv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRv2i64_shift\n");
+            break;
+        }
+        case AArch64::USHRv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRv4i16_shift\n");
+            break;
+        }
+        case AArch64::USHRv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRv4i32_shift\n");
+            break;
+        }
+        case AArch64::USHRv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRv8i16_shift\n");
+            break;
+        }
+        case AArch64::USHRv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USHRv8i8_shift\n");
+            break;
+        }
+        case AArch64::USQADDv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv16i8\n");
+            break;
+        }
+        case AArch64::USQADDv1i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv1i16\n");
+            break;
+        }
+        case AArch64::USQADDv1i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv1i32\n");
+            break;
+        }
+        case AArch64::USQADDv1i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv1i64\n");
+            break;
+        }
+        case AArch64::USQADDv1i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv1i8\n");
+            break;
+        }
+        case AArch64::USQADDv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv2i32\n");
+            break;
+        }
+        case AArch64::USQADDv2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv2i64\n");
+            break;
+        }
+        case AArch64::USQADDv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv4i16\n");
+            break;
+        }
+        case AArch64::USQADDv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv4i32\n");
+            break;
+        }
+        case AArch64::USQADDv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv8i16\n");
+            break;
+        }
+        case AArch64::USQADDv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USQADDv8i8\n");
+            break;
+        }
+        case AArch64::USRAd: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAd\n");
+            break;
+        }
+        case AArch64::USRAv16i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAv16i8_shift\n");
+            break;
+        }
+        case AArch64::USRAv2i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAv2i32_shift\n");
+            break;
+        }
+        case AArch64::USRAv2i64_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAv2i64_shift\n");
+            break;
+        }
+        case AArch64::USRAv4i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAv4i16_shift\n");
+            break;
+        }
+        case AArch64::USRAv4i32_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAv4i32_shift\n");
+            break;
+        }
+        case AArch64::USRAv8i16_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAv8i16_shift\n");
+            break;
+        }
+        case AArch64::USRAv8i8_shift: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USRAv8i8_shift\n");
+            break;
+        }
+        case AArch64::USUBLv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBLv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::USUBLv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBLv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::USUBLv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBLv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::USUBLv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBLv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::USUBLv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBLv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::USUBLv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBLv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::USUBWv16i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBWv16i8_v8i16\n");
+            break;
+        }
+        case AArch64::USUBWv2i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBWv2i32_v2i64\n");
+            break;
+        }
+        case AArch64::USUBWv4i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBWv4i16_v4i32\n");
+            break;
+        }
+        case AArch64::USUBWv4i32_v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBWv4i32_v2i64\n");
+            break;
+        }
+        case AArch64::USUBWv8i16_v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBWv8i16_v4i32\n");
+            break;
+        }
+        case AArch64::USUBWv8i8_v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " USUBWv8i8_v8i16\n");
+            break;
+        }
+        case AArch64::UZP1v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP1v16i8\n");
+            break;
+        }
+        case AArch64::UZP1v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP1v2i32\n");
+            break;
+        }
+        case AArch64::UZP1v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP1v2i64\n");
+            break;
+        }
+        case AArch64::UZP1v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP1v4i16\n");
+            break;
+        }
+        case AArch64::UZP1v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP1v4i32\n");
+            break;
+        }
+        case AArch64::UZP1v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP1v8i16\n");
+            break;
+        }
+        case AArch64::UZP1v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP1v8i8\n");
+            break;
+        }
+        case AArch64::UZP2v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP2v16i8\n");
+            break;
+        }
+        case AArch64::UZP2v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP2v2i32\n");
+            break;
+        }
+        case AArch64::UZP2v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP2v2i64\n");
+            break;
+        }
+        case AArch64::UZP2v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP2v4i16\n");
+            break;
+        }
+        case AArch64::UZP2v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP2v4i32\n");
+            break;
+        }
+        case AArch64::UZP2v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP2v8i16\n");
+            break;
+        }
+        case AArch64::UZP2v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " UZP2v8i8\n");
+            break;
+        }
+        case AArch64::XTNv16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " XTNv16i8\n");
+            break;
+        }
+        case AArch64::XTNv2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " XTNv2i32\n");
+            break;
+        }
+        case AArch64::XTNv4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " XTNv4i16\n");
+            break;
+        }
+        case AArch64::XTNv4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " XTNv4i32\n");
+            break;
+        }
+        case AArch64::XTNv8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " XTNv8i16\n");
+            break;
+        }
+        case AArch64::XTNv8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " XTNv8i8\n");
+            break;
+        }
+        case AArch64::ZIP1v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP1v16i8\n");
+            break;
+        }
+        case AArch64::ZIP1v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP1v2i32\n");
+            break;
+        }
+        case AArch64::ZIP1v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP1v2i64\n");
+            break;
+        }
+        case AArch64::ZIP1v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP1v4i16\n");
+            break;
+        }
+        case AArch64::ZIP1v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP1v4i32\n");
+            break;
+        }
+        case AArch64::ZIP1v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP1v8i16\n");
+            break;
+        }
+        case AArch64::ZIP1v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP1v8i8\n");
+            break;
+        }
+        case AArch64::ZIP2v16i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP2v16i8\n");
+            break;
+        }
+        case AArch64::ZIP2v2i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP2v2i32\n");
+            break;
+        }
+        case AArch64::ZIP2v2i64: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP2v2i64\n");
+            break;
+        }
+        case AArch64::ZIP2v4i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP2v4i16\n");
+            break;
+        }
+        case AArch64::ZIP2v4i32: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP2v4i32\n");
+            break;
+        }
+        case AArch64::ZIP2v8i16: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP2v8i16\n");
+            break;
+        }
+        case AArch64::ZIP2v8i8: {
+            DEBUG(errs() << "0x" << utohexstr(Address) << " ZIP2v8i8\n");
+            break;
+        }
+    }
+}
diff --git a/lib/Target/AArch64/DC/AArch64RegisterSema.cpp b/lib/Target/AArch64/DC/AArch64RegisterSema.cpp
new file mode 100644
index 0000000..cf275ff
--- /dev/null
+++ b/lib/Target/AArch64/DC/AArch64RegisterSema.cpp
@@ -0,0 +1,441 @@
+#include <llvm/MC/MCAnalysis/MCFunction.h>
+#include <llvm/ADT/StringExtras.h>
+#include "AArch64RegisterSema.h"
+
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/Debug.h"
+
+#define DEBUG_TYPE "dc-sema"
+
+using namespace llvm;
+
+static void AArch64InitSpecialRegSizes(DCRegisterSema::RegSizeTy &RegSizes) {
+//    RegSizes[AArch64::D0] = 128;
+}
+
+AArch64RegisterSema::AArch64RegisterSema(const MCRegisterInfo &MRI,
+                                         const MCInstrInfo &MII,
+                                         const DataLayout &DL) : DCRegisterSema(MRI, MII, DL,
+                                                                                AArch64InitSpecialRegSizes) {
+
+}
+
+Type *AArch64RegisterSema::getRegType(unsigned RegNo) {
+  return Type::getInt64Ty(getGlobalContext());
+}
+
+void AArch64RegisterSema::insertInitRegSetCode(Function *InitFn) {
+  IRBuilderBase::InsertPointGuard IPG(*Builder);
+  Type *I64Ty = Builder->getInt64Ty();
+  Value *Idx[] = {Builder->getInt32(0), 0};
+  Builder->SetInsertPoint(BasicBlock::Create(*Ctx, "", InitFn));
+
+  Function::arg_iterator ArgI = InitFn->getArgumentList().begin();
+  Value *RegSet = ArgI++;
+  Value *StackPtr = ArgI++;
+  Value *StackSize = ArgI++;
+  Value *ArgC = ArgI++;
+  Value *ArgV = ArgI++;
+
+  Value *RSP = Builder->CreatePtrToInt(StackPtr, I64Ty);
+  RSP = Builder->CreateAdd(RSP, Builder->CreateZExtOrBitCast(StackSize, I64Ty));
+
+  // push ~0 to simulate a call
+  RSP = Builder->CreateSub(RSP, Builder->getInt64(128));
+  Builder->CreateStore(Builder->getInt(APInt::getAllOnesValue(64)),
+                       Builder->CreateIntToPtr(RSP, I64Ty->getPointerTo()));
+
+  // put a pointer to the test stack in RSP
+  Idx[1] = Builder->getInt32(RegOffsetsInSet[RegLargestSupers[AArch64::SP]]);
+  Builder->CreateStore(RSP, Builder->CreateInBoundsGEP(RegSet, Idx));
+  Builder->CreateRetVoid();
+}
+
+void AArch64RegisterSema::insertFiniRegSetCode(Function *FiniFn) {
+  IRBuilderBase::InsertPointGuard IPG(*Builder);
+  Value *Idx[] = {Builder->getInt32(0), 0};
+  Builder->SetInsertPoint(BasicBlock::Create(*Ctx, "", FiniFn));
+
+  Function::arg_iterator ArgI = FiniFn->getArgumentList().begin();
+  Value *RegSet = ArgI;
+
+  // Result comes out of EAX
+  Idx[1] = Builder->getInt32(RegOffsetsInSet[RegLargestSupers[AArch64::X0]]);
+  Builder->CreateRet(Builder->CreateTrunc(
+    Builder->CreateLoad(Builder->CreateInBoundsGEP(RegSet, Idx)),
+    Builder->getInt32Ty()));
+}
+
+bool AArch64RegisterSema::doesSubRegIndexClearSuper(unsigned Idx) const {
+  if (Idx >= AArch64::W0 && Idx <= AArch64::W30) {
+    return true;
+  }
+  if (Idx >= AArch64::D0 && Idx <= AArch64::D31) {
+    return true;
+  }
+  if (Idx >= AArch64::S0 && Idx <= AArch64::S31) {
+    return true;
+  }
+  if (Idx >= AArch64::B0 && Idx <= AArch64::B31) {
+    return true;
+  }
+  return false;
+}
+
+void AArch64RegisterSema::onRegisterSet(unsigned RegNo, Value *Val) {
+//    if (RegNo == AArch64::XZR) {
+//        ConstantInt *Const = dyn_cast<ConstantInt>(Val);
+//        if (Const) {
+//            if (Const->getValue().getZExtValue() != 0) {
+//                setReg(RegNo, Builder->getInt64(0));
+//            }
+//        } else {
+//            setReg(RegNo, Builder->getInt64(0));
+//        }
+//    } else if (RegNo == AArch64::WZR) {
+//        ConstantInt *Const = dyn_cast<ConstantInt>(Val);
+//        if (Const) {
+//            if (Const->getValue().getZExtValue() != 0) {
+//                setReg(RegNo, Builder->getInt32(0));
+//            }
+//        } else {
+//            setReg(RegNo, Builder->getInt32(0));
+//        }
+//    }
+}
+
+
+void AArch64RegisterSema::onRegisterGet(unsigned RegNo) {
+//    if (RegNo == AArch64::XZR) {
+//        RegVals[RegNo] = Builder->getInt64(0);
+//    }
+//    if (RegNo == AArch64::WZR) {
+//        RegVals[RegNo] = Builder->getInt32(0);
+//    }
+}
+
+Value *AArch64RegisterSema::getReg(unsigned RegNo) {
+  if (RegNo == AArch64::WZR) {
+    return Builder->getInt32(0);
+  }
+  if (RegNo == AArch64::XZR) {
+    return Builder->getInt64(0);
+  }
+  if (RegNo >= AArch64::Q0 && RegNo <= AArch64::Q31) {
+    if (!RegVals[RegNo]) {
+      Value *QQQQ = getRegNoCallback(RegNo + (AArch64::Q0_Q1_Q2_Q3 - AArch64::Q0));
+      Value *Q = Builder->CreateTrunc(QQQQ, Builder->getInt128Ty());
+      RegVals[RegNo] = Q;
+      return RegVals[RegNo];
+    }
+  }
+  if (RegNo >= AArch64::D0 && RegNo <= AArch64::D31) {
+    if (!RegVals[RegNo]) {
+      Value *QQQQ = getRegNoCallback(RegNo + (AArch64::Q0_Q1_Q2_Q3 - AArch64::D0));
+      Value *D = Builder->CreateTrunc(QQQQ, Builder->getInt64Ty());
+      RegVals[RegNo] = D;
+      return RegVals[RegNo];
+    }
+  }
+  if (RegNo >= AArch64::S0 && RegNo <= AArch64::S31) {
+    if (!RegVals[RegNo]) {
+      Value *QQQQ = getRegNoCallback(RegNo + (AArch64::Q0_Q1_Q2_Q3 - AArch64::S0));
+      Value *S = Builder->CreateTrunc(QQQQ, Builder->getInt32Ty());
+      RegVals[RegNo] = S;
+      return RegVals[RegNo];
+    }
+  }
+  if (RegNo >= AArch64::H0 && RegNo <= AArch64::H31) {
+    if (!RegVals[RegNo]) {
+      Value *QQQQ = getRegNoCallback(RegNo + (AArch64::Q0_Q1_Q2_Q3 - AArch64::H0));
+      Value *H = Builder->CreateTrunc(QQQQ, Builder->getInt16Ty());
+      RegVals[RegNo] = H;
+      return RegVals[RegNo];
+    }
+  }
+  if (RegNo >= AArch64::B0 && RegNo <= AArch64::B31) {
+    if (!RegVals[RegNo]) {
+      Value *QQQQ = getRegNoCallback(RegNo + (AArch64::Q0_Q1_Q2_Q3 - AArch64::B0));
+      Value *B = Builder->CreateTrunc(QQQQ, Builder->getInt8Ty());
+      RegVals[RegNo] = B;
+      return RegVals[RegNo];
+    }
+  }
+  if (RegNo >= AArch64::Q0_Q1 && RegNo <= AArch64::Q31_Q0) {
+    int64_t diff1 = (RegNo - AArch64::Q0_Q1) % 32;
+    int64_t diff2 = (RegNo - AArch64::Q0_Q1 + 1) % 32;
+
+    Value *Reg1 = getReg(AArch64::Q0 + diff1);
+    Value *Reg2 = getReg(AArch64::Q0 + diff2);
+
+    Reg1 = Builder->CreateZExt(Reg1, IntegerType::get(getGlobalContext(), 256));
+    Reg2 = Builder->CreateZExt(Reg2, IntegerType::get(getGlobalContext(), 256));
+    Reg2 = Builder->CreateShl(Reg2, 128);
+
+    return Builder->CreateOr(Reg1, Reg2);
+  }
+
+  if (RegNo >= AArch64::D0_D1 && RegNo <= AArch64::D31_D0) {
+    int64_t diff1 = (RegNo - AArch64::D0_D1) % 32;
+    int64_t diff2 = (RegNo - AArch64::D0_D1 + 1) % 32;
+
+    Value *Reg1 = getReg(AArch64::Q0 + diff1);
+    Value *Reg2 = getReg(AArch64::Q0 + diff2);
+
+    Reg1 = Builder->CreateZExtOrTrunc(Reg1, IntegerType::get(getGlobalContext(), 128));
+    Reg2 = Builder->CreateZExtOrTrunc(Reg2, IntegerType::get(getGlobalContext(), 128));
+    Reg2 = Builder->CreateShl(Reg2, 64);
+
+    return Builder->CreateOr(Reg1, Reg2);
+  }
+
+  if (RegNo >= AArch64::Q0_Q1_Q2 && RegNo <= AArch64::Q31_Q0_Q1) {
+    int64_t diff1 = (RegNo - AArch64::Q0_Q1_Q2) % 32;
+    int64_t diff2 = (RegNo - AArch64::Q0_Q1_Q2 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::Q0_Q1_Q2 + 2) % 32;
+
+    Value *Reg1 = getReg(AArch64::Q0 + diff1);
+    Value *Reg2 = getReg(AArch64::Q0 + diff2);
+    Value *Reg3 = getReg(AArch64::Q0 + diff3);
+
+    Reg1 = Builder->CreateZExt(Reg1, IntegerType::get(getGlobalContext(), 384));
+    Reg2 = Builder->CreateZExt(Reg2, IntegerType::get(getGlobalContext(), 384));
+    Reg2 = Builder->CreateShl(Reg2, 128);
+    Reg3 = Builder->CreateZExt(Reg3, IntegerType::get(getGlobalContext(), 384));
+    Reg3 = Builder->CreateShl(Reg3, 256);
+
+    return Builder->CreateOr(Reg1, Builder->CreateOr(Reg2, Reg3));
+  }
+  if (RegNo >= AArch64::Q0_Q1_Q2 && RegNo <= AArch64::Q31_Q0_Q1) {
+    int64_t diff1 = (RegNo - AArch64::Q0_Q1_Q2) % 32;
+    int64_t diff2 = (RegNo - AArch64::Q0_Q1_Q2 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::Q0_Q1_Q2 + 2) % 32;
+
+    Value *Reg1 = getReg(AArch64::Q0 + diff1);
+    Value *Reg2 = getReg(AArch64::Q0 + diff2);
+    Value *Reg3 = getReg(AArch64::Q0 + diff3);
+
+    Reg1 = Builder->CreateZExt(Reg1, IntegerType::get(getGlobalContext(), 384));
+    Reg2 = Builder->CreateZExt(Reg2, IntegerType::get(getGlobalContext(), 384));
+    Reg2 = Builder->CreateShl(Reg2, 128);
+    Reg3 = Builder->CreateZExt(Reg3, IntegerType::get(getGlobalContext(), 384));
+    Reg3 = Builder->CreateShl(Reg3, 256);
+
+    return Builder->CreateOr(Reg1, Builder->CreateOr(Reg2, Reg3));
+  }
+
+  if (RegNo >= AArch64::D0_D1_D2 && RegNo <= AArch64::D31_D0_D1) {
+    int64_t diff1 = (RegNo - AArch64::D0_D1_D2) % 32;
+    int64_t diff2 = (RegNo - AArch64::D0_D1_D2 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::D0_D1_D2 + 2) % 32;
+
+    Value *Reg1 = getReg(AArch64::Q0 + diff1);
+    Value *Reg2 = getReg(AArch64::Q0 + diff2);
+    Value *Reg3 = getReg(AArch64::Q0 + diff3);
+
+    Reg1 = Builder->CreateZExt(Reg1, IntegerType::get(getGlobalContext(), 192));
+    Reg2 = Builder->CreateZExt(Reg2, IntegerType::get(getGlobalContext(), 192));
+    Reg2 = Builder->CreateShl(Reg2, 64);
+    Reg3 = Builder->CreateZExt(Reg3, IntegerType::get(getGlobalContext(), 192));
+    Reg3 = Builder->CreateShl(Reg3, 128);
+
+    return Builder->CreateOr(Reg1, Builder->CreateOr(Reg2, Reg3));
+  }
+
+  if (RegNo >= AArch64::Q0_Q1_Q2_Q3 && RegNo <= AArch64::Q31_Q0_Q1_Q2) {
+    int64_t diff1 = (RegNo - AArch64::Q0_Q1_Q2_Q3) % 32;
+    int64_t diff2 = (RegNo - AArch64::Q0_Q1_Q2_Q3 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::Q0_Q1_Q2_Q3 + 2) % 32;
+    int64_t diff4 = (RegNo - AArch64::Q0_Q1_Q2_Q3 + 3) % 32;
+
+    Value *Reg1 = getReg(AArch64::Q0 + diff1);
+    Value *Reg2 = getReg(AArch64::Q0 + diff2);
+    Value *Reg3 = getReg(AArch64::Q0 + diff3);
+    Value *Reg4 = getReg(AArch64::Q0 + diff4);
+
+    Reg1 = Builder->CreateZExt(Reg1, IntegerType::get(getGlobalContext(), 512));
+    Reg2 = Builder->CreateZExt(Reg2, IntegerType::get(getGlobalContext(), 512));
+    Reg2 = Builder->CreateShl(Reg2, 128);
+    Reg3 = Builder->CreateZExt(Reg3, IntegerType::get(getGlobalContext(), 512));
+    Reg3 = Builder->CreateShl(Reg3, 256);
+    Reg4 = Builder->CreateZExt(Reg4, IntegerType::get(getGlobalContext(), 512));
+    Reg4 = Builder->CreateShl(Reg4, 384);
+
+    return Builder->CreateOr(Reg1, Builder->CreateOr(Reg2, Builder->CreateOr(Reg3, Reg4)));
+  }
+
+  if (RegNo >= AArch64::D0_D1_D2_D3 && RegNo <= AArch64::D31_D0_D1_D2) {
+    int64_t diff1 = (RegNo - AArch64::D0_D1_D2_D3) % 32;
+    int64_t diff2 = (RegNo - AArch64::D0_D1_D2_D3 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::D0_D1_D2_D3 + 2) % 32;
+    int64_t diff4 = (RegNo - AArch64::D0_D1_D2_D3 + 3) % 32;
+
+    Value *Reg1 = getReg(AArch64::Q0 + diff1);
+    Value *Reg2 = getReg(AArch64::Q0 + diff2);
+    Value *Reg3 = getReg(AArch64::Q0 + diff3);
+    Value *Reg4 = getReg(AArch64::Q0 + diff4);
+
+    Reg1 = Builder->CreateZExt(Reg1, IntegerType::get(getGlobalContext(), 256));
+    Reg2 = Builder->CreateZExt(Reg2, IntegerType::get(getGlobalContext(), 256));
+    Reg2 = Builder->CreateShl(Reg2, 64);
+    Reg3 = Builder->CreateZExt(Reg3, IntegerType::get(getGlobalContext(), 256));
+    Reg3 = Builder->CreateShl(Reg3, 128);
+    Reg4 = Builder->CreateZExt(Reg4, IntegerType::get(getGlobalContext(), 256));
+    Reg4 = Builder->CreateShl(Reg4, 192);
+
+    return Builder->CreateOr(Reg1, Builder->CreateOr(Reg2, Builder->CreateOr(Reg3, Reg4)));
+  }
+  return DCRegisterSema::getReg(RegNo);
+}
+
+void AArch64RegisterSema::setReg(unsigned RegNo, Value *Val) {
+  if (RegNo == 0) {
+    //FIXME: possibly PC
+    DEBUG(errs() << utohexstr(CurrentInst->Address) << ": Register 0 set (PC???)\n");
+    return;
+  }
+  if (RegNo == AArch64::WZR) {
+    return;
+  }
+  if (RegNo == AArch64::XZR) {
+    return;
+  }
+  if (RegNo >= AArch64::Q0 && RegNo <= AArch64::Q31) {
+    setRegNoSubSuper(RegNo, Val);
+    setRegNoSubSuper(RegNo - (AArch64::Q0 - AArch64::Q0_Q1_Q2_Q3),
+                     Builder->CreateZExt(Val, IntegerType::get(*Ctx, 512)));
+    return;
+  }
+  if (RegNo >= AArch64::D0 && RegNo <= AArch64::D31) {
+    setRegNoSubSuper(RegNo, Val);
+    setRegNoSubSuper(RegNo - (AArch64::D0 - AArch64::Q0_Q1_Q2_Q3),
+                     Builder->CreateZExt(Val, IntegerType::get(*Ctx, 512)));
+    return;
+  }
+  if (RegNo >= AArch64::B0 && RegNo <= AArch64::B31) {
+    setRegNoSubSuper(RegNo, Val);
+    setRegNoSubSuper(RegNo - (AArch64::B0 - AArch64::Q0_Q1_Q2_Q3),
+                     Builder->CreateZExt(Val, IntegerType::get(*Ctx, 512)));
+    return;
+  }
+  if (RegNo >= AArch64::H0 && RegNo <= AArch64::H31) {
+    setRegNoSubSuper(RegNo, Val);
+    setRegNoSubSuper(RegNo - (AArch64::H0 - AArch64::Q0_Q1_Q2_Q3),
+                     Builder->CreateZExt(Val, IntegerType::get(*Ctx, 512)));
+    return;
+  }
+  if (RegNo >= AArch64::S0 && RegNo <= AArch64::S31) {
+    setRegNoSubSuper(RegNo, Val);
+    setRegNoSubSuper(RegNo - (AArch64::S0 - AArch64::Q0_Q1_Q2_Q3),
+                     Builder->CreateZExt(Val, IntegerType::get(*Ctx, 512)));
+    return;
+  }
+  if (RegNo >= AArch64::Q0_Q1 && RegNo <= AArch64::Q31_Q0) {
+    Value *reg1 = Builder->CreateTrunc(Val, Builder->getInt128Ty());
+    Value *reg2 = Builder->CreateLShr(Val, 128);
+    reg2 = Builder->CreateTrunc(reg2, Builder->getInt128Ty());
+
+    int64_t diff1 = (RegNo - AArch64::Q0_Q1) % 32;
+    int64_t diff2 = (RegNo - AArch64::Q0_Q1 + 1) % 32;
+
+    setReg(AArch64::Q0 + diff1, reg1);
+    setReg(AArch64::Q0 + diff2, reg2);
+
+    return;
+  }
+
+  if (RegNo >= AArch64::D0_D1 && RegNo <= AArch64::D31_D0) {
+    Value *reg1 = Builder->CreateTrunc(Val, Builder->getInt64Ty());
+    Value *reg2 = Builder->CreateLShr(Val, 64);
+    reg2 = Builder->CreateTrunc(reg2, Builder->getInt64Ty());
+
+    int64_t diff1 = (RegNo - AArch64::D0_D1) % 32;
+    int64_t diff2 = (RegNo - AArch64::D0_D1 + 1) % 32;
+
+    setReg(AArch64::D0 + diff1, reg1);
+    setReg(AArch64::D0 + diff2, reg2);
+
+    return;
+  }
+
+  if (RegNo >= AArch64::Q0_Q1_Q2 && RegNo <= AArch64::Q31_Q0_Q1) {
+    Value *reg1 = Builder->CreateTrunc(Val, Builder->getInt128Ty());
+    Value *reg2 = Builder->CreateLShr(Val, 128);
+    reg2 = Builder->CreateTrunc(reg2, Builder->getInt128Ty());
+    Value *reg3 = Builder->CreateLShr(Val, 256);
+    reg3 = Builder->CreateTrunc(reg3, Builder->getInt128Ty());
+
+    int64_t diff1 = (RegNo - AArch64::Q0_Q1_Q2) % 32;
+    int64_t diff2 = (RegNo - AArch64::Q0_Q1_Q2 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::Q0_Q1_Q2 + 2) % 32;
+
+    setReg(AArch64::Q0 + diff1, reg1);
+    setReg(AArch64::Q0 + diff2, reg2);
+    setReg(AArch64::Q0 + diff3, reg3);
+
+    return;
+  }
+
+  if (RegNo >= AArch64::D0_D1_D2 && RegNo <= AArch64::D31_D0_D1) {
+    Value *reg1 = Builder->CreateTrunc(Val, Builder->getInt64Ty());
+    Value *reg2 = Builder->CreateLShr(Val, 64);
+    reg2 = Builder->CreateTrunc(reg2, Builder->getInt64Ty());
+    Value *reg3 = Builder->CreateLShr(Val, 128);
+    reg3 = Builder->CreateTrunc(reg3, Builder->getInt64Ty());
+
+    int64_t diff1 = (RegNo - AArch64::D0_D1_D2) % 32;
+    int64_t diff2 = (RegNo - AArch64::D0_D1_D2 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::D0_D1_D2 + 2) % 32;
+
+    setReg(AArch64::D0 + diff1, reg1);
+    setReg(AArch64::D0 + diff2, reg2);
+    setReg(AArch64::D0 + diff3, reg3);
+
+    return;
+  }
+
+  if (RegNo >= AArch64::Q0_Q1_Q2_Q3 && RegNo <= AArch64::Q31_Q0_Q1_Q2) {
+    Value *reg1 = Builder->CreateTrunc(Val, Builder->getInt128Ty());
+    Value *reg2 = Builder->CreateLShr(Val, 128);
+    reg2 = Builder->CreateTrunc(reg2, Builder->getInt128Ty());
+    Value *reg3 = Builder->CreateLShr(Val, 256);
+    reg3 = Builder->CreateTrunc(reg3, Builder->getInt128Ty());
+    Value *reg4 = Builder->CreateLShr(Val, 384);
+    reg4 = Builder->CreateTrunc(reg4, Builder->getInt128Ty());
+
+    int64_t diff1 = (RegNo - AArch64::Q0_Q1_Q2_Q3) % 32;
+    int64_t diff2 = (RegNo - AArch64::Q0_Q1_Q2_Q3 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::Q0_Q1_Q2_Q3 + 2) % 32;
+    int64_t diff4 = (RegNo - AArch64::Q0_Q1_Q2_Q3 + 3) % 32;
+
+    setReg(AArch64::Q0 + diff1, reg1);
+    setReg(AArch64::Q0 + diff2, reg2);
+    setReg(AArch64::Q0 + diff3, reg3);
+    setReg(AArch64::Q0 + diff4, reg4);
+
+    return;
+  }
+
+  if (RegNo >= AArch64::D0_D1_D2_D3 && RegNo <= AArch64::D31_D0_D1_D2) {
+    Value *reg1 = Builder->CreateTrunc(Val, Builder->getInt64Ty());
+    Value *reg2 = Builder->CreateLShr(Val, 64);
+    reg2 = Builder->CreateTrunc(reg2, Builder->getInt64Ty());
+    Value *reg3 = Builder->CreateLShr(Val, 128);
+    reg3 = Builder->CreateTrunc(reg3, Builder->getInt64Ty());
+    Value *reg4 = Builder->CreateLShr(Val, 192);
+    reg4 = Builder->CreateTrunc(reg4, Builder->getInt64Ty());
+
+    int64_t diff1 = (RegNo - AArch64::D0_D1_D2_D3) % 32;
+    int64_t diff2 = (RegNo - AArch64::D0_D1_D2_D3 + 1) % 32;
+    int64_t diff3 = (RegNo - AArch64::D0_D1_D2_D3 + 2) % 32;
+    int64_t diff4 = (RegNo - AArch64::D0_D1_D2_D3 + 3) % 32;
+
+    setReg(AArch64::D0 + diff1, reg1);
+    setReg(AArch64::D0 + diff2, reg2);
+    setReg(AArch64::D0 + diff3, reg3);
+    setReg(AArch64::D0 + diff4, reg4);
+
+    return;
+  }
+  DCRegisterSema::setReg(RegNo, Val);
+}
diff --git a/lib/Target/AArch64/DC/AArch64RegisterSema.h b/lib/Target/AArch64/DC/AArch64RegisterSema.h
new file mode 100644
index 0000000..ca02577
--- /dev/null
+++ b/lib/Target/AArch64/DC/AArch64RegisterSema.h
@@ -0,0 +1,34 @@
+#ifndef LLVM_LIB_TARGET_AARCH64_DC_AARCH64REGISTERSEMA_H
+#define LLVM_LIB_TARGET_AARCH64_DC_AARCH64REGISTERSEMA_H
+
+#include "AArch64InstrInfo.h"
+#include "llvm/DC/DCRegisterSema.h"
+#include "llvm/ADT/SmallVector.h"
+
+namespace llvm {
+    class AArch64RegisterSema : public DCRegisterSema {
+    public:
+      AArch64RegisterSema(const MCRegisterInfo &MRI,
+                      const MCInstrInfo &MII,
+                      const DataLayout &DL);
+
+      virtual void insertInitRegSetCode(Function *InitFn);
+      virtual void insertFiniRegSetCode(Function *FiniFn);
+
+        virtual Type *getRegType(unsigned RegNo);
+
+    protected:
+        virtual bool doesSubRegIndexClearSuper(unsigned Idx) const override;
+
+        virtual void onRegisterSet(unsigned RegNo, Value *Val) override;
+
+        virtual void onRegisterGet(unsigned RegNo) override;
+
+    public:
+        virtual Value *getReg(unsigned RegNo) override;
+
+        virtual void setReg(unsigned RegNo, Value *Val) override;
+    };
+}
+
+#endif
diff --git a/lib/Target/AArch64/DC/CMakeLists.txt b/lib/Target/AArch64/DC/CMakeLists.txt
new file mode 100644
index 0000000..5b59913
--- /dev/null
+++ b/lib/Target/AArch64/DC/CMakeLists.txt
@@ -0,0 +1,10 @@
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+
+add_llvm_library(LLVMAARCH64DC
+  AArch64DCInfo.cpp
+  AArch64InstrSema.cpp
+  AArch64RegisterSema.cpp
+  AArch64InstrSemaDebug.cpp
+  )
+
+add_dependencies(LLVMAARCH64DC AArch64CommonTableGen)
diff --git a/lib/Target/AArch64/DC/LD_ST_cases.h b/lib/Target/AArch64/DC/LD_ST_cases.h
new file mode 100644
index 0000000..522eaf9
--- /dev/null
+++ b/lib/Target/AArch64/DC/LD_ST_cases.h
@@ -0,0 +1,1361 @@
+
+      case AArch64::ST1Onev16b:
+      case AArch64::ST1Onev1d:
+      case AArch64::ST1Onev2d:
+      case AArch64::ST1Onev2s:
+      case AArch64::ST1Onev4h:
+      case AArch64::ST1Onev4s:
+      case AArch64::ST1Onev8b:
+      case AArch64::ST1Onev8h:
+      case AArch64::ST1Twov16b:
+      case AArch64::ST1Twov1d:
+      case AArch64::ST1Twov2d:
+      case AArch64::ST1Twov2s:
+      case AArch64::ST1Twov4h:
+      case AArch64::ST1Twov4s:
+      case AArch64::ST1Twov8b:
+      case AArch64::ST1Twov8h:
+      case AArch64::ST1Threev16b:
+      case AArch64::ST1Threev1d:
+      case AArch64::ST1Threev2d:
+      case AArch64::ST1Threev2s:
+      case AArch64::ST1Threev4h:
+      case AArch64::ST1Threev4s:
+      case AArch64::ST1Threev8b:
+      case AArch64::ST1Threev8h:
+      case AArch64::ST1Fourv16b:
+      case AArch64::ST1Fourv1d:
+      case AArch64::ST1Fourv2d:
+      case AArch64::ST1Fourv2s:
+      case AArch64::ST1Fourv4h:
+      case AArch64::ST1Fourv4s:
+      case AArch64::ST1Fourv8b:
+      case AArch64::ST1Fourv8h:
+      case AArch64::ST2Twov16b:
+      case AArch64::ST2Twov2d:
+      case AArch64::ST2Twov2s:
+      case AArch64::ST2Twov4h:
+      case AArch64::ST2Twov4s:
+      case AArch64::ST2Twov8b:
+      case AArch64::ST2Twov8h:
+      case AArch64::ST3Threev16b:
+      case AArch64::ST3Threev2d:
+      case AArch64::ST3Threev2s:
+      case AArch64::ST3Threev4h:
+      case AArch64::ST3Threev4s:
+      case AArch64::ST3Threev8b:
+      case AArch64::ST3Threev8h:
+      case AArch64::ST4Fourv16b:
+      case AArch64::ST4Fourv2d:
+      case AArch64::ST4Fourv2s:
+      case AArch64::ST4Fourv4h:
+      case AArch64::ST4Fourv4s:
+      case AArch64::ST4Fourv8b:
+      case AArch64::ST4Fourv8h:
+      {
+        Value *val = getReg(CurrentInst->Inst.getOperand(0).getReg());
+        Value *addr = getReg(CurrentInst->Inst.getOperand(1).getReg());
+        addr = Builder->CreateIntToPtr(addr, val->getType()->getPointerTo());
+        Builder->CreateStore(val, addr);
+        return true;
+      }
+
+      case AArch64::ST1Onev16b_POST:
+      case AArch64::ST1Onev1d_POST:
+      case AArch64::ST1Onev2d_POST:
+      case AArch64::ST1Onev2s_POST:
+      case AArch64::ST1Onev4h_POST:
+      case AArch64::ST1Onev4s_POST:
+      case AArch64::ST1Onev8b_POST:
+      case AArch64::ST1Onev8h_POST:
+      case AArch64::ST1Twov16b_POST:
+      case AArch64::ST1Twov1d_POST:
+      case AArch64::ST1Twov2d_POST:
+      case AArch64::ST1Twov2s_POST:
+      case AArch64::ST1Twov4h_POST:
+      case AArch64::ST1Twov4s_POST:
+      case AArch64::ST1Twov8b_POST:
+      case AArch64::ST1Twov8h_POST:
+      case AArch64::ST1Threev16b_POST:
+      case AArch64::ST1Threev1d_POST:
+      case AArch64::ST1Threev2d_POST:
+      case AArch64::ST1Threev2s_POST:
+      case AArch64::ST1Threev4h_POST:
+      case AArch64::ST1Threev4s_POST:
+      case AArch64::ST1Threev8b_POST:
+      case AArch64::ST1Threev8h_POST:
+      case AArch64::ST1Fourv16b_POST:
+      case AArch64::ST1Fourv1d_POST:
+      case AArch64::ST1Fourv2d_POST:
+      case AArch64::ST1Fourv2s_POST:
+      case AArch64::ST1Fourv4h_POST:
+      case AArch64::ST1Fourv4s_POST:
+      case AArch64::ST1Fourv8b_POST:
+      case AArch64::ST1Fourv8h_POST:
+      case AArch64::ST2Twov16b_POST:
+      case AArch64::ST2Twov2d_POST:
+      case AArch64::ST2Twov2s_POST:
+      case AArch64::ST2Twov4h_POST:
+      case AArch64::ST2Twov4s_POST:
+      case AArch64::ST2Twov8b_POST:
+      case AArch64::ST2Twov8h_POST:
+      case AArch64::ST3Threev16b_POST:
+      case AArch64::ST3Threev2d_POST:
+      case AArch64::ST3Threev2s_POST:
+      case AArch64::ST3Threev4h_POST:
+      case AArch64::ST3Threev4s_POST:
+      case AArch64::ST3Threev8b_POST:
+      case AArch64::ST3Threev8h_POST:
+      case AArch64::ST4Fourv16b_POST:
+      case AArch64::ST4Fourv2d_POST:
+      case AArch64::ST4Fourv2s_POST:
+      case AArch64::ST4Fourv4h_POST:
+      case AArch64::ST4Fourv4s_POST:
+      case AArch64::ST4Fourv8b_POST:
+      case AArch64::ST4Fourv8h_POST:
+      {
+        unsigned int regNo = CurrentInst->Inst.getOperand(0).getReg();
+        Value *val = getReg(CurrentInst->Inst.getOperand(1).getReg());
+        Value *addr = getReg(regNo);
+        Value *loadAddr = Builder->CreateIntToPtr(addr, val->getType()->getPointerTo());
+        Builder->CreateStore(val, loadAddr);
+
+        unsigned int incrementSize = 0;
+
+        switch (Opcode) {
+          default:
+            llvm_unreachable("Instruction not handled");
+            break;
+          case AArch64::ST1Onev16b_POST:
+          case AArch64::ST1Onev2d_POST:
+          case AArch64::ST1Onev4s_POST:
+          case AArch64::ST1Onev8h_POST:
+            incrementSize = 16;
+            break;
+          case AArch64::ST1Onev1d_POST:
+          case AArch64::ST1Onev2s_POST:
+          case AArch64::ST1Onev4h_POST:
+          case AArch64::ST1Onev8b_POST:
+            incrementSize = 8;
+            break;
+
+          case AArch64::ST1Twov16b_POST:
+          case AArch64::ST1Twov2d_POST:
+          case AArch64::ST1Twov4s_POST:
+          case AArch64::ST1Twov8h_POST:
+            incrementSize = 32;
+            break;
+          case AArch64::ST1Twov1d_POST:
+          case AArch64::ST1Twov2s_POST:
+          case AArch64::ST1Twov4h_POST:
+          case AArch64::ST1Twov8b_POST:
+            incrementSize = 16;
+            break;
+
+          case AArch64::ST1Threev16b_POST:
+          case AArch64::ST1Threev2d_POST:
+          case AArch64::ST1Threev4s_POST:
+          case AArch64::ST1Threev8h_POST:
+            incrementSize = 48;
+            break;
+          case AArch64::ST1Threev1d_POST:
+          case AArch64::ST1Threev2s_POST:
+          case AArch64::ST1Threev4h_POST:
+          case AArch64::ST1Threev8b_POST:
+            incrementSize = 24;
+            break;
+
+          case AArch64::ST1Fourv16b_POST:
+          case AArch64::ST1Fourv2d_POST:
+          case AArch64::ST1Fourv4s_POST:
+          case AArch64::ST1Fourv8h_POST:
+            incrementSize = 64;
+            break;
+          case AArch64::ST1Fourv1d_POST:
+          case AArch64::ST1Fourv2s_POST:
+          case AArch64::ST1Fourv4h_POST:
+          case AArch64::ST1Fourv8b_POST:
+            incrementSize = 32;
+            break;
+
+          case AArch64::ST2Twov16b_POST:
+          case AArch64::ST2Twov2d_POST:
+          case AArch64::ST2Twov4s_POST:
+          case AArch64::ST2Twov8h_POST:
+            incrementSize = 32;
+            break;
+
+          case AArch64::ST2Twov2s_POST:
+          case AArch64::ST2Twov4h_POST:
+          case AArch64::ST2Twov8b_POST:
+            incrementSize = 16;
+            break;
+
+          case AArch64::ST3Threev16b_POST:
+          case AArch64::ST3Threev2d_POST:
+          case AArch64::ST3Threev4s_POST:
+          case AArch64::ST3Threev8h_POST:
+            incrementSize = 48;
+            break;
+
+          case AArch64::ST3Threev2s_POST:
+          case AArch64::ST3Threev4h_POST:
+          case AArch64::ST3Threev8b_POST:
+            incrementSize = 24;
+            break;
+
+          case AArch64::ST4Fourv16b_POST:
+          case AArch64::ST4Fourv2d_POST:
+          case AArch64::ST4Fourv4s_POST:
+          case AArch64::ST4Fourv8h_POST:
+            incrementSize = 64;
+            break;
+
+          case AArch64::ST4Fourv2s_POST:
+          case AArch64::ST4Fourv4h_POST:
+          case AArch64::ST4Fourv8b_POST:
+            incrementSize = 32;
+            break;
+        }
+
+        addr = Builder->CreateAdd(addr, Builder->getInt(APInt(addr->getType()->getScalarSizeInBits(), incrementSize)));
+        setReg(regNo, addr);
+        return true;
+      }
+
+      case AArch64::LD1Onev16b:
+      case AArch64::LD1Onev1d:
+      case AArch64::LD1Onev2d:
+      case AArch64::LD1Onev2s:
+      case AArch64::LD1Onev4h:
+      case AArch64::LD1Onev4s:
+      case AArch64::LD1Onev8b:
+      case AArch64::LD1Onev8h:
+      case AArch64::LD1Twov16b:
+      case AArch64::LD1Twov1d:
+      case AArch64::LD1Twov2d:
+      case AArch64::LD1Twov2s:
+      case AArch64::LD1Twov4h:
+      case AArch64::LD1Twov4s:
+      case AArch64::LD1Twov8b:
+      case AArch64::LD1Twov8h:
+      case AArch64::LD1Threev16b:
+      case AArch64::LD1Threev1d:
+      case AArch64::LD1Threev2d:
+      case AArch64::LD1Threev2s:
+      case AArch64::LD1Threev4h:
+      case AArch64::LD1Threev4s:
+      case AArch64::LD1Threev8b:
+      case AArch64::LD1Threev8h:
+      case AArch64::LD1Fourv16b:
+      case AArch64::LD1Fourv1d:
+      case AArch64::LD1Fourv2d:
+      case AArch64::LD1Fourv2s:
+      case AArch64::LD1Fourv4h:
+      case AArch64::LD1Fourv4s:
+      case AArch64::LD1Fourv8b:
+      case AArch64::LD1Fourv8h:
+
+      case AArch64::LD2Twov16b:
+      case AArch64::LD2Twov2d:
+      case AArch64::LD2Twov2s:
+      case AArch64::LD2Twov4h:
+      case AArch64::LD2Twov4s:
+      case AArch64::LD2Twov8b:
+      case AArch64::LD2Twov8h:
+      case AArch64::LD3Threev16b:
+      case AArch64::LD3Threev2d:
+      case AArch64::LD3Threev2s:
+      case AArch64::LD3Threev4h:
+      case AArch64::LD3Threev4s:
+      case AArch64::LD3Threev8b:
+      case AArch64::LD3Threev8h:
+      case AArch64::LD4Fourv16b:
+      case AArch64::LD4Fourv2d:
+      case AArch64::LD4Fourv2s:
+      case AArch64::LD4Fourv4h:
+      case AArch64::LD4Fourv4s:
+      case AArch64::LD4Fourv8b:
+      case AArch64::LD4Fourv8h:
+      {
+        Type *loadType = nullptr;
+
+        unsigned int regNo = CurrentInst->Inst.getOperand(0).getReg();
+        if (regNo >= AArch64::Q0_Q1 && regNo <= AArch64::Q31_Q0) {
+          loadType = IntegerType::get(getGlobalContext(), 256);
+        } else if (regNo >= AArch64::Q0_Q1_Q2 && regNo <= AArch64::Q31_Q0_Q1) {
+          loadType = IntegerType::get(getGlobalContext(), 384);
+        } else if (regNo >= AArch64::Q0_Q1_Q2_Q3 && regNo <= AArch64::Q31_Q0_Q1_Q2) {
+          loadType = IntegerType::get(getGlobalContext(), 512);
+        } else if (regNo >= AArch64::D0_D1 && regNo <= AArch64::D31_D0) {
+          loadType = IntegerType::get(getGlobalContext(), 128);
+        } else if (regNo >= AArch64::D0_D1_D2 && regNo <= AArch64::D31_D0_D1) {
+          loadType = IntegerType::get(getGlobalContext(), 192);
+        } else if (regNo >= AArch64::D0_D1_D2_D3 && regNo <= AArch64::D31_D0_D1_D2) {
+          loadType = IntegerType::get(getGlobalContext(), 256);
+        } else {
+          llvm_unreachable("Registers not handled");
+        }
+
+        loadType = loadType->getPointerTo();
+
+        Value *addr = getReg(CurrentInst->Inst.getOperand(1).getReg());
+        addr = Builder->CreateIntToPtr(addr, loadType);
+
+        Value *val = Builder->CreateLoad(addr);
+        setReg(regNo, val);
+        return true;
+      }
+
+      case AArch64::LD1Onev16b_POST:
+      case AArch64::LD1Onev1d_POST:
+      case AArch64::LD1Onev2d_POST:
+      case AArch64::LD1Onev2s_POST:
+      case AArch64::LD1Onev4h_POST:
+      case AArch64::LD1Onev4s_POST:
+      case AArch64::LD1Onev8b_POST:
+      case AArch64::LD1Onev8h_POST:
+      case AArch64::LD1Twov16b_POST:
+      case AArch64::LD1Twov1d_POST:
+      case AArch64::LD1Twov2d_POST:
+      case AArch64::LD1Twov2s_POST:
+      case AArch64::LD1Twov4h_POST:
+      case AArch64::LD1Twov4s_POST:
+      case AArch64::LD1Twov8b_POST:
+      case AArch64::LD1Twov8h_POST:
+      case AArch64::LD1Threev16b_POST:
+      case AArch64::LD1Threev1d_POST:
+      case AArch64::LD1Threev2d_POST:
+      case AArch64::LD1Threev2s_POST:
+      case AArch64::LD1Threev4h_POST:
+      case AArch64::LD1Threev4s_POST:
+      case AArch64::LD1Threev8b_POST:
+      case AArch64::LD1Threev8h_POST:
+      case AArch64::LD1Fourv16b_POST:
+      case AArch64::LD1Fourv1d_POST:
+      case AArch64::LD1Fourv2d_POST:
+      case AArch64::LD1Fourv2s_POST:
+      case AArch64::LD1Fourv4h_POST:
+      case AArch64::LD1Fourv4s_POST:
+      case AArch64::LD1Fourv8b_POST:
+      case AArch64::LD1Fourv8h_POST:
+      case AArch64::LD2Twov16b_POST:
+      case AArch64::LD2Twov2d_POST:
+      case AArch64::LD2Twov2s_POST:
+      case AArch64::LD2Twov4h_POST:
+      case AArch64::LD2Twov4s_POST:
+      case AArch64::LD2Twov8b_POST:
+      case AArch64::LD2Twov8h_POST:
+      case AArch64::LD3Threev16b_POST:
+      case AArch64::LD3Threev2d_POST:
+      case AArch64::LD3Threev2s_POST:
+      case AArch64::LD3Threev4h_POST:
+      case AArch64::LD3Threev4s_POST:
+      case AArch64::LD3Threev8b_POST:
+      case AArch64::LD3Threev8h_POST:
+      case AArch64::LD4Fourv16b_POST:
+      case AArch64::LD4Fourv2d_POST:
+      case AArch64::LD4Fourv2s_POST:
+      case AArch64::LD4Fourv4h_POST:
+      case AArch64::LD4Fourv4s_POST:
+      case AArch64::LD4Fourv8b_POST:
+      case AArch64::LD4Fourv8h_POST:
+      {
+        Type *loadType = nullptr;
+
+        unsigned int regNo = CurrentInst->Inst.getOperand(1).getReg();
+        if (regNo >= AArch64::Q0_Q1 && regNo <= AArch64::Q31_Q0) {
+          loadType = IntegerType::get(getGlobalContext(), 256);
+        } else if (regNo >= AArch64::Q0_Q1_Q2 && regNo <= AArch64::Q31_Q0_Q1) {
+          loadType = IntegerType::get(getGlobalContext(), 384);
+        } else if (regNo >= AArch64::Q0_Q1_Q2_Q3 && regNo <= AArch64::Q31_Q0_Q1_Q2) {
+          loadType = IntegerType::get(getGlobalContext(), 512);
+        } else if (regNo >= AArch64::D0_D1 && regNo <= AArch64::D31_D0) {
+          loadType = IntegerType::get(getGlobalContext(), 128);
+        } else if (regNo >= AArch64::D0_D1_D2 && regNo <= AArch64::D31_D0_D1) {
+          loadType = IntegerType::get(getGlobalContext(), 192);
+        } else if (regNo >= AArch64::D0_D1_D2_D3 && regNo <= AArch64::D31_D0_D1_D2) {
+          loadType = IntegerType::get(getGlobalContext(), 256);
+        } else {
+          llvm_unreachable("Registers not handled");
+        }
+
+        loadType = loadType->getPointerTo();
+
+        unsigned int loadRegNo = CurrentInst->Inst.getOperand(0).getReg();
+        Value *addr = getReg(loadRegNo);
+        Value *loadAddr = Builder->CreateIntToPtr(addr, loadType);
+
+        Value *val = Builder->CreateLoad(loadAddr);
+        setReg(regNo, val);
+
+        unsigned int incrementSize = 0;
+        switch(Opcode) {
+          default:
+            llvm_unreachable("unhandled instruction");
+            break;
+
+
+          case AArch64::LD1Fourv16b_POST:
+          case AArch64::LD1Fourv2d_POST:
+          case AArch64::LD1Fourv4s_POST:
+          case AArch64::LD1Fourv8h_POST:
+          case AArch64::LD4Fourv16b_POST:
+          case AArch64::LD4Fourv2d_POST:
+          case AArch64::LD4Fourv4s_POST:
+          case AArch64::LD4Fourv8h_POST:
+            incrementSize = 64;
+            break;
+
+          case AArch64::LD1Threev16b_POST:
+          case AArch64::LD1Threev2d_POST:
+          case AArch64::LD1Threev4s_POST:
+          case AArch64::LD1Threev8h_POST:
+          case AArch64::LD3Threev16b_POST:
+          case AArch64::LD3Threev2d_POST:
+          case AArch64::LD3Threev4s_POST:
+          case AArch64::LD3Threev8h_POST:
+            incrementSize = 48;
+            break;
+
+          case AArch64::LD1Fourv1d_POST:
+          case AArch64::LD1Fourv2s_POST:
+          case AArch64::LD1Fourv4h_POST:
+          case AArch64::LD1Fourv8b_POST:
+          case AArch64::LD1Twov16b_POST:
+          case AArch64::LD1Twov2d_POST:
+          case AArch64::LD1Twov4s_POST:
+          case AArch64::LD1Twov8h_POST:
+          case AArch64::LD2Twov16b_POST:
+          case AArch64::LD2Twov2d_POST:
+          case AArch64::LD2Twov4s_POST:
+          case AArch64::LD2Twov8h_POST:
+          case AArch64::LD4Fourv2s_POST:
+          case AArch64::LD4Fourv4h_POST:
+          case AArch64::LD4Fourv8b_POST:
+            incrementSize = 32;
+            break;
+
+          case AArch64::LD1Threev1d_POST:
+          case AArch64::LD1Threev2s_POST:
+          case AArch64::LD1Threev4h_POST:
+          case AArch64::LD1Threev8b_POST:
+          case AArch64::LD3Threev2s_POST:
+          case AArch64::LD3Threev4h_POST:
+          case AArch64::LD3Threev8b_POST:
+            incrementSize = 24;
+            break;
+
+          case AArch64::LD1Twov1d_POST:
+          case AArch64::LD1Twov2s_POST:
+          case AArch64::LD1Twov4h_POST:
+          case AArch64::LD1Twov8b_POST:
+          case AArch64::LD1Onev16b_POST:
+          case AArch64::LD1Onev2d_POST:
+          case AArch64::LD1Onev8h_POST:
+          case AArch64::LD2Twov2s_POST:
+          case AArch64::LD2Twov4h_POST:
+          case AArch64::LD2Twov8b_POST:
+            incrementSize = 16;
+            break;
+
+          case AArch64::LD1Onev1d_POST:
+          case AArch64::LD1Onev2s_POST:
+          case AArch64::LD1Onev4h_POST:
+          case AArch64::LD1Onev4s_POST:
+          case AArch64::LD1Onev8b_POST:
+            incrementSize = 8;
+            break;
+        }
+
+        addr = Builder->CreateAdd(addr, Builder->getInt(APInt(addr->getType()->getScalarSizeInBits(), incrementSize)));
+        setReg(loadRegNo, addr);
+
+        return true;
+      }
+
+      case AArch64::ST1i16:
+      case AArch64::ST1i32:
+      case AArch64::ST1i64:
+      case AArch64::ST1i8:
+      case AArch64::ST2i16:
+      case AArch64::ST2i32:
+      case AArch64::ST2i64:
+      case AArch64::ST2i8:
+      case AArch64::ST3i16:
+      case AArch64::ST3i32:
+      case AArch64::ST3i64:
+      case AArch64::ST3i8:
+      case AArch64::ST4i16:
+      case AArch64::ST4i32:
+      case AArch64::ST4i64:
+      case AArch64::ST4i8:
+      {
+        unsigned int dstRegNo = CurrentInst->Inst.getOperand(2).getReg();
+        unsigned int srcRegNo = CurrentInst->Inst.getOperand(0).getReg();
+        unsigned int index = CurrentInst->Inst.getOperand(1).getImm();
+
+        unsigned int numVectors = 0;
+        unsigned int numElements = 0;
+        Type *elementType = nullptr;
+
+        switch (Opcode) {
+          default:
+            llvm_unreachable("not handled");
+            break;
+          case AArch64::ST1i16:
+            numVectors = 1;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::ST1i32:
+            numVectors = 1;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::ST1i64:
+            numVectors = 1;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::ST1i8:
+            numVectors = 1;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::ST2i16:
+            numVectors = 2;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::ST2i32:
+            numVectors = 2;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::ST2i64:
+            numVectors = 2;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::ST2i8:
+            numVectors = 2;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::ST3i16:
+            numVectors = 3;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::ST3i32:
+            numVectors = 3;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::ST3i64:
+            numVectors = 3;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(),64);
+            break;
+          case AArch64::ST3i8:
+            numVectors = 3;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::ST4i16:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::ST4i32:
+            numVectors = 4;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::ST4i64:
+            numVectors = 4;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::ST4i8:
+            numVectors = 4;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+        }
+
+        Type *srcType = VectorType::get(elementType, numVectors * numElements);
+
+        Value *src = getReg(srcRegNo);
+        src = Builder->CreateBitCast(src, srcType);
+
+        Value *dst = Builder->getInt(APInt(elementType->getScalarSizeInBits() * numVectors, 0));
+        dst = Builder->CreateBitCast(dst, VectorType::get(elementType, numVectors));
+
+        for (unsigned i = 0; i < numVectors; ++i) {
+          Value *elem = Builder->CreateExtractElement(src, (i * numElements) + index);
+          dst = Builder->CreateInsertElement(dst, elem, i);
+        }
+
+        dst = Builder->CreateBitCast(dst, IntegerType::get(getGlobalContext(), elementType->getScalarSizeInBits() * numVectors));
+
+        Value *store = getReg(dstRegNo);
+        Value *storeAddress = Builder->CreateIntToPtr(store, dst->getType()->getPointerTo());
+
+
+        Builder->CreateStore(dst, storeAddress);
+
+        return true;
+      }
+
+      case AArch64::ST1i16_POST:
+      case AArch64::ST1i32_POST:
+      case AArch64::ST1i64_POST:
+      case AArch64::ST1i8_POST:
+      case AArch64::ST2i16_POST:
+      case AArch64::ST2i32_POST:
+      case AArch64::ST2i64_POST:
+      case AArch64::ST2i8_POST:
+      case AArch64::ST3i16_POST:
+      case AArch64::ST3i32_POST:
+      case AArch64::ST3i64_POST:
+      case AArch64::ST3i8_POST:
+      case AArch64::ST4i16_POST:
+      case AArch64::ST4i32_POST:
+      case AArch64::ST4i64_POST:
+      case AArch64::ST4i8_POST:
+      {
+        unsigned int dstRegNo = CurrentInst->Inst.getOperand(2).getReg();
+        unsigned int srcRegNo = CurrentInst->Inst.getOperand(0).getReg();
+        unsigned int index = CurrentInst->Inst.getOperand(1).getImm();
+
+        unsigned int numVectors = 0;
+        unsigned int numElements = 0;
+        Type *elementType = nullptr;
+        unsigned int incrementSize = 0;
+
+        switch (Opcode) {
+          default:
+            llvm_unreachable("not handled");
+            break;
+          case AArch64::ST1i16_POST:
+            numVectors = 1;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 2;
+            break;
+          case AArch64::ST1i32_POST:
+            numVectors = 1;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 4;
+            break;
+          case AArch64::ST1i64_POST:
+            numVectors = 1;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 8;
+            break;
+          case AArch64::ST1i8_POST:
+            numVectors = 1;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 1;
+            break;
+          case AArch64::ST2i16_POST:
+            numVectors = 2;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 4;
+            break;
+          case AArch64::ST2i32_POST:
+            numVectors = 2;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 8;
+            break;
+          case AArch64::ST2i64_POST:
+            numVectors = 2;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 16;
+            break;
+          case AArch64::ST2i8_POST:
+            numVectors = 2;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 2;
+            break;
+          case AArch64::ST3i16_POST:
+            numVectors = 3;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 6;
+            break;
+          case AArch64::ST3i32_POST:
+            numVectors = 3;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 12;
+            break;
+          case AArch64::ST3i64_POST:
+            numVectors = 3;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(),64);
+            incrementSize = 24;
+            break;
+          case AArch64::ST3i8_POST:
+            numVectors = 3;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 3;
+            break;
+          case AArch64::ST4i16_POST:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 8;
+            break;
+          case AArch64::ST4i32_POST:
+            numVectors = 4;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 16;
+            break;
+          case AArch64::ST4i64_POST:
+            numVectors = 4;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 32;
+            break;
+          case AArch64::ST4i8_POST:
+            numVectors = 4;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 4;
+            break;
+        }
+
+        Type *srcType = VectorType::get(elementType, numVectors * numElements);
+
+        Value *src = getReg(srcRegNo);
+        src = Builder->CreateBitCast(src, srcType);
+
+        Value *dst = Builder->getInt(APInt(elementType->getScalarSizeInBits() * numVectors, 0));
+        dst = Builder->CreateBitCast(dst, VectorType::get(elementType, numVectors));
+
+        for (unsigned i = 0; i < numVectors; ++i) {
+          Value *elem = Builder->CreateExtractElement(src, (i * numElements) + index);
+          dst = Builder->CreateInsertElement(dst, elem, i);
+        }
+
+        dst = Builder->CreateBitCast(dst, IntegerType::get(getGlobalContext(), elementType->getScalarSizeInBits() * numVectors));
+
+        Value *store = getReg(dstRegNo);
+        Value *storeAddress = Builder->CreateIntToPtr(store, dst->getType()->getPointerTo());
+
+
+        Builder->CreateStore(dst, storeAddress);
+
+        store = Builder->CreateAdd(store, Builder->getInt(APInt(store->getType()->getScalarSizeInBits(), incrementSize)));
+        setReg(dstRegNo, store);
+
+        return true;
+      }
+      
+      case AArch64::LD2i16:
+      case AArch64::LD2i32:
+      case AArch64::LD2i64:
+      case AArch64::LD2i8:
+      case AArch64::LD3i16:
+      case AArch64::LD3i32:
+      case AArch64::LD3i64:
+      case AArch64::LD3i8:
+      case AArch64::LD4i16:
+      case AArch64::LD4i32:
+      case AArch64::LD4i64:
+      case AArch64::LD4i8:
+      {
+        unsigned int dstRegNo = CurrentInst->Inst.getOperand(0).getReg();
+        unsigned int srcRegNo = CurrentInst->Inst.getOperand(3).getReg();
+        unsigned int index = CurrentInst->Inst.getOperand(2).getImm();
+
+        unsigned int numVectors = 0;
+        unsigned int numElements = 0;
+        Type *elementType = nullptr;
+
+        switch(Opcode) {
+          case AArch64::LD2i16:
+            numVectors = 2;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD2i32:
+            numVectors = 2;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD2i64:
+            numVectors = 2;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD2i8:
+            numVectors = 2;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+
+          case AArch64::LD3i16:
+            numVectors = 3;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD3i32:
+            numVectors = 3;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD3i64:
+            numVectors = 3;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD3i8:
+            numVectors = 3;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+
+          case AArch64::LD4i16:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD4i32:
+            numVectors = 4;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD4i64:
+            numVectors = 4;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD4i8:
+            numVectors = 4;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+        }
+
+        Value *dst = getReg(dstRegNo);
+        Type *dstType = dst->getType();
+        dst = Builder->CreateBitCast(dst, VectorType::get(elementType, numVectors * numElements));
+
+        Value *loadReg = getReg(srcRegNo);
+        Value *loadAddr = Builder->CreateIntToPtr(loadReg, VectorType::get(elementType, numVectors)->getPointerTo());
+
+        Value *load = Builder->CreateLoad(loadAddr);
+
+        for (unsigned i = 0; i < numVectors; ++i) {
+          Value *elem = Builder->CreateExtractElement(load, i);
+          dst = Builder->CreateInsertElement(dst, elem, (i * numElements) + index);
+        }
+        dst = Builder->CreateBitCast(dst, dstType);
+        setReg(dstRegNo, dst);
+
+        return true;
+      }
+
+      case AArch64::LD1Rv16b:
+      case AArch64::LD1Rv1d:
+      case AArch64::LD1Rv2d:
+      case AArch64::LD1Rv2s:
+      case AArch64::LD1Rv4h:
+      case AArch64::LD1Rv4s:
+      case AArch64::LD1Rv8b:
+      case AArch64::LD1Rv8h:
+      case AArch64::LD2Rv16b:
+      case AArch64::LD2Rv1d:
+      case AArch64::LD2Rv2d:
+      case AArch64::LD2Rv2s:
+      case AArch64::LD2Rv4h:
+      case AArch64::LD2Rv4s:
+      case AArch64::LD2Rv8b:
+      case AArch64::LD2Rv8h:
+      case AArch64::LD3Rv16b:
+      case AArch64::LD3Rv1d:
+      case AArch64::LD3Rv2d:
+      case AArch64::LD3Rv2s:
+      case AArch64::LD3Rv4h:
+      case AArch64::LD3Rv4s:
+      case AArch64::LD3Rv8b:
+      case AArch64::LD3Rv8h:
+      case AArch64::LD4Rv16b:
+      case AArch64::LD4Rv1d:
+      case AArch64::LD4Rv2d:
+      case AArch64::LD4Rv2s:
+      case AArch64::LD4Rv4h:
+      case AArch64::LD4Rv4s:
+      case AArch64::LD4Rv8b:
+      case AArch64::LD4Rv8h:
+      {
+        unsigned int srcReg = CurrentInst->Inst.getOperand(1).getReg();
+        unsigned int dstReg = CurrentInst->Inst.getOperand(0).getReg();
+
+        unsigned int numVectors = 0;
+        unsigned int numElements = 0;
+        Type *elementType = nullptr;
+
+        switch (Opcode) {
+          default:
+            llvm_unreachable("not handled");
+            break;
+          case AArch64::LD1Rv16b:
+            numVectors = 1;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::LD1Rv1d:
+            numVectors = 1;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD1Rv2d:
+            numVectors = 1;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD1Rv2s:
+            numVectors = 1;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD1Rv4h:
+            numVectors = 1;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD1Rv4s:
+            numVectors = 1;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD1Rv8b:
+            numVectors = 1;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::LD1Rv8h:
+            numVectors = 1;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD2Rv16b:
+            numVectors = 2;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::LD2Rv1d:
+            numVectors = 2;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD2Rv2d:
+            numVectors = 2;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD2Rv2s:
+            numVectors = 2;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD2Rv4h:
+            numVectors = 2;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD2Rv4s:
+            numVectors = 2;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD2Rv8b:
+            numVectors = 2;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::LD2Rv8h:
+            numVectors = 2;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD3Rv16b:
+            numVectors = 3;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::LD3Rv1d:
+            numVectors = 3;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD3Rv2d:
+            numVectors = 3;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD3Rv2s:
+            numVectors = 3;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD3Rv4h:
+            numVectors = 3;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD3Rv4s:
+            numVectors = 3;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD3Rv8b:
+            numVectors = 3;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::LD3Rv8h:
+            numVectors = 3;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD4Rv16b:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD4Rv1d:
+            numVectors = 4;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD4Rv2d:
+            numVectors = 4;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            break;
+          case AArch64::LD4Rv2s:
+            numVectors = 4;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD4Rv4h:
+            numVectors = 4;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+          case AArch64::LD4Rv4s:
+            numVectors = 4;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            break;
+          case AArch64::LD4Rv8b:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            break;
+          case AArch64::LD4Rv8h:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            break;
+        }
+
+
+        Value *src = getReg(srcReg);
+        Value *srcAddress = Builder->CreateIntToPtr(src, VectorType::get(elementType, numVectors)->getPointerTo());
+        Value *val = Builder->CreateLoad(srcAddress);
+
+        Value *dstVec = Builder->getInt(APInt(numVectors * numElements * elementType->getScalarSizeInBits(), 0));
+        dstVec = Builder->CreateBitCast(dstVec, VectorType::get(elementType, numVectors * numElements));
+
+        for (unsigned i = 0; i < numVectors; ++i) {
+          Value *elem = Builder->CreateExtractElement(val, i);
+
+          for (unsigned j = 0; j < numElements; ++j) {
+            dstVec = Builder->CreateInsertElement(dstVec, elem, (i * numElements) + j);
+          }
+        }
+
+        dstVec = Builder->CreateBitCast(dstVec, IntegerType::get(getGlobalContext(), numVectors * numElements * elementType->getScalarSizeInBits()));
+        setReg(dstReg, dstVec);
+        return true;
+      }
+
+      case AArch64::LD1Rv16b_POST:
+      case AArch64::LD1Rv1d_POST:
+      case AArch64::LD1Rv2d_POST:
+      case AArch64::LD1Rv2s_POST:
+      case AArch64::LD1Rv4h_POST:
+      case AArch64::LD1Rv4s_POST:
+      case AArch64::LD1Rv8b_POST:
+      case AArch64::LD1Rv8h_POST:
+      case AArch64::LD2Rv16b_POST:
+      case AArch64::LD2Rv1d_POST:
+      case AArch64::LD2Rv2d_POST:
+      case AArch64::LD2Rv2s_POST:
+      case AArch64::LD2Rv4h_POST:
+      case AArch64::LD2Rv4s_POST:
+      case AArch64::LD2Rv8b_POST:
+      case AArch64::LD2Rv8h_POST:
+      case AArch64::LD3Rv16b_POST:
+      case AArch64::LD3Rv1d_POST:
+      case AArch64::LD3Rv2d_POST:
+      case AArch64::LD3Rv2s_POST:
+      case AArch64::LD3Rv4h_POST:
+      case AArch64::LD3Rv4s_POST:
+      case AArch64::LD3Rv8b_POST:
+      case AArch64::LD3Rv8h_POST:
+      case AArch64::LD4Rv16b_POST:
+      case AArch64::LD4Rv1d_POST:
+      case AArch64::LD4Rv2d_POST:
+      case AArch64::LD4Rv2s_POST:
+      case AArch64::LD4Rv4h_POST:
+      case AArch64::LD4Rv4s_POST:
+      case AArch64::LD4Rv8b_POST:
+      case AArch64::LD4Rv8h_POST:
+      {
+        unsigned int srcReg = CurrentInst->Inst.getOperand(0).getReg();
+        unsigned int dstReg = CurrentInst->Inst.getOperand(1).getReg();
+
+        unsigned int numVectors = 0;
+        unsigned int numElements = 0;
+        Type *elementType = nullptr;
+        unsigned int incrementSize = 0;
+
+        switch (Opcode) {
+          default:
+            llvm_unreachable("not handled");
+            break;
+          case AArch64::LD1Rv16b_POST:
+            numVectors = 1;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 1;
+            break;
+          case AArch64::LD1Rv1d_POST:
+            numVectors = 1;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 8;
+            break;
+          case AArch64::LD1Rv2d_POST:
+            numVectors = 1;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 8;
+            break;
+          case AArch64::LD1Rv2s_POST:
+            numVectors = 1;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 4;
+            break;
+          case AArch64::LD1Rv4h_POST:
+            numVectors = 1;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 2;
+            break;
+          case AArch64::LD1Rv4s_POST:
+            numVectors = 1;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 4;
+            break;
+          case AArch64::LD1Rv8b_POST:
+            numVectors = 1;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 1;
+            break;
+          case AArch64::LD1Rv8h_POST:
+            numVectors = 1;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 2;
+            break;
+          case AArch64::LD2Rv16b_POST:
+            numVectors = 2;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 2;
+            break;
+          case AArch64::LD2Rv1d_POST:
+            numVectors = 2;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 16;
+            break;
+          case AArch64::LD2Rv2d_POST:
+            numVectors = 2;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 16;
+            break;
+          case AArch64::LD2Rv2s_POST:
+            numVectors = 2;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 8;
+            break;
+          case AArch64::LD2Rv4h_POST:
+            numVectors = 2;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 4;
+            break;
+          case AArch64::LD2Rv4s_POST:
+            numVectors = 2;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 8;
+            break;
+          case AArch64::LD2Rv8b_POST:
+            numVectors = 2;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 2;
+            break;
+          case AArch64::LD2Rv8h_POST:
+            numVectors = 2;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 4;
+            break;
+          case AArch64::LD3Rv16b_POST:
+            numVectors = 3;
+            numElements = 16;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 3;
+            break;
+          case AArch64::LD3Rv1d_POST:
+            numVectors = 3;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 24;
+            break;
+          case AArch64::LD3Rv2d_POST:
+            numVectors = 3;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 24;
+            break;
+          case AArch64::LD3Rv2s_POST:
+            numVectors = 3;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 12;
+            break;
+          case AArch64::LD3Rv4h_POST:
+            numVectors = 3;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 6;
+            break;
+          case AArch64::LD3Rv4s_POST:
+            numVectors = 3;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 12;
+            break;
+          case AArch64::LD3Rv8b_POST:
+            numVectors = 3;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 3;
+            break;
+          case AArch64::LD3Rv8h_POST:
+            numVectors = 3;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 6;
+            break;
+          case AArch64::LD4Rv16b_POST:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 4;
+            break;
+          case AArch64::LD4Rv1d_POST:
+            numVectors = 4;
+            numElements = 1;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 32;
+            break;
+          case AArch64::LD4Rv2d_POST:
+            numVectors = 4;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 64);
+            incrementSize = 32;
+            break;
+          case AArch64::LD4Rv2s_POST:
+            numVectors = 4;
+            numElements = 2;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 16;
+            break;
+          case AArch64::LD4Rv4h_POST:
+            numVectors = 4;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 8;
+            break;
+          case AArch64::LD4Rv4s_POST:
+            numVectors = 4;
+            numElements = 4;
+            elementType = IntegerType::get(getGlobalContext(), 32);
+            incrementSize = 16;
+            break;
+          case AArch64::LD4Rv8b_POST:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 8);
+            incrementSize = 4;
+            break;
+          case AArch64::LD4Rv8h_POST:
+            numVectors = 4;
+            numElements = 8;
+            elementType = IntegerType::get(getGlobalContext(), 16);
+            incrementSize = 8;
+            break;
+        }
+
+
+        Value *src = getReg(srcReg);
+        Value *srcAddress = Builder->CreateIntToPtr(src, VectorType::get(elementType, numVectors)->getPointerTo());
+        Value *val = Builder->CreateLoad(srcAddress);
+
+        Value *dstVec = Builder->getInt(APInt(numVectors * numElements * elementType->getScalarSizeInBits(), 0));
+        dstVec = Builder->CreateBitCast(dstVec, VectorType::get(elementType, numVectors * numElements));
+
+        for (unsigned i = 0; i < numVectors; ++i) {
+          Value *elem = Builder->CreateExtractElement(val, i);
+
+          for (unsigned j = 0; j < numElements; ++j) {
+            dstVec = Builder->CreateInsertElement(dstVec, elem, (i * numElements) + j);
+          }
+        }
+
+        dstVec = Builder->CreateBitCast(dstVec, IntegerType::get(getGlobalContext(), numVectors * numElements * elementType->getScalarSizeInBits()));
+        setReg(dstReg, dstVec);
+
+        src = Builder->CreateAdd(src, Builder->getInt(APInt(src->getType()->getScalarSizeInBits(), incrementSize)));
+        setReg(srcReg, src);
+
+        return true;
+      }
diff --git a/lib/Target/AArch64/DC/LLVMBuild.txt b/lib/Target/AArch64/DC/LLVMBuild.txt
new file mode 100644
index 0000000..fff4daa
--- /dev/null
+++ b/lib/Target/AArch64/DC/LLVMBuild.txt
@@ -0,0 +1,23 @@
+;===- ./lib/Target/X86/DC/LLVMBuild.txt ------------------------*- Conf -*--===;
+;
+;                     The LLVM Compiler Infrastructure
+;
+; This file is distributed under the University of Illinois Open Source
+; License. See LICENSE.TXT for details.
+;
+;===------------------------------------------------------------------------===;
+;
+; This is an LLVMBuild description file for the components in this subdirectory.
+;
+; For more information on the LLVMBuild system, please see:
+;
+;   http://llvm.org/docs/LLVMBuild.html
+;
+;===------------------------------------------------------------------------===;
+
+[component_0]
+type = Library
+name = AArch64DC
+parent = AArch64
+required_libraries = DC MC Support AArch64Info
+add_to_library_groups = AArch64
diff --git a/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
index db9fb0e..f7c120d 100644
--- a/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -1570,16 +1570,18 @@ static DecodeStatus DecodeWSeqPairsClassRegisterClass(MCInst &Inst,
                                                       unsigned RegNo,
                                                       uint64_t Addr,
                                                       const void *Decoder) {
-  return DecodeGPRSeqPairsClassRegisterClass(Inst, 
-                                             AArch64::WSeqPairsClassRegClassID,
-                                             RegNo, Addr, Decoder);
+//  return DecodeGPRSeqPairsClassRegisterClass(Inst,
+//                                             AArch64::WSeqPairsClassRegClassID,
+//                                             RegNo, Addr, Decoder);
+    return Fail;
 }
 
 static DecodeStatus DecodeXSeqPairsClassRegisterClass(MCInst &Inst,
                                                       unsigned RegNo,
                                                       uint64_t Addr,
                                                       const void *Decoder) {
-  return DecodeGPRSeqPairsClassRegisterClass(Inst, 
-                                             AArch64::XSeqPairsClassRegClassID,
-                                             RegNo, Addr, Decoder);
+//  return DecodeGPRSeqPairsClassRegisterClass(Inst,
+//                                             AArch64::XSeqPairsClassRegClassID,
+//                                             RegNo, Addr, Decoder);
+    return Fail;
 }
diff --git a/lib/Target/AArch64/LLVMBuild.txt b/lib/Target/AArch64/LLVMBuild.txt
index 642c183..f1fcbac 100644
--- a/lib/Target/AArch64/LLVMBuild.txt
+++ b/lib/Target/AArch64/LLVMBuild.txt
@@ -16,7 +16,7 @@
 ;===------------------------------------------------------------------------===;
 
 [common]
-subdirectories = AsmParser Disassembler InstPrinter MCTargetDesc TargetInfo Utils
+subdirectories = AsmParser Disassembler InstPrinter MCTargetDesc TargetInfo Utils DC
 
 [component_0]
 type = TargetGroup
diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
index 9f7bed0..5091615 100644
--- a/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
+++ b/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
@@ -11,11 +11,13 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include <llvm/ADT/StringExtras.h>
 #include "AArch64MCTargetDesc.h"
 #include "AArch64ELFStreamer.h"
 #include "AArch64MCAsmInfo.h"
 #include "InstPrinter/AArch64InstPrinter.h"
 #include "llvm/MC/MCCodeGenInfo.h"
+#include "llvm/MC/MCInstrAnalysis.h"
 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCStreamer.h"
@@ -34,6 +36,73 @@ using namespace llvm;
 #define GET_REGINFO_MC_DESC
 #include "AArch64GenRegisterInfo.inc"
 
+namespace llvm {
+    namespace AArch64 {
+        class AArch64MMCInstrAnalysis : public MCInstrAnalysis {
+        public:
+            AArch64MMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) { };
+
+            virtual bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
+                                        uint64_t &Target) const {
+                switch (Inst.getOpcode()) {
+                    case AArch64::Bcc: {
+                        int64_t Offset = Inst.getOperand(1).getImm() * 4;
+                        Target = Addr + Offset;
+                        return true;
+                    }
+                    case AArch64::B: {
+                        int64_t Offset = Inst.getOperand(0).getImm() * 4;
+                        Target = Addr + Offset;
+                        return true;
+                    }
+                    case AArch64::CBNZW:
+                    case AArch64::CBNZX:
+                    case AArch64::CBZW:
+                    case AArch64::CBZX: {
+                        int64_t Offset = Inst.getOperand(1).getImm() * 4;
+                        Target = Addr + Offset;
+                        return true;
+                    }
+                    case AArch64::TBZW:
+                    case AArch64::TBZX:
+                    case AArch64::TBNZW:
+                    case AArch64::TBNZX: {
+                        int64_t Offset = Inst.getOperand(2).getImm() * 4;
+                        Target = Addr + Offset;
+                        return true;
+                    }
+                    case AArch64::BL: {
+                        int64_t Offset = Inst.getOperand(0).getImm() * 4;
+                        Target = Addr + Offset;
+                        return true;
+                    }
+                    case AArch64::BLR: {
+//                        errs() << "Branch Link Register: " << utohexstr(Addr) << "\n";
+//                        llvm_unreachable("Can't identify target for BLR!?");
+                        return false;
+                    }
+                    case AArch64::BR: {
+//                        errs() << "Branch Register: " << utohexstr(Addr) << "\n";
+                    }
+
+                }
+                return MCInstrAnalysis::evaluateBranch(Inst, Addr, Size, Target);
+            }
+            virtual bool isCall(const MCInst &Inst) const {
+                switch (Inst.getOpcode()) {
+                    case AArch64::BL: {
+                        return true;
+                    }
+                    case AArch64::BLR: {
+                        return true;
+                    }
+                }
+                return false;
+            }
+        };
+    }
+}
+
 static MCInstrInfo *createAArch64MCInstrInfo() {
   MCInstrInfo *X = new MCInstrInfo();
   InitAArch64MCInstrInfo(X);
@@ -132,6 +201,11 @@ static MCStreamer *createMachOStreamer(MCContext &Ctx, MCAsmBackend &TAB,
                              /*LabelSections*/ true);
 }
 
+static MCInstrAnalysis *createAArch64MCInstrAnalysis(const MCInstrInfo *Info) {
+//  return new MCInstrAnalysis(Info);
+    return new llvm::AArch64::AArch64MMCInstrAnalysis(Info);
+}
+
 // Force static initialization.
 extern "C" void LLVMInitializeAArch64TargetMC() {
   for (Target *T :
@@ -167,6 +241,9 @@ extern "C" void LLVMInitializeAArch64TargetMC() {
                                               createAArch64AsmTargetStreamer);
     // Register the MCInstPrinter.
     TargetRegistry::RegisterMCInstPrinter(*T, createAArch64MCInstPrinter);
+
+    // Register the MC instruction analyzer.
+    TargetRegistry::RegisterMCInstrAnalysis(*T, createAArch64MCInstrAnalysis);
   }
 
   // Register the asm backend.
diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h b/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
index 3423844..302f328 100644
--- a/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
+++ b/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
@@ -76,6 +76,7 @@ MCTargetStreamer *createAArch64ObjectTargetStreamer(MCStreamer &S,
 // Defines symbolic names for the AArch64 instructions.
 //
 #define GET_INSTRINFO_ENUM
+#define GET_INSTRINFO_OPERAND_TYPES_ENUM
 #include "AArch64GenInstrInfo.inc"
 
 #define GET_SUBTARGETINFO_ENUM
diff --git a/lib/Target/X86/DC/X86InstrSema.h b/lib/Target/X86/DC/X86InstrSema.h
index dc31215..eb044fc 100644
--- a/lib/Target/X86/DC/X86InstrSema.h
+++ b/lib/Target/X86/DC/X86InstrSema.h
@@ -43,6 +43,7 @@ public:
   void translateTargetOpcode();
   void translateCustomOperand(unsigned OperandType, unsigned MIOperandNo);
   void translateImplicit(unsigned RegNo);
+    virtual void translateTargetIntrinsic(unsigned IntrinsicID) { llvm_unreachable("Not implemented");}
 
   bool translateTargetInst();
 
diff --git a/tools/llvm-dec/CMakeLists.txt b/tools/llvm-dec/CMakeLists.txt
index 8e78a19..71e5903 100644
--- a/tools/llvm-dec/CMakeLists.txt
+++ b/tools/llvm-dec/CMakeLists.txt
@@ -7,4 +7,6 @@ set(LLVM_LINK_COMPONENTS
 
 add_llvm_tool(llvm-dec
   llvm-dec.cpp
+  FunctionNamePass.cpp
+  TailCallPass.cpp
   )
diff --git a/tools/llvm-dec/FunctionNamePass.cpp b/tools/llvm-dec/FunctionNamePass.cpp
new file mode 100644
index 0000000..d5aa0e3
--- /dev/null
+++ b/tools/llvm-dec/FunctionNamePass.cpp
@@ -0,0 +1,470 @@
+#include <llvm/IR/Module.h>
+#include "FunctionNamePass.h"
+#include <system_error>
+#include <llvm/MC/MCInst.h>
+#include "llvm/Support/LEB128.h"
+#include "llvm/Support/Debug.h"
+#include <sstream>
+#include <llvm/ADT/StringExtras.h>
+#include "llvm/Analysis/CallGraph.h"
+#include <vector>
+#include <llvm/IR/LegacyPassManager.h>
+#include <llvm/IR/LLVMContext.h>
+#include "llvm/Object/ObjectiveCFile.h"
+
+#define DEBUG_TYPE "func_name_pass"
+
+using namespace llvm;
+using namespace object;
+
+enum AArch64Instruction {
+    NOP = 738,
+    LDR = 1107,
+    LDRX = 1112,
+    BR = 127,
+    ADRP = 83
+};
+
+static char ID;
+FunctionNamePass::FunctionNamePass(object::MachOObjectFile *MachO, std::unique_ptr<MCDisassembler> &DisAsm) :
+        ModulePass(ID), MachO(MachO), DisAsm(DisAsm) {
+    resolveSymbols();
+
+    ObjectiveCFile C(MachO);
+    FunctionNamesMap_t ObjectiveCFunctionNames = C.getFunctionNames();
+    FunctionNames.insert(ObjectiveCFunctionNames.begin(), ObjectiveCFunctionNames.end());
+}
+
+bool FunctionNamePass::runOnModule(Module &M) {
+
+    std::vector<std::string> FunctionsToReplace;
+    for (StubToLocalMap_t::iterator it = StubToLocal.begin(); it != StubToLocal.end(); ++it) {
+        FunctionsToReplace.push_back("fn_" + utohexstr(it->first));
+        errs() << "Replace calls to: fn_" <<utohexstr(it->first) << "\n";
+    }
+
+
+
+    CallGraph CG(M);
+    for (Module::FunctionListType::iterator F_it = M.getFunctionList().begin();
+         F_it != M.getFunctionList().end(); ++F_it) {
+        CallGraphNode *CGN = CG.getOrInsertFunction(F_it);
+        for (CallGraphNode::iterator i = CGN->begin(); i != CGN->end(); ++i) {
+            if (!i->second->getFunction())
+                continue;
+            std::vector<std::string>::iterator X = std::find(FunctionsToReplace.begin(), FunctionsToReplace.end(), i->second->getFunction()->getName().str());
+            if (X != FunctionsToReplace.end()) {
+                Value &V = *i->first;
+                if (CallInst *Call = dyn_cast<CallInst>(&V)) {
+                    StringRef FName = Call->getCalledFunction()->getName().substr(3);
+
+                    std::stringstream ss;
+                    ss << std::hex << FName.str();
+                    uint64_t Addr;
+                    ss >> Addr;
+                    if (Addr) {
+                        uint64_t R = StubToLocal[Addr];
+                        StringRef RName = "fn_" + utohexstr(R);
+                        DEBUG(errs() << "Replace " << Call->getCalledFunction()->getName() << " with " << RName << "\n");
+                        Function *F = M.getFunction(RName);
+                        assert(F);
+                        Call->setCalledFunction(F);
+                    }
+                } else {
+                    llvm_unreachable("This should not happen...");
+                }
+
+            }
+        }
+    }
+
+
+    for (Module::FunctionListType::iterator F_it = M.getFunctionList().begin();
+            F_it != M.getFunctionList().end(); ++F_it) {
+        StringRef Name = F_it->getName();
+        StringRef Address = Name.substr(3);
+        uint64_t A;
+
+        //TODO: Maybe use a StringRef function here...
+        std::stringstream ss;
+        ss << std::hex << Address.str();
+        ss >> A;
+
+        if (A) {
+            if (FunctionNames.find(A) != FunctionNames.end()) {
+                DEBUG(errs() << "Change fn_" << utohexstr(A) << " to " << FunctionNames[A] << "\n");
+                F_it->setName(FunctionNames[A]);
+
+            }
+        } else {
+            errs() << "Can't convert int: " << Address << "\n";
+        }
+    }
+
+
+    for (Module::iterator F_it = M.begin(); F_it != M.end(); ++F_it) {
+        for (Function::iterator BB_it = F_it->begin(); BB_it != F_it->end(); ++BB_it) {
+            StringRef BBName = BB_it->getName().substr(3);
+            if (!BBName.endswith("_call"))
+                continue;
+            BBName = BBName.substr(0, BBName.size() - 5);
+            std::stringstream ss;
+            ss << std::hex << BBName.str();
+            uint64_t Addr;
+            ss >> Addr;
+
+            StringRef Name;
+
+            if (Addr) {
+                assert(true);
+                if (FunctionNames[Addr].size()) {
+                    Name = FunctionNames[Addr];
+                } else if (StubToLocal[Addr]) {
+
+                }
+            }
+
+            if (!Name.size()) {
+                //TODO: check what happens here...
+                continue;
+            }
+
+            for (BasicBlock::iterator I_it = BB_it->begin(); I_it != BB_it->end(); ++I_it) {
+                if (I_it->getOpcode() == Instruction::Call) {
+                    if (CallInst *Call = dyn_cast<CallInst>(&*I_it)) {
+                        if (Call->getCalledFunction() == nullptr) {
+                            assert(true);
+                            Function *F_Replace = M.getFunction(Name);
+                            if (!F_Replace) {
+                                F_Replace = dyn_cast<Function>(M.getOrInsertFunction(Name, Type::getVoidTy(getGlobalContext()), M.getTypeByName("regset")->getPointerTo(),
+                                                      nullptr));
+                                assert(F_Replace);
+                            }
+                            if (!F_Replace->isDeclaration())
+                                continue;
+                            DEBUG(errs() << "Replace " << BB_it->getName() << " -> " << F_Replace->getName() << "\n");
+                            Call->setCalledFunction(F_Replace);
+                        }
+                    }
+                }
+            }
+        }
+    }
+
+    return false;
+}
+
+void FunctionNamePass::resolveSymbols() {
+    bool hasStubsSection = false;
+    SectionRef StubsSection;
+    SectionRef StubHelperSection;
+    SectionRef LazyPtrSection;
+    SectionRef TextSection;
+
+    for (section_iterator i = MachO->section_begin(); i != MachO->section_end(); ++i) {
+
+        StringRef Name;
+        i->getName(Name);
+
+        if (Name == "__stubs") {
+            StubsSection = *i;
+            hasStubsSection = true;
+        } else if (Name == "__stub_helper") {
+            StubHelperSection = *i;
+        } else if (Name == "__la_symbol_ptr") {
+            LazyPtrSection = *i;
+        } else if (Name == "__text") {
+            TextSection = *i;
+        }
+    }
+
+
+    if (!hasStubsSection) {
+        return;
+    }
+
+    StringRef StubsBytesStr;
+
+    StubsSection.getContents(StubsBytesStr);
+    uint64_t StubsAddress = StubsSection.getAddress();
+
+    ArrayRef<uint8_t> StubsBytes(reinterpret_cast<const uint8_t *>(StubsBytesStr.data()),
+                                 StubsBytesStr.size());
+
+    StringRef LazyPtrBytesStr;
+    LazyPtrSection.getContents(LazyPtrBytesStr);
+    ArrayRef<uint8_t> LazyPtrBytes(reinterpret_cast<const uint8_t *>(LazyPtrBytesStr.data()),
+                                   LazyPtrBytesStr.size());
+
+    StringRef StubHelperBytesStr;
+    StubHelperSection.getContents(StubHelperBytesStr);
+
+    ArrayRef<uint8_t> StubHelperBytes(reinterpret_cast<const uint8_t *>(StubHelperBytesStr.data()),
+                                      StubHelperBytesStr.size());
+
+    uint64_t TextSectionAddress = TextSection.getAddress();
+    uint64_t TextSectionSize = TextSection.getSize();
+
+    ArrayRef<uint8_t> LazyBindInfoOpcodes = MachO->getDyldInfoLazyBindOpcodes();
+
+    uint64_t SectionAddress = StubsSection.getAddress();
+
+    uint64_t StubsSectionSize = StubsSection.getSize();
+
+    for (uint64_t Index = 0; Index < StubsSectionSize; Index += 4) {
+        uint64_t  StubAddress = StubsSection.getAddress();
+        StubAddress += Index;
+        MCInst NOP;
+        uint64_t NOPSize;
+
+        if (StubAddress >= 0x1003FF0A4) {
+            assert(true);
+        }
+
+        if (DisAsm->getInstruction(NOP, NOPSize, StubsBytes.slice(Index),
+                                   SectionAddress + Index, nulls(),
+                                   nulls()) == 3 ) {
+
+        } else {
+            llvm_unreachable("Something went wrong");
+        }
+
+        uint64_t LazyPtrAddress = 0;
+        if (NOP.getOpcode() == AArch64Instruction::NOP) {
+
+            assert(NOP.getOpcode() == AArch64Instruction::NOP && NOPSize == 4);
+            Index += 4;
+
+            MCInst LDR;
+            uint64_t LDRSize;
+            if (DisAsm->getInstruction(LDR, LDRSize, StubsBytes.slice(Index),
+                                       SectionAddress + Index, nulls(),
+                                       nulls()) == 3) {
+
+            } else {
+                llvm_unreachable("Something went wrong");
+            }
+            assert(LDR.getOpcode() == AArch64Instruction::LDR && LDRSize == 4);
+            Index += 4;
+
+            MCInst BR;
+            uint64_t BRSize;
+            if (DisAsm->getInstruction(BR, BRSize, StubsBytes.slice(Index),
+                                       SectionAddress + Index, nulls(),
+                                       nulls()) == 3) {
+
+            } else {
+                llvm_unreachable("Something went wrong");
+            }
+
+            assert(BR.getOpcode() == AArch64Instruction::BR && BRSize == 4);
+
+            LazyPtrAddress = SectionAddress + Index - 4 + (LDR.getOperand(1).getImm() * 4);
+        } else if (NOP.getOpcode() == AArch64Instruction::ADRP) {
+
+            int32_t pageAddress = NOP.getOperand(1).getImm();
+            pageAddress = pageAddress & 0x200000 ? pageAddress | 0xFFE00000 : pageAddress;
+            uint64_t base = ((SectionAddress + Index) & ~0xFFF) + (pageAddress << 12);
+
+            Index += 4;
+
+            MCInst LDR;
+            uint64_t LDRSize;
+            if (DisAsm->getInstruction(LDR, LDRSize, StubsBytes.slice(Index),
+                                       SectionAddress + Index, nulls(),
+                                       nulls()) == 3) {
+
+            } else {
+                llvm_unreachable("Something went wrong");
+            }
+            assert(LDR.getOpcode() == AArch64Instruction::LDRX && LDRSize == 4);
+            Index += 4;
+
+            MCInst BR;
+            uint64_t BRSize;
+            if (DisAsm->getInstruction(BR, BRSize, StubsBytes.slice(Index),
+                                       SectionAddress + Index, nulls(),
+                                       nulls()) == 3) {
+
+            } else {
+                llvm_unreachable("Something went wrong");
+            }
+
+            assert(BR.getOpcode() == AArch64Instruction::BR && BRSize == 4);
+
+            LazyPtrAddress = base + (LDR.getOperand(2).getImm() * 8);
+        } else {
+            assert(false);
+        }
+
+
+        uint64_t LazyPtrSectionAddress = LazyPtrSection.getAddress();
+        uint64_t LazyPtrSectionSize = LazyPtrSection.getSize();
+        assert(LazyPtrAddress >= LazyPtrSectionAddress && LazyPtrAddress <= LazyPtrSectionAddress + LazyPtrSectionSize);
+
+        uint64_t LazyPtrSectionIndex = LazyPtrAddress - LazyPtrSectionAddress;
+
+        uint64_t LazyPtr = *((uint64_t *)LazyPtrBytes.slice(LazyPtrSectionIndex, 8).data());
+
+        uint64_t StubHelperSectionAddress = StubHelperSection.getAddress();
+        uint64_t StubHelperSectionSize = StubHelperSection.getSize();
+        if (!(LazyPtr >= StubHelperSectionAddress && LazyPtr <= (StubHelperSectionAddress + StubHelperSectionSize))) {
+            if (LazyPtr >= TextSectionAddress && LazyPtr <= (TextSectionAddress + TextSectionSize)) {
+                StubToLocal[StubAddress] = LazyPtr;
+                DEBUG(errs() << "Stub: " << utohexstr(StubAddress) << " -> " << utohexstr(LazyPtr) << "\n");
+            }
+            if (LazyPtr == 0) {
+
+                auto getSegment = [&](uint64_t SegmentNo) {
+                    uint64_t Idx = 0;
+                    MachO::segment_command_64 segment;
+                    for(object::MachOObjectFile::load_command_iterator L_it = MachO->begin_load_commands();
+                        L_it != MachO->end_load_commands(); ++L_it) {
+                        if (L_it->C.cmd == MachO::LC_SEGMENT_64) {
+                            if (Idx == SegmentNo) {
+                                segment = MachO->getSegment64LoadCommand(*L_it);
+                                break;
+                            } else {
+                                Idx++;
+                            }
+                        }
+                    }
+                    return segment;
+                };
+
+                ArrayRef<uint8_t> BindOpcodes = MachO->getDyldInfoWeakBindOpcodes();
+
+                uint64_t SegmentNo = 0;
+                int64_t Offset = 0;
+                StringRef SymbolName;
+
+                bool print = false;
+
+                for (unsigned Idx = 0; Idx < BindOpcodes.size();) {
+                    unsigned Opcode = *BindOpcodes.slice(Idx).data();
+
+                    if ((Opcode & ~0xF) == MachO::BIND_OPCODE_SET_DYLIB_ORDINAL_IMM) {
+                        unsigned Imm = Opcode & 0xF;
+                        Idx++;
+                    } else if ((Opcode & ~0xF) == MachO::BIND_OPCODE_SET_SYMBOL_TRAILING_FLAGS_IMM) {
+                        Idx++;
+                        SymbolName = (const char*)BindOpcodes.slice(Idx).data();
+                        Idx += SymbolName.size() + 1;
+                    } else if (Opcode == (MachO::BIND_OPCODE_SET_TYPE_IMM | 0x1)) {
+                        //Set type pointer
+                        Idx++;
+                    } else if ((Opcode & ~0xF) == MachO::BIND_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB) {
+                        SegmentNo = Opcode & 0xF;
+                        Idx++;
+                        unsigned n;
+                        Offset = decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+                        Idx += n;
+                    } else if (Opcode == MachO::BIND_OPCODE_DO_BIND) {
+                        MachO::segment_command_64 Segment = getSegment(SegmentNo);
+
+                        if (print) {
+                            errs() << utohexstr(Segment.vmaddr + Offset) << "\n";
+                        }
+                        if (Segment.vmaddr + Offset == LazyPtrAddress) {
+                            FunctionNames[StubAddress] = SymbolName.substr(1);
+                            break;
+                        }
+                        //FIXME: is this add correct???
+                        Offset += 8;
+                        Idx++;
+                    } else if (Opcode == MachO::BIND_OPCODE_ADD_ADDR_ULEB) {
+                        Idx++;
+                        unsigned n;
+                        Offset += decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+                        Idx += n;
+                    } else if ((Opcode & ~0xF) == MachO::BIND_OPCODE_DO_BIND_ADD_ADDR_IMM_SCALED) {
+                        unsigned Scaled = (Opcode & 0xF) * 8;
+                        //FIXME: again the add of 8
+                        Offset += Scaled + 8;
+                        Idx++;
+                    } else if (Opcode == MachO::BIND_OPCODE_DO_BIND_ULEB_TIMES_SKIPPING_ULEB) {
+                        //TODO:
+                        Idx++;
+                        unsigned n;
+                        uint64_t Count = decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+                        Idx += n;
+                        n = 0;
+                        uint64_t Skip = decodeULEB128(BindOpcodes.slice(Idx).data(), &n);
+                        for (unsigned i = 0; i < Count; ++i) {
+                            Offset += 8 + Skip;
+                        }
+                        Idx += n;
+                    } else if (Opcode == MachO::BIND_OPCODE_DO_BIND_ADD_ADDR_ULEB) {
+                        Idx++;
+                        unsigned n;
+                        Offset += decodeULEB128(BindOpcodes.slice(Idx).data(), &n) + 8;
+                        Idx += n;
+                    } else if (Opcode == MachO::BIND_OPCODE_DONE) {
+                        break;
+                    } else if (Opcode == MachO::BIND_OPCODE_SET_DYLIB_ORDINAL_ULEB) {
+                        Idx++;
+                        unsigned n;
+                        uint64_t dylib = decodeULEB128(BindOpcodes.slice(Idx).data(), &n) + 8;
+                        Idx += n;
+                    } else if (Opcode == MachO::BIND_OPCODE_SET_ADDEND_SLEB) {
+                        Idx++;
+                        unsigned n;
+                        uint64_t addend = decodeSLEB128(BindOpcodes.slice(Idx).data(), &n);
+                        Idx += n;
+                    } else {
+                        errs() << "0X" << utohexstr(Idx) << "\n";
+                        errs() << "0x" << utohexstr(Opcode) << "\n";
+                        assert(false);
+                    }
+                }
+            }
+            continue;
+        }
+
+        uint64_t LazyPtrIndex = StubHelperSection.getAddress();
+        LazyPtrIndex = LazyPtr - LazyPtrIndex;
+
+        MCInst LazyLDR;
+        uint64_t LazyLDRSize;
+        if (DisAsm->getInstruction(LazyLDR, LazyLDRSize, StubHelperBytes.slice(LazyPtrIndex),
+                                   StubHelperSectionAddress + LazyPtrIndex, nulls(),
+                                   nulls()) == 3 ) {
+
+        } else {
+            llvm_unreachable("Something went wrong");
+        }
+        int64_t Offset = LazyLDR.getOperand(1).getImm() * 4;
+        uint32_t ID = *((uint32_t *)StubHelperBytes.slice(LazyPtrIndex + Offset).data());
+
+        const uint8_t *LazyBindInfoElement = LazyBindInfoOpcodes.slice(ID).data();
+        StringRef SymbolName;
+        while (1) {
+            int8_t  Val = *LazyBindInfoElement;
+            if ((Val & 0x70) == 0x70) {
+                LazyBindInfoElement++;
+                unsigned n = 0;
+                decodeULEB128(LazyBindInfoElement, &n);
+                LazyBindInfoElement += n;
+            } else if ((Val & 0x10) == 0x10) {
+                LazyBindInfoElement++;
+            } else if ((Val & 0x20) == 0x20) {
+                LazyBindInfoElement++;
+                unsigned n = 0;
+                decodeULEB128(LazyBindInfoElement, &n);
+                LazyBindInfoElement += n;
+            } else if ((Val & 0x40) == 0x40) {
+                LazyBindInfoElement++;
+                SymbolName = StringRef((char*)LazyBindInfoElement);
+                break;
+            } else {
+                errs().write_hex(Val);
+                llvm_unreachable("");
+            }
+        }
+        DEBUG(errs() << "Resolved Symbol \""<< SymbolName << "\": ");
+        DEBUG(errs().write_hex(StubAddress));
+        DEBUG(errs() << "\n");
+        //Skipe the first '_'
+        FunctionNames[StubAddress] = SymbolName.substr(1);
+    }
+}
diff --git a/tools/llvm-dec/FunctionNamePass.h b/tools/llvm-dec/FunctionNamePass.h
new file mode 100644
index 0000000..d926d00
--- /dev/null
+++ b/tools/llvm-dec/FunctionNamePass.h
@@ -0,0 +1,34 @@
+#ifndef LLVM_FUNCTIONNAMEPASS_H
+#define LLVM_FUNCTIONNAMEPASS_H
+
+#include <llvm/MC/MCDisassembler.h>
+#include "llvm/Pass.h"
+#include "llvm/IR/Function.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Object/ObjectFile.h"
+#include "llvm/Object/MachO.h"
+#include <map>
+
+namespace llvm {
+
+    class FunctionNamePass : public ModulePass {
+
+    public:
+        FunctionNamePass(object::MachOObjectFile *MachO, std::unique_ptr<MCDisassembler> &DisAsm);
+
+        virtual bool runOnModule(Module &M) override;
+
+        typedef std::map<uint64_t, uint64_t> StubToLocalMap_t;
+    private:
+        typedef std::map<uint64_t, std::string> FunctionNamesMap_t;
+
+        object::MachOObjectFile *MachO;
+
+        void resolveSymbols();
+        std::unique_ptr<MCDisassembler> &DisAsm;
+        FunctionNamesMap_t FunctionNames;
+        StubToLocalMap_t StubToLocal;
+    };
+}
+
+#endif //LLVM_FUNCTIONNAMEPASS_H
diff --git a/tools/llvm-dec/TailCallPass.cpp b/tools/llvm-dec/TailCallPass.cpp
new file mode 100644
index 0000000..5b2f33e
--- /dev/null
+++ b/tools/llvm-dec/TailCallPass.cpp
@@ -0,0 +1,145 @@
+#include "TailCallPass.h"
+#include "llvm/IR/Module.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/IR/IRBuilder.h"
+
+#include <sstream>
+#include <llvm/ADT/StringExtras.h>
+#include <set>
+
+using namespace llvm;
+
+static char ID;
+
+TailCallPass::TailCallPass(MCObjectDisassembler::AddressSetTy functionStarts) : ModulePass(ID) {
+    this->functionStarts = functionStarts;
+
+    std::sort(this->functionStarts.begin(), this->functionStarts.end());
+}
+
+bool TailCallPass::runOnModule(Module &M) {
+
+    auto getFunctionAddress = [&](StringRef name) {
+        uint64_t addr = 0;
+        if (name.size() != 12) {
+        } else {
+
+            StringRef addrStr = name.substr(name.size() - 9);
+
+            if (addrStr.size() == 9) {
+                std::stringstream ss;
+                ss << std::hex << addrStr.str();
+                ss >> addr;
+            }
+        }
+        return addr;
+    };
+
+    for (auto &function : M.functions()) {
+
+        if (function.isDeclaration() || function.isIntrinsic())
+            continue;
+
+        if (!function.getName().startswith("fn_")) {
+            continue;
+        }
+
+        uint64_t functionAddr = getFunctionAddress(function.getName());
+
+        typedef MCObjectDisassembler::AddressSetTy FunctionStart_t;
+        FunctionStart_t::iterator startIt = std::find(functionStarts.begin(), functionStarts.end(), functionAddr);
+        FunctionStart_t::iterator endIt = startIt;
+        std::advance(endIt, 1);
+
+        uint64_t startAddr = *startIt;
+        uint64_t endAddr = (endIt == functionStarts.end()) ? UINT64_MAX : *endIt;
+
+        BasicBlock *exitBB = nullptr;
+        ReturnInst *retInst = nullptr;
+
+        for (auto &bb : function) {
+            if (TerminatorInst *term = bb.getTerminator()) {
+                if (ReturnInst *ret = dyn_cast<ReturnInst>(term)) {
+                    exitBB = ret->getParent();
+                    retInst = ret;
+                }
+            }
+        }
+
+        if (!exitBB || !retInst) {
+            continue;
+        }
+
+        for (auto &bb : function) {
+            std::set<Instruction*> remove;
+            for (auto &inst : bb) {
+                if (UnreachableInst *unreachable = dyn_cast<UnreachableInst>(&inst)) {
+                    for (auto &i : bb) {
+                        remove.insert(&i);
+                    }
+                    break;
+                }
+            }
+
+            for (auto &r : remove) {
+                r->dropAllReferences();
+                r->removeFromParent();
+            }
+
+            IRBuilder<> builder(&bb);
+            builder.CreateBr(exitBB);
+        }
+
+//        for (auto &bb : function) {
+//            if (TerminatorInst *term = bb.getTerminator()) {
+//                if (BranchInst *br = dyn_cast<BranchInst>(term)) {
+//                    if (br->getNumOperands() > 1) {
+//                        continue;
+//                    }
+//                    if (BasicBlock *branchTarget = dyn_cast<BasicBlock>(br->getOperand(0))) {
+//                        std::string bbName = branchTarget->getName();
+//                        uint64_t bbAddr = getFunctionAddress(bbName);
+//                        if (bbAddr && !(startAddr <= bbAddr && bbAddr <= endAddr)) {
+//                            assert(true);
+//                            std::string targetFunctionName = "fn_" + utohexstr(bbAddr, false);
+//                            Function *targetFunction = M.getFunction(targetFunctionName);
+//                            if (targetFunction) {
+//                                IRBuilder<> builder(term);
+//
+////                                builder.CreateBr(exitBB);
+////                                term->dropAllReferences();
+////                                term->removeFromParent();
+//
+////                                builder.SetInsertPoint(retInst);
+////                                builder.CreateCall(targetFunction, {&function.getArgumentList().front()});
+//
+//
+//                                BasicBlock *newBB = BasicBlock::Create(getGlobalContext(), "foobar", &function);
+//
+//                                term->setOperand(0, newBB);
+//
+//                                builder.SetInsertPoint(newBB);
+//
+//                                for (auto &entryInst : function.getEntryBlock()){
+//                                    if (entryInst.getOpcode() == Instruction::GetElementPtr) {
+//                                        Value *load = builder.CreateLoad(&entryInst);
+//                                        builder.CreateStore(load, &entryInst);
+//                                    }
+//                                }
+//
+//                                builder.CreateCall(targetFunction, {&function.getArgumentList().front()});
+//
+//                                builder.CreateBr(exitBB);
+//
+//                            } else {
+//                                continue;
+//                            }
+//
+//                        }
+//                    }
+//                }
+//            }
+//        }
+    }
+    return false;
+}
diff --git a/tools/llvm-dec/TailCallPass.h b/tools/llvm-dec/TailCallPass.h
new file mode 100644
index 0000000..51e22bb
--- /dev/null
+++ b/tools/llvm-dec/TailCallPass.h
@@ -0,0 +1,25 @@
+#ifndef LLVM_TAILCALLPASS_H
+#define LLVM_TAILCALLPASS_H
+
+#include <llvm/MC/MCDisassembler.h>
+#include "llvm/Pass.h"
+#include "llvm/IR/Function.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Object/ObjectFile.h"
+#include "llvm/Object/MachO.h"
+#include "llvm/MC/MCObjectDisassembler.h"
+#include <map>
+
+namespace llvm {
+
+    class TailCallPass : public ModulePass {
+    public:
+        TailCallPass(MCObjectDisassembler::AddressSetTy functionStarts);
+        virtual bool runOnModule(Module &M) override;
+
+    private:
+        MCObjectDisassembler::AddressSetTy functionStarts;
+    };
+}
+
+#endif //LLVM_TAILCALLPASS_H
diff --git a/tools/llvm-dec/llvm-dec.cpp b/tools/llvm-dec/llvm-dec.cpp
index df87105..a4445eb 100644
--- a/tools/llvm-dec/llvm-dec.cpp
+++ b/tools/llvm-dec/llvm-dec.cpp
@@ -29,6 +29,12 @@
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/raw_ostream.h"
+#include "FunctionNamePass.h"
+#include "TailCallPass.h"
+#include "llvm/IR/PassManager.h"
+#include "llvm/IR/Verifier.h"
+#include "llvm/Support/ToolOutputFile.h"
+#include "llvm/Bitcode/ReaderWriter.h"
 
 using namespace llvm;
 using namespace object;
@@ -49,6 +55,14 @@ static cl::opt<bool>
 AnnotateIROutput("annot", cl::desc("Enable IR output anotations"),
                  cl::init(false));
 
+static cl::opt<bool>
+        NoPrint("no-print", cl::desc("Do not print the produced source"),
+                         cl::init(false));
+
+static cl::opt<bool>
+     PrintBitcode("bc", cl::desc("Bitcode output"),
+                      cl::init(false));
+
 static cl::opt<unsigned>
 TransOptLevel("O",
               cl::desc("Optimization level. [-O0, -O1, -O2, or -O3] "
@@ -60,6 +74,9 @@ EnableDisassemblyCache("enable-mcod-disass-cache",
     cl::desc("Enable the MC Object disassembly instruction cache"),
     cl::init(false), cl::Hidden);
 
+static cl::opt<std::string>
+        OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename"));
+
 static StringRef ToolName;
 
 static const Target *getTarget(const ObjectFile *Obj) {
@@ -229,8 +246,44 @@ int main(int argc, char **argv) {
   if (!TranslationEntrypoint)
     TranslationEntrypoint = MOS->getEntrypoint();
 
-  DT->createMainFunctionWrapper(
-      DT->translateRecursivelyAt(TranslationEntrypoint));
-  DT->printCurrentModule(outs());
+//  DT->createMainFunctionWrapper(
+//      DT->translateRecursivelyAt(TranslationEntrypoint));
+    DT->translateAllKnownFunctions();
+    Function *main_fn = DT->getCurrentTranslationModule()->getFunction("fn_" + utohexstr(TranslationEntrypoint));
+//    assert(main_fn);
+    if (main_fn)
+        DT->createMainFunctionWrapper(main_fn);
+
+    if (MachOObjectFile *MachO = dyn_cast<MachOObjectFile>(Obj)) {
+        legacy::PassManager *pm = new legacy::PassManager();
+        MCObjectDisassembler::AddressSetTy functionStarts = OD->findFunctionStarts();
+//        pm->add(new TailCallPass(functionStarts));
+        pm->add(new FunctionNamePass(MachO, DisAsm));
+        pm->run(*DT->getCurrentTranslationModule());
+    }
+
+    if (!NoPrint) {
+        std::error_code EC;
+        sys::fs::OpenFlags OpenFlags = sys::fs::F_None;
+        if (!Binary)
+            OpenFlags |= sys::fs::F_Text;
+        std::unique_ptr<tool_output_file> FDOut = llvm::make_unique<tool_output_file>(OutputFilename, EC,
+                                                         OpenFlags);
+        if (EC) {
+            errs() << EC.message() << '\n';
+            return -1;
+        }
+
+        if (PrintBitcode) {
+            WriteBitcodeToFile(DT->getCurrentTranslationModule(), FDOut->os(), true);
+        } else {
+            FDOut->os() << *DT->getCurrentTranslationModule();
+        }
+
+        FDOut->keep();
+        //DT->printCurrentModule(FDOut->os());
+
+
+    }
   return 0;
 }
diff --git a/utils/TableGen/SemanticsEmitter.cpp b/utils/TableGen/SemanticsEmitter.cpp
index b1bf370..ee774e9 100644
--- a/utils/TableGen/SemanticsEmitter.cpp
+++ b/utils/TableGen/SemanticsEmitter.cpp
@@ -249,6 +249,23 @@ private:
     unsigned NumNodeDefs = TPN->getNumChildren() - 1;
     const TreePatternNode *LastChild = TPN->getChild(TPN->getNumChildren() - 1);
 
+      if (NumNodeDefs != LastChild->getNumTypes()) {
+          errs() << "\nFlatten\n";
+          errs() << NumNodeDefs << " ";
+          TPN->dump();
+          errs() << "\n";
+          errs() << LastChild->getNumTypes() << " ";
+          LastChild->dump();
+          errs() << "\n";
+//          for (unsigned i = 0; i < LastChild->getNumChildren(); ++i) {
+//              errs() << "Num Types: " << LastChild->getChild(i)->getNumTypes() << "\n";
+//              errs() << "Type: " << LastChild->getChild(i)->getType(0) << "\n";
+//          }
+//          errs() << LastChild->getNumChildren() << "\n";
+//          errs() << "\n" <<LastChild->getChild(2)->getNumTypes() << "\n";
+//          errs() << LastChild->getType(0); TPN->getChild(1)->dump();
+          return;
+      }
     assert(NumNodeDefs == LastChild->getNumTypes() &&
            "Invalid 'set': last child needs to define all the others.");
 
-- 
2.7.0