doc: Fix a typo in core_interrupt_exception.rst

fanghuaqi · fanghuaqi · commit 42be355ec268 · 2024-06-28T20:25:52.000+08:00
Signed-off-by: Huaqi Fang &lt;578567190@qq.com&gt;
diff --git a/NMSIS/doc/source/core/api/core_interrupt_exception.rst b/NMSIS/doc/source/core/api/core_interrupt_exception.rst
@@ -262,7 +262,7 @@ The code below shows the usage of various NMSIS ECLIC flow with an GD32VF103 dev
         ECLIC_SetCfgNlbits(3);
     }
 
-    int eclic_register_interrupt(IRQn_Type IRQn, uint8_t shv, uint32_t trig_mode, uint32 lvl, uint32_t priority, void * handler)
+    int eclic_register_interrupt(IRQn_Type IRQn, uint8_t shv, uint32_t trig_mode, uint32_t lvl, uint32_t priority, void * handler)
     {
         ECLIC_SetShvIRQ(IRQn, shv);
         ECLIC_SetTrigIRQ(IRQn, trig_mode);

Original file line number	Diff line number	Diff line change
`@@ -262,7 +262,7 @@ The code below shows the usage of various NMSIS ECLIC flow with an GD32VF103 dev`
`262`	`262`	`ECLIC_SetCfgNlbits(3);`
`263`	`263`	`}`
`264`	`264`
`265`		`- int eclic_register_interrupt(IRQn_Type IRQn, uint8_t shv, uint32_t trig_mode, uint32 lvl, uint32_t priority, void * handler)`
	`265`	`+ int eclic_register_interrupt(IRQn_Type IRQn, uint8_t shv, uint32_t trig_mode, uint32_t lvl, uint32_t priority, void * handler)`
`266`	`266`	`{`
`267`	`267`	`ECLIC_SetShvIRQ(IRQn, shv);`
`268`	`268`	`ECLIC_SetTrigIRQ(IRQn, trig_mode);`