@@ -44,12 +44,7 @@ HexagonHazardRecognizer::getHazardType(SUnit *SU, int stalls) {
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if (!Resources->canReserveResources (*MI)) {
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LLVM_DEBUG (dbgs () << " *** Hazard in cycle " << PacketNum << " , " << *MI);
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HazardType RetVal = Hazard;
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- if (TII->mayBeNewStore (*MI)) {
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- // Make sure the register to be stored is defined by an instruction in the
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- // packet.
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- MachineOperand &MO = MI->getOperand (MI->getNumOperands () - 1 );
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- if (!MO.isReg () || RegDefs.count (MO.getReg ()) == 0 )
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- return Hazard;
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+ if (isNewStore (*MI)) {
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// The .new store version uses different resources so check if it
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// causes a hazard.
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MachineFunction *MF = MI->getParent ()->getParent ();
@@ -105,6 +100,15 @@ bool HexagonHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
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return UsesDotCur && ((SU == UsesDotCur) ^ (DotCurPNum == (int )PacketNum));
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}
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+ // / Return true if the instruction would be converted to a new value store when
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+ // / packetized.
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+ bool HexagonHazardRecognizer::isNewStore (MachineInstr &MI) {
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+ if (!TII->mayBeNewStore (MI))
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+ return false ;
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+ MachineOperand &MO = MI.getOperand (MI.getNumOperands () - 1 );
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+ return (MO.isReg () && RegDefs.count (MO.getReg ()) != 0 );
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+ }
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+
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void HexagonHazardRecognizer::EmitInstruction (SUnit *SU) {
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MachineInstr *MI = SU->getInstr ();
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if (!MI)
@@ -119,19 +123,20 @@ void HexagonHazardRecognizer::EmitInstruction(SUnit *SU) {
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if (TII->isZeroCost (MI->getOpcode ()))
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return ;
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- if (!Resources->canReserveResources (*MI)) {
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+ if (!Resources->canReserveResources (*MI) || isNewStore (*MI) ) {
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// It must be a .new store since other instructions must be able to be
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// reserved at this point.
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assert (TII->mayBeNewStore (*MI) && " Expecting .new store" );
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MachineFunction *MF = MI->getParent ()->getParent ();
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MachineInstr *NewMI =
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MF->CreateMachineInstr (TII->get (TII->getDotNewOp (*MI)),
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MI->getDebugLoc ());
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- assert (Resources->canReserveResources (*NewMI));
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- Resources->reserveResources (*NewMI);
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+ if (Resources->canReserveResources (*NewMI))
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+ Resources->reserveResources (*NewMI);
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+ else
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+ Resources->reserveResources (*MI);
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MF->deleteMachineInstr (NewMI);
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- }
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- else
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+ } else
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Resources->reserveResources (*MI);
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LLVM_DEBUG (dbgs () << " Add instruction " << *MI);
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