-
Notifications
You must be signed in to change notification settings - Fork 38
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
New targets for esp32s2 and esp32s3 #46
Comments
... and while we are at it, how about putting some extra info in the targets, like For those who have no interest in using this with the ESP-IDF SDK, these would do no harm, as they won't be trying to build the STD crates anyway. However, for me this extra info is very beneficial, as most of my patches against STD are checking for generic stuff, like |
Hi @ivmarkov, I've just updated the fork to 1.51, with a target def for the esp32s2, it seems esp32s3 support has not yet landed in llvm.
I'm not yet convinced this is necessary, and I think we should try and lean on upstream support where we can until we really need custom definitions. As for the custom defs for libstd porting, I'm not apposed to them haven't really looked into the libstd porting effort enough yet. |
Closing as the esp32s2 target is there, and the ESP-IDF-specific targets for Xtensa & RiscV are part of the libstd pull request. |
Given that for these MCUs Espressif provides separate toolchains, perhaps we need separate targets too. At the very least, the
linker
field inTargetOptions
as well as thecpu
should be different.Also: shall we create a target for esp32c3? I get it that it is not really 'xtensa', but it needs the same changes. Possibly based on some of the existing "riscv-" targets?
The text was updated successfully, but these errors were encountered: