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[SPARC] Align i128 to 16 bytes in SPARC datalayouts (#106951)
Align i128s to 16 bytes, following the example at https://reviews.llvm.org/D86310. clang already does this implicitly, but do it in backend code too for the benefit of other frontends (see e.g llvm/llvm-project#102783 & rust-lang/rust#128950).
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clang/lib/Basic/Targets/Sparc.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -151,7 +151,7 @@ class LLVM_LIBRARY_VISIBILITY SparcV8TargetInfo : public SparcTargetInfo {
151151
public:
152152
SparcV8TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
153153
: SparcTargetInfo(Triple, Opts) {
154-
resetDataLayout("E-m:e-p:32:32-i64:64-f128:64-n32-S64");
154+
resetDataLayout("E-m:e-p:32:32-i64:64-i128:128-f128:64-n32-S64");
155155
// NetBSD / OpenBSD use long (same as llvm default); everyone else uses int.
156156
switch (getTriple().getOS()) {
157157
default:
@@ -188,7 +188,7 @@ class LLVM_LIBRARY_VISIBILITY SparcV8elTargetInfo : public SparcV8TargetInfo {
188188
public:
189189
SparcV8elTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
190190
: SparcV8TargetInfo(Triple, Opts) {
191-
resetDataLayout("e-m:e-p:32:32-i64:64-f128:64-n32-S64");
191+
resetDataLayout("e-m:e-p:32:32-i64:64-i128:128-f128:64-n32-S64");
192192
}
193193
};
194194

@@ -198,7 +198,7 @@ class LLVM_LIBRARY_VISIBILITY SparcV9TargetInfo : public SparcTargetInfo {
198198
SparcV9TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
199199
: SparcTargetInfo(Triple, Opts) {
200200
// FIXME: Support Sparc quad-precision long double?
201-
resetDataLayout("E-m:e-i64:64-n32:64-S128");
201+
resetDataLayout("E-m:e-i64:64-i128:128-n32:64-S128");
202202
// This is an LP64 platform.
203203
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
204204

clang/test/CodeGen/target-data.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -28,11 +28,11 @@
2828

2929
// RUN: %clang_cc1 -triple sparc-sun-solaris -emit-llvm -o - %s | \
3030
// RUN: FileCheck %s --check-prefix=SPARC-V8
31-
// SPARC-V8: target datalayout = "E-m:e-p:32:32-i64:64-f128:64-n32-S64"
31+
// SPARC-V8: target datalayout = "E-m:e-p:32:32-i64:64-i128:128-f128:64-n32-S64"
3232

3333
// RUN: %clang_cc1 -triple sparcv9-sun-solaris -emit-llvm -o - %s | \
3434
// RUN: FileCheck %s --check-prefix=SPARC-V9
35-
// SPARC-V9: target datalayout = "E-m:e-i64:64-n32:64-S128"
35+
// SPARC-V9: target datalayout = "E-m:e-i64:64-i128:128-n32:64-S128"
3636

3737
// RUN: %clang_cc1 -triple mipsel-linux-gnu -o - -emit-llvm %s | \
3838
// RUN: FileCheck %s -check-prefix=MIPS-32EL

llvm/lib/IR/AutoUpgrade.cpp

+12
Original file line numberDiff line numberDiff line change
@@ -5517,6 +5517,18 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
55175517
return Res;
55185518
}
55195519

5520+
if (T.isSPARC()) {
5521+
// Add "-i128:128"
5522+
std::string I64 = "-i64:64";
5523+
std::string I128 = "-i128:128";
5524+
if (!StringRef(Res).contains(I128)) {
5525+
size_t Pos = Res.find(I64);
5526+
assert(Pos != size_t(-1) && "no i64 data layout found!");
5527+
Res.insert(Pos + I64.size(), I128);
5528+
}
5529+
return Res;
5530+
}
5531+
55205532
if (!T.isX86())
55215533
return Res;
55225534

llvm/lib/Target/Sparc/SparcTargetMachine.cpp

+4
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,10 @@ static std::string computeDataLayout(const Triple &T, bool is64Bit) {
4848
// Alignments for 64 bit integers.
4949
Ret += "-i64:64";
5050

51+
// Alignments for 128 bit integers.
52+
// This is not specified in the ABI document but is the de facto standard.
53+
Ret += "-i128:128";
54+
5155
// On SparcV9 128 floats are aligned to 128 bits, on others only to 64.
5256
// On SparcV9 registers can hold 64 or 32 bits, on others only 32.
5357
if (is64Bit)

llvm/test/CodeGen/SPARC/data-align.ll

+27
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
; RUN: llc < %s -march=sparc | FileCheck %s
2+
; RUN: llc < %s -march=sparcel | FileCheck %s
3+
; RUN: llc < %s -march=sparcv9 | FileCheck %s
4+
5+
; CHECK: .Li8:
6+
; CHECK-DAG: .size .Li8, 1
7+
@i8 = private constant i8 42
8+
9+
; CHECK: .p2align 1
10+
; CHECK-NEXT: .Li16:
11+
; CHECK-DAG: .size .Li16, 2
12+
@i16 = private constant i16 42
13+
14+
; CHECK: .p2align 2
15+
; CHECK-NEXT: .Li32:
16+
; CHECK-DAG: .size .Li32, 4
17+
@i32 = private constant i32 42
18+
19+
; CHECK: .p2align 3
20+
; CHECK-NEXT: .Li64:
21+
; CHECK-DAG: .size .Li64, 8
22+
@i64 = private constant i64 42
23+
24+
; CHECK: .p2align 4
25+
; CHECK-NEXT: .Li128:
26+
; CHECK-DAG: .size .Li128, 16
27+
@i128 = private constant i128 42

llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp

+7
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,13 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
6868
"loongarch64"),
6969
"e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
7070

71+
// Check that SPARC targets add -i128:128.
72+
EXPECT_EQ(
73+
UpgradeDataLayoutString("E-m:e-p:32:32-i64:64-f128:64-n32-S64", "sparc"),
74+
"E-m:e-p:32:32-i64:64-i128:128-f128:64-n32-S64");
75+
EXPECT_EQ(UpgradeDataLayoutString("E-m:e-i64:64-n32:64-S128", "sparcv9"),
76+
"E-m:e-i64:64-i128:128-n32:64-S128");
77+
7178
// Check that SPIR && SPIRV targets add -G1 if it's not present.
7279
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir"), "e-p:32:32-G1");
7380
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir64"), "e-p:32:32-G1");

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