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Added custom risc32-imac for esp-espidf target
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compiler/rustc_target/src/spec/mod.rs

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@@ -1284,6 +1284,7 @@ supported_targets! {
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("riscv32im-unknown-none-elf", riscv32im_unknown_none_elf),
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("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf),
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("riscv32imc-esp-espidf", riscv32imc_esp_espidf),
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("riscv32imac-esp-espidf", riscv32imac_esp_espidf),
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("riscv32imac-unknown-none-elf", riscv32imac_unknown_none_elf),
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("riscv32imac-unknown-xous-elf", riscv32imac_unknown_xous_elf),
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("riscv32gc-unknown-linux-gnu", riscv32gc_unknown_linux_gnu),
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use crate::spec::{cvs, PanicStrategy, RelocModel, Target, TargetOptions};
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pub fn target() -> Target {
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Target {
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data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
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llvm_target: "riscv32".into(),
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pointer_width: 32,
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arch: "riscv32".into(),
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options: TargetOptions {
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families: cvs!["unix"],
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os: "espidf".into(),
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env: "newlib".into(),
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vendor: "espressif".into(),
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linker: Some("riscv32-esp-elf-gcc".into()),
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cpu: "generic-rv32".into(),
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// As RiscV32IMAC architecture does natively support atomics,
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// automatically enable the support for the Rust STD library.
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max_atomic_width: Some(64),
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atomic_cas: true,
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features: "+m,+a,+c".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,
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eh_frame_header: false,
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..Default::default()
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},
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}
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}

src/doc/rustc/src/platform-support.md

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@@ -298,6 +298,7 @@ target | std | host | notes
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`riscv32im-unknown-none-elf` | * | | Bare RISC-V (RV32IM ISA)
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[`riscv32imac-unknown-xous-elf`](platform-support/riscv32imac-unknown-xous-elf.md) | ? | | RISC-V Xous (RV32IMAC ISA)
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[`riscv32imc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
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[`riscv32imac-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
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`riscv64gc-unknown-freebsd` | | | RISC-V FreeBSD
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`riscv64gc-unknown-fuchsia` | | | RISC-V Fuchsia
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`riscv64gc-unknown-linux-musl` | | | RISC-V Linux (kernel 4.20, musl 1.2.0)

src/doc/rustc/src/platform-support/esp-idf.md

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@@ -13,11 +13,12 @@ Targets for the [ESP-IDF](https://github.com/espressif/esp-idf) development fram
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The target names follow this format: `$ARCH-esp-espidf`, where `$ARCH` specifies the target processor architecture. The following targets are currently defined:
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| Target name | Target CPU(s) |
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|--------------------------------|-----------------------|
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| `riscv32imc-esp-espidf` | [ESP32-C3](https://www.espressif.com/en/products/socs/esp32-c3) |
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| Target name | Target CPU(s) | Minimum ESP-IDF version |
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|--------------------------------|-----------------------|-------------------------|
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| `riscv32imc-esp-espidf` | [ESP32-C3](https://www.espressif.com/en/products/socs/esp32-c3) | `v4.3` |
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| `riscv32imac-esp-espidf` | [ESP32-C6](https://www.espressif.com/en/products/socs/esp32-c6) | `v5.1` |
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The minimum supported ESP-IDF version is `v4.3`, though it is recommended to use the latest stable release if possible.
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It is recommended to use the latest ESP-IDF stable release if possible.
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## Building the target
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