Skip to content

Commit f049e27

Browse files
committed
add specs for riscv32/riscv64 musl targets
Signed-off-by: Khem Raj <[email protected]>
1 parent a143517 commit f049e27

File tree

3 files changed

+40
-0
lines changed

3 files changed

+40
-0
lines changed

compiler/rustc_target/src/spec/mod.rs

+2
Original file line numberDiff line numberDiff line change
@@ -783,9 +783,11 @@ supported_targets! {
783783
("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf),
784784
("riscv32imac-unknown-none-elf", riscv32imac_unknown_none_elf),
785785
("riscv32gc-unknown-linux-gnu", riscv32gc_unknown_linux_gnu),
786+
("riscv32gc-unknown-linux-musl", riscv32gc_unknown_linux_musl),
786787
("riscv64imac-unknown-none-elf", riscv64imac_unknown_none_elf),
787788
("riscv64gc-unknown-none-elf", riscv64gc_unknown_none_elf),
788789
("riscv64gc-unknown-linux-gnu", riscv64gc_unknown_linux_gnu),
790+
("riscv64gc-unknown-linux-musl", riscv64gc_unknown_linux_musl),
789791

790792
("aarch64-unknown-none", aarch64_unknown_none),
791793
("aarch64-unknown-none-softfloat", aarch64_unknown_none_softfloat),
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
use crate::spec::{CodeModel, Target, TargetOptions};
2+
3+
pub fn target() -> Target {
4+
Target {
5+
llvm_target: "riscv32-unknown-linux-musl".to_string(),
6+
pointer_width: 32,
7+
data_layout: "e-m:e-p:32:32-i64:64-n32-S128".to_string(),
8+
arch: "riscv32".to_string(),
9+
options: TargetOptions {
10+
unsupported_abis: super::riscv_base::unsupported_abis(),
11+
code_model: Some(CodeModel::Medium),
12+
cpu: "generic-rv32".to_string(),
13+
features: "+m,+a,+f,+d,+c".to_string(),
14+
llvm_abiname: "ilp32d".to_string(),
15+
max_atomic_width: Some(32),
16+
..super::linux_musl_base::opts()
17+
},
18+
}
19+
}
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
use crate::spec::{CodeModel, Target, TargetOptions};
2+
3+
pub fn target() -> Target {
4+
Target {
5+
llvm_target: "riscv64-unknown-linux-musl".to_string(),
6+
pointer_width: 64,
7+
data_layout: "e-m:e-p:64:64-i64:64-i128:128-n64-S128".to_string(),
8+
arch: "riscv64".to_string(),
9+
options: TargetOptions {
10+
unsupported_abis: super::riscv_base::unsupported_abis(),
11+
code_model: Some(CodeModel::Medium),
12+
cpu: "generic-rv64".to_string(),
13+
features: "+m,+a,+f,+d,+c".to_string(),
14+
llvm_abiname: "lp64d".to_string(),
15+
max_atomic_width: Some(64),
16+
..super::linux_musl_base::opts()
17+
},
18+
}
19+
}

0 commit comments

Comments
 (0)