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+102
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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#if defined(PORTA)
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{VAL_PORTA, VAL_DDRA},
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#endif
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#if defined(PORTB)
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{VAL_PORTB, VAL_DDRB},
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#endif
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#if defined(PORTC)
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{VAL_PORTC, VAL_DDRC},
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#endif
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#if defined(PORTD)
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{VAL_PORTD, VAL_DDRD},
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#endif
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#if defined(PORTE)
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{VAL_PORTE, VAL_DDRE},
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#endif
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#if defined(PORTF)
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{VAL_PORTF, VAL_DDRF},
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#endif
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#if defined(PORTG)
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{VAL_PORTG, VAL_DDRG},
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#endif
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#if defined(PORTH)
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{VAL_PORTH, VAL_DDRH},
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#endif
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#if defined(PORTJ)
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{VAL_PORTJ, VAL_DDRJ},
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#endif
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#if defined(PORTK)
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{VAL_PORTK, VAL_DDRK},
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#endif
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#if defined(PORTL)
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{VAL_PORTL, VAL_DDRL},
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#endif
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};
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#endif /* HAL_USE_PAL */
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/**
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* @brief Timer0 interrupt handler.
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*/
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CH_IRQ_HANDLER(TIMER0_COMPA_vect) {
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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chSysTimerHandlerI();
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chSysUnlockFromIsr();
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CH_IRQ_EPILOGUE();
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}
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/**
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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/*
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* External interrupts setup, all disabled initially.
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*/
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EICRA = 0x00;
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EICRB = 0x00;
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EIMSK = 0x00;
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/*
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* Timer 0 setup.
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*/
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TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
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(0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
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(0 << COM0B1) | (0 << COM0B0); /* OC0B disabled. */
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TCCR0B = (0 << WGM02) | /* CTC mode. */
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(0 << CS02) | (1 << CS01) | (1 << CS00); /* CLK/64 clock. */
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OCR0A = F_CPU / 64 / CH_FREQUENCY - 1;
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TCNT0 = 0; /* Reset counter. */
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TIFR0 = (1 << OCF0A); /* Reset pending. */
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TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
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}
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for the Arduino Mega board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ARDUINO_MEGA
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#define BOARD_NAME "Arduino Mega"
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/* All inputs with pull-ups */
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#define VAL_DDRA 0x00
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#define VAL_PORTA 0xFF
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/* All inputs except PB7 which has a LED connected */
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#define VAL_DDRB 0x80
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#define VAL_PORTB 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRC 0x00
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#define VAL_PORTC 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRD 0x00
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#define VAL_PORTD 0xFF
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/* All inputs except PE1 (Serial TX0) */
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#define VAL_DDRE 0x02
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#define VAL_PORTE 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRF 0x00
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#define VAL_PORTF 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRG 0x00
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#define VAL_PORTG 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRH 0x00
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#define VAL_PORTH 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRJ 0x00
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#define VAL_PORTJ 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRK 0x00
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#define VAL_PORTK 0xFF
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/* All inputs with pull-ups */
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#define VAL_DDRL 0x00
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#define VAL_PORTL 0xFF
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#define PORTB_LED1 7
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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# List of all the board related files.
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BOARDSRC = ${CHIBIOS}/boards/ARDUINO_MEGA/board.c
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# Required include directories
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BOARDINC = ${CHIBIOS}/boards/ARDUINO_MEGA
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config = {
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{VAL_GPIO0DATA, VAL_GPIO0DIR},
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{VAL_GPIO1DATA, VAL_GPIO1DIR},
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{VAL_GPIO2DATA, VAL_GPIO2DIR},
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{VAL_GPIO3DATA, VAL_GPIO3DIR},
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};
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#endif
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) {
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lpc111x_clock_init();
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}
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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/*
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* Extra, board-specific, initializations.
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* NOTE: PIO1_2 is associated also to the JTAG, if you need to use JTAG
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* you must comment that line first.
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*/
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LPC_IOCON->PIO0_7 = 0xC0; /* Disables pull-up on LED2 output. */
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LPC_IOCON->R_PIO1_2 = 0xC1; /* Disables pull-up on LED3B output
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and makes it GPIO1_2. */
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LPC_IOCON->PIO1_9 = 0xC0; /* Disables pull-up on LED3R output.*/
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LPC_IOCON->PIO1_10 = 0xC0; /* Disables pull-up on LED3G output.*/
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}
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for Embedded Artists LPCXpresso Base Board with LPC1114 daughter
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* board.
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*/
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/*
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* Board identifiers.
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*/
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#define BOARD_EA_BB_LPC1114
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#define BOARD_NAME "Embedded Artists LPCXpresso Base Board + LPC1114"
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/*
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* Board frequencies.
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*/
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#define SYSOSCCLK 12000000
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/*
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* SCK0 connection on this board.
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*/
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#define LPC11xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11
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/*
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* GPIO 0 initial setup.
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*/
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#define VAL_GPIO0DIR PAL_PORT_BIT(GPIO0_OLEDSEL) | \
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PAL_PORT_BIT(GPIO0_LED2)
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#define VAL_GPIO0DATA PAL_PORT_BIT(GPIO0_OLEDSEL) | \
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PAL_PORT_BIT(GPIO0_LED2)
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/*
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* GPIO 1 initial setup.
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*/
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#define VAL_GPIO1DIR PAL_PORT_BIT(GPIO1_LED3B) | \
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PAL_PORT_BIT(GPIO1_LED3R) | \
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PAL_PORT_BIT(GPIO1_LED3G) | \
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PAL_PORT_BIT(GPIO1_SPI0SEL)
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#define VAL_GPIO1DATA PAL_PORT_BIT(GPIO1_LED3B) | \
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PAL_PORT_BIT(GPIO1_LED3R) | \
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PAL_PORT_BIT(GPIO1_LED3G) | \
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PAL_PORT_BIT(GPIO1_SPI0SEL)
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/*
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* GPIO 2 initial setup.
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*/
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#define VAL_GPIO2DIR 0x00000000
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#define VAL_GPIO2DATA 0x00000000
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/*
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* GPIO 3 initial setup.
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*/
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#define VAL_GPIO3DIR 0x00000000
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#define VAL_GPIO3DATA 0x00000000
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/*
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* Pin definitions.
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*/
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#define GPIO0_SW3 1
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#define GPIO0_OLEDSEL 2
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#define GPIO0_LED2 7
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#define GPIO1_LED3B 2
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#define GPIO1_SW4 4
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#define GPIO1_LED3R 9
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#define GPIO1_LED3G 10
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#define GPIO1_SPI0SEL 11
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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# List of all the board related files.
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BOARDSRC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_1114/board.c
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# Required include directories
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BOARDINC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_1114

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